drm/i915: Extract increase_wm_latency()

Extract the "increase wm latencies by some amount" code into
a helper that can be reused.

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250919193000.17665-8-ville.syrjala@linux.intel.com

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 1ac94cb4f27d890d9de5bbf142d1455a4105b5f6..98ca592f6042efef64c90410a30b981c5d20522a 100644 (file)
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3183,6 +3183,21 @@ static void multiply_wm_latency(struct intel_display *display, int mult)
                wm[level] *= mult;
 }
 
+static void increase_wm_latency(struct intel_display *display, int inc)
+{
+       u16 *wm = display->wm.skl_latency;
+       int level, num_levels = display->wm.num_levels;
+
+       wm[0] += inc;
+
+       for (level = 1; level < num_levels; level++) {
+               if (wm[level] == 0)
+                       break;
+
+               wm[level] += inc;
+       }
+}
+
 static bool need_16gb_dimm_wa(struct intel_display *display)
 {
        const struct dram_info *dram_info = intel_dram_info(display->drm);
@@ -3207,7 +3222,6 @@ adjust_wm_latency(struct intel_display *display)
 {
        u16 *wm = display->wm.skl_latency;
        int i, level, num_levels = display->wm.num_levels;
-       int read_latency = wm_read_latency(display);
 
        if (display->platform.dg2)
                multiply_wm_latency(display, 2);
@@ -3232,16 +3246,8 @@ adjust_wm_latency(struct intel_display *display)
         * to add proper adjustment to each valid level we retrieve
         * from the punit when level 0 response data is 0us.
         */
-       if (wm[0] == 0) {
-               wm[0] += read_latency;
-
-               for (level = 1; level < num_levels; level++) {
-                       if (wm[level] == 0)
-                               break;
-
-                       wm[level] += read_latency;
-               }
-       }
+       if (wm[0] == 0)
+               increase_wm_latency(display, wm_read_latency(display));
 
        /*
         * WA Level-0 adjustment for 16Gb+ DIMMs: SKL+