arm64: dts: qcom: sc8180x: Add video clock controller node

Add device node for video clock controller on Qualcomm
sc8180x platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250710-sc8180x-videocc-dt-v4-2-07a9d9d5e0e6@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index b8a64bf372cc47e67fb6c5ab31de14a1786db665..815095c2f8c751e6bd421c10f43c55ae3b7aae04 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -10,6 +10,7 @@
 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/clock/qcom,sc8180x-camcc.h>
+#include <dt-bindings/clock/qcom,videocc-sm8150.h>
 #include <dt-bindings/interconnect/qcom,icc.h>
 #include <dt-bindings/interconnect/qcom,osm-l3.h>
 #include <dt-bindings/interconnect/qcom,sc8180x.h>
@@ -2927,6 +2928,20 @@
                        };
                };
 
+               videocc: clock-controller@ab00000 {
+                       compatible = "qcom,sc8180x-videocc",
+                                    "qcom,sm8150-videocc";
+                       reg = <0 0x0ab00000 0 0x10000>;
+                       clocks = <&gcc GCC_VIDEO_AHB_CLK>,
+                                <&rpmhcc RPMH_CXO_CLK>;
+                       clock-names = "iface", "bi_tcxo";
+                       power-domains = <&rpmhpd SC8180X_MMCX>;
+                       required-opps = <&rpmhpd_opp_low_svs>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       #power-domain-cells = <1>;
+               };
+
                camcc: clock-controller@ad00000 {
                        compatible = "qcom,sc8180x-camcc";
                        reg = <0 0x0ad00000 0 0x20000>;