;;
esac
-# For s390, -m31 is deprecated. Emit a warning if --enable-multilib and
-# --enable-obsolete are explicitly specified. If --enable-multilib is
-# specified implicitly or --enable-obsolete is missing, error out.
-case "$target:$enable_multilib:$enable_obsolete" in
- s390*:yes:yes)
- { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Support for -m31 is deprecated and will be removed." >&5
-$as_echo "$as_me: WARNING: Support for -m31 is deprecated and will be removed." >&2;}
- ;;
- s390*::*)
- as_fn_error $? "Support for -m31 is deprecated and will be removed. Explicitly specify --disable-multilib or --enable-multilib --enable-obsolete to build it anyway." "$LINENO" 5
- ;;
- s390*:yes:*)
- as_fn_error $? "Support for -m31 is deprecated and will be removed. Specify --enable-obsolete to build it anyway." "$LINENO" 5
- ;;
-esac
-
# Default to --enable-multilib.
if test x${enable_multilib} = x ; then
target_configargs="--enable-multilib ${target_configargs}"
;;
esac
-# For s390, -m31 is deprecated. Emit a warning if --enable-multilib and
-# --enable-obsolete are explicitly specified. If --enable-multilib is
-# specified implicitly or --enable-obsolete is missing, error out.
-case "$target:$enable_multilib:$enable_obsolete" in
- s390*:yes:yes)
- AC_MSG_WARN([Support for -m31 is deprecated and will be removed.])
- ;;
- s390*::*)
- AC_MSG_ERROR([Support for -m31 is deprecated and will be removed. Explicitly specify --disable-multilib or --enable-multilib --enable-obsolete to build it anyway.])
- ;;
- s390*:yes:*)
- AC_MSG_ERROR([Support for -m31 is deprecated and will be removed. Specify --enable-obsolete to build it anyway.])
- ;;
-esac
-
# Default to --enable-multilib.
if test x${enable_multilib} = x ; then
target_configargs="--enable-multilib ${target_configargs}"
mn10300_opts='-mam33 -mam33-2'
pa_opts='-march=2.0 -march=1.0 -march=1.1'
ppc_opts='-m32 -m64'
-s390_opts='-m31 -m31/-mzarch -m64'
sh_opts='-m3 -m3e -m4 -m4a -m4al -m4/-mieee -m1 -m1/-mno-cbranchdi -m2a -m2a/-mieee -m2e -m2e/-mieee'
sparc_opts='-mcpu=v8/-m32 -mcpu=v9/-m32 -m64'
pru-elf \
riscv32-unknown-linux-gnu riscv64-unknown-linux-gnu \
powerpc-ibm-aix7.1 powerpc-ibm-aix7.2 \
- rl78-elf rx-elf s390-linux-gnu s390x-linux-gnu s390x-ibm-tpf sh-elf \
+ rl78-elf rx-elf s390x-linux-gnu s390x-ibm-tpf sh-elf \
shle-linux sh-netbsdelf sh-superh-elf \
sh-rtems sh-wrs-vxworks sparc-elf \
sparc-leon-elf sparc-rtems sparc-linux-gnu \
fi;;
esac
-case ${target} in
- s390-*)
- if test "x$enable_obsolete" != xyes; then
- echo "*** Configuration ${target} is deprecated and will be removed." >&2
- echo "*** Specify --enable-obsolete to build it anyway." >&2
- exit 1
- fi;;
-esac
-
# Unsupported targets list. Do not put an entry in this list unless
# it would otherwise be caught by a more permissive pattern. The list
# should be in alphabetical order.
| pdp11-*-bsd \
| powerpc*-*-linux*paired* \
| powerpc*-*-*spe* \
+ | s390-*-* \
| sparc-hal-solaris2* \
| spu*-*-* \
| thumb-*-* \
d_target_objs="sparc-d.o"
extra_headers="visintrin.h"
;;
-s390*-*-*)
+s390x-*-*)
cpu_type=s390
d_target_objs="s390-d.o"
extra_options="${extra_options} fused-madd.opt"
tm_file="elfos.h linux.h glibc-stdint.h rx/linux.h ../../libgcc/config/rx/rx-abi.h"
tmake_file="${tmake_file} rx/t-linux"
;;
-s390-*-linux*)
- tm_file="s390/s390.h elfos.h gnu-user.h linux.h glibc-stdint.h s390/linux.h"
- c_target_objs="${c_target_objs} s390-c.o"
- cxx_target_objs="${cxx_target_objs} s390-c.o"
- if test x$enable_targets = xall; then
- tmake_file="${tmake_file} s390/t-linux64"
- fi
- tmake_file="${tmake_file} s390/t-s390"
- ;;
s390x-*-linux*)
- tm_file="s390/s390x.h s390/s390.h elfos.h gnu-user.h linux.h glibc-stdint.h s390/linux.h"
+ tm_file="s390/s390.h elfos.h gnu-user.h linux.h glibc-stdint.h s390/linux.h"
tm_p_file="linux-protos.h s390/s390-protos.h"
c_target_objs="${c_target_objs} s390-c.o"
cxx_target_objs="${cxx_target_objs} s390-c.o"
tmake_file="${tmake_file} s390/t-linux64 s390/t-s390"
;;
s390x-ibm-tpf*)
- tm_file="s390/s390x.h s390/s390.h elfos.h glibc-stdint.h s390/tpf.h"
+ tm_file="s390/s390.h elfos.h glibc-stdint.h s390/tpf.h"
tm_p_file=s390/s390-protos.h
c_target_objs="${c_target_objs} s390-c.o"
cxx_target_objs="${cxx_target_objs} s390-c.o"
fi
;;
- s390*-*-*)
+ s390x-*-*)
supported_defaults="arch mode tune"
for which in arch tune; do
done
case ${with_mode} in
- "" | esa | zarch)
+ "" | zarch)
# OK
;;
+ esa)
+ echo "ESA/390 mode is no longer supported." 1>&2
+ exit 1
+ ;;
*)
echo "Unknown architecture mode used in --with-mode=$with_mode." 1>&2
exit 1
;;
esac
;;
- s390-*-* | s390x-*-*)
+ s390x-*-*)
case ${target} in
- s390-*-* | s390x-*-*)
+ s390x-*-*)
host_extra_gcc_objs="driver-native.o"
host_xmake_file="${host_xmake_file} s390/x-native"
;;
# define TRY_EMPTY_VM_SPACE 0x60000000
#elif defined(__s390x__)
# define TRY_EMPTY_VM_SPACE 0x8000000000
-#elif defined(__s390__)
-# define TRY_EMPTY_VM_SPACE 0x60000000
#elif defined(__sparc__) && defined(__LP64__)
# define TRY_EMPTY_VM_SPACE 0x8000000000
#elif defined(__sparc__)
;; <http://www.gnu.org/licenses/>.
(define_attr "zEC12_cracked" ""
- (cond [(eq_attr "mnemonic" "cgdbr,clfxtr,cdgtr,celfbr,cxgtr,clfebr,clc,lngfr,cs,cfxbr,xc,clfdbr,basr,ex,cxlgtr,clfdtr,srdl,lpgfr,cdlgbr,cgxtr,cxlftr,nc,cxftr,cdfbr,clfxbr,cdftr,clgxbr,cgdtr,cxlgbr,mvc,clgdtr,cegbr,cfebr,cdlftr,sldl,cdlgtr,csg,chhsi,clgebr,cxgbr,cxfbr,cdlfbr,cgebr,lzxr,oc,cdgbr,brasl,cgxbr,cxlfbr,clgxtr,exrl,cfdbr,celgbr,clgdbr,lxr,cpsdr,lcgfr,bras,srda,cefbr") (const_int 1)]
+ (cond [(eq_attr "mnemonic" "cgdbr,clfxtr,cdgtr,celfbr,cxgtr,clfebr,clc,lngfr,cs,cfxbr,xc,clfdbr,basr,ex,cxlgtr,clfdtr,lpgfr,cdlgbr,cgxtr,cxlftr,nc,cxftr,cdfbr,clfxbr,cdftr,clgxbr,cgdtr,cxlgbr,mvc,clgdtr,cegbr,cfebr,cdlftr,cdlgtr,csg,chhsi,clgebr,cxgbr,cxfbr,cdlfbr,cgebr,lzxr,oc,cdgbr,brasl,cgxbr,cxlfbr,clgxtr,exrl,cfdbr,celgbr,clgdbr,lxr,cpsdr,lcgfr,bras,cefbr") (const_int 1)]
(const_int 0)))
(define_attr "zEC12_expanded" ""
- (cond [(eq_attr "mnemonic" "dlr,dsgr,d,dsgf,stam,dsgfr,dlgr,dsg,cds,dr,stm,mvc,dl,cdsg,stmy,dlg,stmg,lam") (const_int 1)]
+ (cond [(eq_attr "mnemonic" "dsgr,dsgf,stam,dsgfr,dlgr,dsg,mvc,cdsg,dlg,stmg,lam") (const_int 1)]
(const_int 0)))
(define_attr "zEC12_endgroup" ""
(const_int 0)))
(define_attr "zEC12_groupalone" ""
- (cond [(eq_attr "mnemonic" "lnxbr,madb,ltxtr,clc,axtr,msebr,slbgr,xc,alcr,lpxbr,slbr,maebr,mlg,mfy,lxdtr,maeb,lxeb,nc,mxtr,sxtr,dxbr,alc,msdbr,ltxbr,lxdb,madbr,lxdbr,lxebr,mvc,m,mseb,mlr,mlgr,slb,tcxb,msdb,sqxbr,alcgr,oc,flogr,alcg,mxbr,dxtr,axbr,mr,sxbr,slbg,ml,lcxbr,bcr_flush") (const_int 1)]
+ (cond [(eq_attr "mnemonic" "lnxbr,madb,ltxtr,clc,axtr,msebr,slbgr,xc,alcr,lpxbr,slbr,maebr,mlg,lxdtr,maeb,lxeb,nc,mxtr,sxtr,dxbr,alc,msdbr,ltxbr,lxdb,madbr,lxdbr,lxebr,mvc,mseb,mlgr,slb,tcxb,msdb,sqxbr,alcgr,oc,flogr,alcg,mxbr,dxtr,axbr,sxbr,slbg,lcxbr,bcr_flush") (const_int 1)]
(const_int 0)))
(define_insn_reservation "zEC12_simple_int" 0
(and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "ltg,ogrk,lr,lghrl,x,asi,lhr,ar,lhrl,llgfr,clghrl,cgr,cli,agrk,ic,lrv,clg,cy,cghi,sy,clgfr,al,tm,lang,lghr,laa,ark,lh,or,icy,xi,n,llihl,afi,cs,nrk,sth,lgr,l,lcr,stey,xg,crt,slgfr,ny,ld,j,llihh,slgr,clfhsi,slg,lb,lgrl,lrl,llihf,llcr,laxg,mvghi,rllg,xrk,laag,alhsik,algfi,algr,aly,agfi,lrvr,d,crl,llgc,tmhl,algsi,lgh,icmh,clhrl,xgrk,icm,iilf,ork,cg,ldgr,lgf,iihf,llghr,sg,stam,tmhh,slgf,basr,lgb,cgfi,lax,clfit,lrvgr,nihl,ni,srdl,srk,xihf,stgrl,sthrl,algf,cgit,ng,lat,llghrl,ltgr,nihh,clgfrl,srlk,agr,ler,bcr_flush,stcy,cds,clfi,nihf,ly,clt,lgat,alg,lhy,lgfrl,clghsi,clrt,tmll,srlg,ay,sty,clr,lgfi,lan,clgt,ahik,sra,algrk,clgr,tmy,tmlh,alghsik,lcgr,mvi,ltgf,xr,larl,ldr,llgcr,clgrt,clrl,cghsi,cliy,oy,ogr,llgt,slr,chi,s,icmy,llc,ngr,clhhsi,ltgfr,llill,lhi,o,sll,clgrl,clgf,mviy,algfr,rll,sldl,lg,niy,st,sgr,ag,le,xgr,cr,stg,llilh,sr,cdsg,sllk,stoc,csg,clgit,chhsi,strl,llilf,lndfr,ngrk,clgfi,llgh,oill,la,llhrl,stc,lghi,oihl,xiy,sllg,llgf,cgrt,cl,sl,oi,oilh,nr,srak,oihh,ear,slgrk,og,c,slgfi,sthy,oilf,oiy,oihf,a,cfi,srag,brasl,alr,cgrl,llgfrl,cit,ley,exrl,lcdfr,lay,xilf,alsi,mvhhi,srl,chsi,lgfr,lrvg,cly,sgrk,ahi,nill,jg,slrk,lxr,sar,slfi,cpsdr,lcgfr,aghik,nilh,mvhi,lpdfr,xy,alrk,lao,agsi,ldy,nilf,llhr,alfi,laog,sly,aghi,bras,srda,lt,lbr,lzxr,lzdr,lzer")) "nothing")
+ (eq_attr "mnemonic" "ltg,ogrk,lr,lghrl,x,asi,lhr,ar,lhrl,llgfr,clghrl,cgr,cli,agrk,ic,lrv,clg,cy,cghi,sy,clgfr,al,tm,lang,lghr,laa,ark,lh,or,icy,xi,n,llihl,afi,cs,nrk,sth,lgr,l,lcr,stey,xg,crt,slgfr,ny,ld,j,llihh,slgr,clfhsi,slg,lb,lgrl,lrl,llihf,llcr,laxg,mvghi,rllg,xrk,laag,alhsik,algfi,algr,aly,agfi,lrvr,crl,llgc,tmhl,algsi,lgh,icmh,clhrl,xgrk,icm,iilf,ork,cg,ldgr,lgf,iihf,llghr,sg,stam,tmhh,slgf,basr,lgb,cgfi,lax,clfit,lrvgr,nihl,ni,srk,xihf,stgrl,sthrl,algf,cgit,ng,lat,llghrl,ltgr,nihh,clgfrl,srlk,agr,ler,bcr_flush,stcy,clfi,nihf,ly,clt,lgat,alg,lhy,lgfrl,clghsi,clrt,tmll,srlg,ay,sty,clr,lgfi,lan,clgt,ahik,sra,algrk,clgr,tmy,tmlh,alghsik,lcgr,mvi,ltgf,xr,larl,ldr,llgcr,clgrt,clrl,cghsi,cliy,oy,ogr,llgt,slr,chi,s,icmy,llc,ngr,clhhsi,ltgfr,llill,lhi,o,sll,clgrl,clgf,mviy,algfr,rll,lg,niy,st,sgr,ag,le,xgr,cr,stg,llilh,sr,cdsg,sllk,stoc,csg,clgit,chhsi,strl,llilf,lndfr,ngrk,clgfi,llgh,oill,la,llhrl,stc,lghi,oihl,xiy,sllg,llgf,cgrt,cl,sl,oi,oilh,nr,srak,oihh,ear,slgrk,og,c,slgfi,sthy,oilf,oiy,oihf,a,cfi,srag,brasl,alr,cgrl,llgfrl,cit,ley,exrl,lcdfr,lay,xilf,alsi,mvhhi,srl,chsi,lgfr,lrvg,cly,sgrk,ahi,nill,jg,slrk,lxr,sar,slfi,cpsdr,lcgfr,aghik,nilh,mvhi,lpdfr,xy,alrk,lao,agsi,ldy,nilf,llhr,alfi,laog,sly,aghi,bras,lt,lbr,lzxr,lzdr,lzer")) "nothing")
(define_insn_reservation "zEC12_simple_fp" 0
(and (eq_attr "cpu" "zEC12")
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "mhy")) "nothing")
-(define_insn_reservation "zEC12_dlr" 25
- (and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "dlr")) "nothing")
-
(define_insn_reservation "zEC12_ltxtr" 18
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "ltxtr")) "nothing")
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "cgf")) "nothing")
-(define_insn_reservation "zEC12_lmy" 0
- (and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "lmy")) "nothing")
-
(define_insn_reservation "zEC12_std" 3
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "std")) "nothing")
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "ex")) "nothing")
-(define_insn_reservation "zEC12_mfy" 7
- (and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "mfy")) "nothing")
-
(define_insn_reservation "zEC12_cxlgtr" 4
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "cxlgtr")) "nothing")
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "ltxbr")) "nothing")
-(define_insn_reservation "zEC12_dr" 16
- (and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "dr")) "nothing")
-
(define_insn_reservation "zEC12_lxdb" 3
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "lxdb")) "nothing")
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "agf")) "nothing")
-(define_insn_reservation "zEC12_lm" 0
- (and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "lm")) "nothing")
-
(define_insn_reservation "zEC12_msgfr" 6
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "msgfr")) "nothing")
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "lxdbr")) "nothing")
-(define_insn_reservation "zEC12_stm" 0
- (and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "stm")) "nothing")
-
(define_insn_reservation "zEC12_cgdtr" 2
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "cgdtr")) "nothing")
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "sqdbr")) "nothing")
-(define_insn_reservation "zEC12_dl" 25
- (and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "dl")) "nothing")
-
(define_insn_reservation "zEC12_cfebr" 2
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "cfebr")) "nothing")
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "lnr")) "nothing")
-(define_insn_reservation "zEC12_m" 7
- (and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "m")) "nothing")
-
(define_insn_reservation "zEC12_ipm" 3
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "ipm")) "nothing")
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "ddbr")) "nothing")
-(define_insn_reservation "zEC12_stmy" 0
- (and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "stmy")) "nothing")
-
(define_insn_reservation "zEC12_ste" 4
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "ste")) "nothing")
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "ahy")) "nothing")
-(define_insn_reservation "zEC12_mlr" 7
- (and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "mlr")) "nothing")
-
(define_insn_reservation "zEC12_sqeb" 29
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "sqeb")) "nothing")
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "axbr")) "nothing")
-(define_insn_reservation "zEC12_mr" 7
- (and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "mr")) "nothing")
-
(define_insn_reservation "zEC12_stmg" 0
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "stmg")) "nothing")
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "slbg")) "nothing")
-(define_insn_reservation "zEC12_ml" 7
- (and (eq_attr "cpu" "zEC12")
- (eq_attr "mnemonic" "ml")) "nothing")
-
(define_insn_reservation "zEC12_lam" 0
(and (eq_attr "cpu" "zEC12")
(eq_attr "mnemonic" "lam")) "nothing")
lgfrl,lgh,lghi,lghr,lghrl,lgr,lh,lhi,lhr,lhrl,lhy,llcr,llgfr,llghr,llgtr,\
llhr,llihf,llihh,llihl,llilf,llilh,llill,lngr,lnr,loc,locg,locghi,locgr,\
lochi,locr,lpgr,lpr,lr,lrv,lrvg,lrvgr,lrvh,lrvr,lt,ltg,ltgf,ltgfr,ltgr,ltr,\
-m,mfy,mghi,mh,mhi,mhy,ml,mlg,mlgr,mlr,mr,ms,msfi,msg,msgf,msgfi,msgfr,\
+mghi,mh,mhi,mhy,mlg,mlgr,ms,msfi,msg,msgf,msgfi,msgfr,\
msgr,msr,msy,n,ng,ngr,ngrk,nihf,nihh,nihl,nilf,nilh,nill,nr,nrk,ny,o,og,\
ogr,ogrk,oihf,oihh,oihl,oilf,oilh,oill,or,ork,oy,pfpo,popcnt,ppa,risbg,\
risbgn,rll,rllg,s,sg,sgf,sgfr,sgr,sgrk,sh,shy,sl,slb,slbg,slbgr,slbr,slfi,\
(const_int 1)] (const_int 0)))
(define_attr "z13_unit_fxd" ""
-(cond [(eq_attr "mnemonic" "dlgr,dlr,dr,dsgfr,dsgr")
+(cond [(eq_attr "mnemonic" "dlgr,dsgfr,dsgr")
(const_int 1)] (const_int 0)))
(define_attr "z13_unit_lsu" ""
cliy,clm,clmy,clrl,clt,cly,crl,cy,ddb,deb,ear,ic,icm,icmh,icmy,icy,l,laa,\
laag,lan,lang,lao,laog,lat,lax,laxg,lb,lcbb,ld,lde,ldeb,ldy,le,ley,lg,lgat,\
lgb,lgf,lgfrl,lgh,lghrl,lgrl,lh,lhrl,lhy,llc,llgc,llgf,llgfrl,llgh,llghrl,\
-llgt,llh,llhrl,loc,locg,lrl,lrv,lrvg,lrvh,lt,ltg,ltgf,ly,m,madb,maeb,meeb,\
-mfy,mh,mhy,ml,mlg,ms,msdb,mseb,msg,msgf,msy,mvghi,mvhhi,mvhi,mvi,mviy,n,\
+llgt,llh,llhrl,loc,locg,lrl,lrv,lrvg,lrvh,lt,ltg,ltgf,ly,madb,maeb,meeb,\
+mh,mhy,mlg,ms,msdb,mseb,msg,msgf,msy,mvghi,mvhhi,mvhi,mvi,mviy,n,\
ng,ni,niy,ntstg,ny,o,og,oi,oiy,oy,s,sar,sdb,seb,sfpc,sg,sgf,sh,shy,sl,\
slb,slbg,slg,slgf,sly,sqdb,sqeb,st,stc,stcy,std,stdy,ste,stey,stg,stgrl,\
sth,sthrl,sthy,stoc,stocg,strl,strv,strvg,strvh,sty,sy,tabort,tm,tmy,vl,\
(cond [(eq_attr "mnemonic" "bas,basr,cdfbr,cdftr,cdgbr,cdgtr,cdlfbr,\
cdlftr,cdlgbr,cdlgtr,cefbr,cegbr,celfbr,celgbr,cfdbr,cfebr,cfxbr,cgdbr,cgdtr,\
cgebr,cgxbr,cgxtr,chhsi,clfdbr,clfebr,clfxbr,clfxtr,clgdbr,clgdtr,clgebr,\
-clgxbr,clgxtr,cs,csg,csy,d,efpc,ex,lcgfr,lngfr,lpgfr,lpq,lxr,lzxr,rnsbg,\
+clgxbr,clgxtr,cs,csg,csy,efpc,ex,lcgfr,lngfr,lpgfr,lpq,lxr,lzxr,rnsbg,\
rosbg,rxsbg,stpq,vgef,vgeg,vscef,vsceg,vsteb")
(const_int 1)] (const_int 0)))
(define_attr "z13_expanded" ""
-(cond [(eq_attr "mnemonic" "cds,cdsg,cdsy,cxfbr,cxftr,cxgbr,cxgtr,\
-cxlftr,cxlgbr,cxlgtr,dl,dlg,dsg,dsgf,lam,lm,lmg,lmy,sldl,srda,srdl,stam,stm,\
-stmg,stmy,tbegin,tbeginc")
+(cond [(eq_attr "mnemonic" "cdsg,cxfbr,cxftr,cxgbr,cxgtr,\
+cxlftr,cxlgbr,cxlgtr,dlg,dsg,dsgf,lam,lmg,stam,\
+stmg,tbegin,tbeginc")
(const_int 1)] (const_int 0)))
(define_attr "z13_groupalone" ""
(cond [(eq_attr "mnemonic" "alc,alcg,alcgr,alcr,axbr,axtr,clc,cxbr,\
-cxtr,dlgr,dlr,dr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\
-lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,m,madb,maeb,maebr,mfy,ml,mlg,\
-mlgr,mlr,mr,msdb,mseb,msebr,mvc,mxbr,mxtr,oc,sfpc,slb,slbg,slbgr,slbr,\
+cxtr,dlgr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\
+lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,madb,maeb,maebr,mlg,\
+mlgr,msdb,mseb,msebr,mvc,mxbr,mxtr,oc,sfpc,slb,slbg,slbgr,slbr,\
sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc,kxbr,kxtr")
(const_int 1)] (const_int 0)))
llilf,llilh,llill,lndfr,lpdfr,lr,lrv,lrvg,lrvgr,lrvh,lrvr,lt,ltg,ltgf,ltgfr,\
ltgr,ltr,lzdr,lzer,n,ng,ngr,ngrk,nihf,nihh,nihl,nilf,nilh,nill,nop,nopr,nr,\
nrk,ny,o,og,ogr,ogrk,oihf,oihh,oihl,oilf,oilh,oill,or,ork,oy,pfpo,ppa,\
-risbg,risbgn,rll,rllg,s,sg,sgr,sgrk,sl,sldl,slfi,slg,slgf,slgfi,slgfr,slgr,\
-slgrk,sll,sllg,sllk,slr,slrk,sly,sr,sra,srag,srak,srda,srdl,srl,srlg,srlk,\
+risbg,risbgn,rll,rllg,s,sg,sgr,sgrk,sl,slfi,slg,slgf,slgfi,slgfr,slgr,\
+slgrk,sll,sllg,sllk,slr,slrk,sly,sr,sra,srag,srak,srl,srlg,srlk,\
sy,tm,tmh,tmhh,tmhl,tml,tmlh,tmll,tmy,vlr,vlvgb,vlvgf,vlvgg,vlvgh,x,xg,\
xgr,xgrk,xihf,xilf,xr,xrk,xy")) "nothing")
(define_insn_reservation "z13_2" 2
(and (eq_attr "cpu" "z13")
(eq_attr "mnemonic" "cdb,cdbr,cebr,ear,ipm,l,lcbb,lcdbr,lcebr,ld,lde,\
-ldy,lg,lgdr,lgrl,llc,llgc,llgf,llgfrl,llgh,llghrl,llgt,llh,llhrl,lm,lmg,\
-lmy,lndbr,lnebr,lpdbr,lpebr,lrl,ltdbr,ltebr,ly,popcnt,sar,tcdb,tceb,\
+ldy,lg,lgdr,lgrl,llc,llgc,llgf,llgfrl,llgh,llghrl,llgt,llh,llhrl,lmg,\
+lndbr,lnebr,lpdbr,lpebr,lrl,ltdbr,ltebr,ly,popcnt,sar,tcdb,tceb,\
vceqbs,vceqfs,vceqgs,vceqhs,vchbs,vchfs,vchgs,vchhs,vchlbs,vchlfs,vchlgs,\
vchlhs,vfcedbs,vfcesbs,vfchdbs,vfchedbs,vfchesbs,vfchsbs,vfeeb,vfeef,vfeeh,\
vfeneb,vfenef,vfeneh,vfenezb,vfenezf,vfenezh,vftcidb,vftcisb,vistrb,vistrf,\
(define_insn_reservation "z13_3" 3
(and (eq_attr "cpu" "z13")
-(eq_attr "mnemonic" "cds,cdsy,std,stdy,ste,stey,vcksm,vfeezbs,\
+(eq_attr "mnemonic" "std,stdy,ste,stey,vcksm,vfeezbs,\
vfeezhs,vgfmab,vgfmaf,vgfmag,vgfmah,vgfmb,vgfmf,vgfmg,vgfmh,vistrbs,vistrfs,\
vl,vlbb,vlgvf,vlgvg,vlgvh,vll,vmaeb,vmaef,vmaeh,vmahb,vmahf,vmahh,vmalb,\
vmaleb,vmalef,vmaleh,vmalf,vmalhb,vmalhf,vmalhh,vmalhw,vmalob,vmalof,vmaloh,\
(define_insn_reservation "z13_5" 5
(and (eq_attr "cpu" "z13")
(eq_attr "mnemonic" "alc,alcg,alcgr,alcr,cs,csg,csy,lngfr,lpgfr,ms,\
-msfi,msgf,msgfi,msgfr,msr,msy,rnsbg,rosbg,rxsbg,slb,slbg,slbgr,slbr,stm,\
-stmg,stmy")) "nothing")
+msfi,msgf,msgfi,msgfr,msr,msy,rnsbg,rosbg,rxsbg,slb,slbg,slbgr,slbr,\
+stmg")) "nothing")
(define_insn_reservation "z13_6" 6
(and (eq_attr "cpu" "z13")
(define_insn_reservation "z13_10" 10
(and (eq_attr "cpu" "z13")
(eq_attr "mnemonic" "cdfbr,cdgbr,cdlfbr,cdlgbr,cefbr,cegbr,celfbr,\
-celgbr,flogr,m,madb,maeb,maebr,mfy,ml,mlr,mr,msdb,mseb,msebr")) "nothing")
+celgbr,flogr,madb,maeb,maebr,msdb,mseb,msebr")) "nothing")
(define_insn_reservation "z13_11" 11
(and (eq_attr "cpu" "z13")
(define_insn_reservation "z13_20" 20
(and (eq_attr "cpu" "z13")
(eq_attr "mnemonic" "cdftr,cdgtr,cdlftr,cdlgtr,cgdtr,cgxtr,clfxtr,\
-clgdtr,clgxtr,cxftr,cxgtr,cxlftr,cxlgtr,d,ddb,ddbr,ddtr,deb,debr,dl,dlg,dlgr,\
-dlr,dr,dsg,dsgf,dsgfr,dsgr,dxbr,dxtr,efpc,mdtr,mxbr,mxtr,sqdb,sqdbr,sqeb,\
+clgdtr,clgxtr,cxftr,cxgtr,cxlftr,cxlgtr,ddb,ddbr,ddtr,deb,debr,dlg,dlgr,\
+dsg,dsgf,dsgfr,dsgr,dxbr,dxtr,efpc,mdtr,mxbr,mxtr,sqdb,sqdbr,sqeb,\
sqebr,sqxbr,vfddb,vfdsb,vfsqdb,vfsqsb,wfddb,wfdsb,wfdxb,wfsqdb,wfsqxb")) "nothing")
lgfr,lgfrl,lgh,lghi,lghr,lghrl,lgr,lh,lhi,lhr,lhrl,lhy,llcr,llgfr,llghr,\
llgtr,llhr,llihf,llihh,llihl,llilf,llilh,llill,lngr,lnr,loc,locg,locghi,\
locgr,lochi,locr,lpgr,lpr,lr,lrv,lrvg,lrvgr,lrvh,lrvr,lt,ltg,ltgf,ltgfr,\
-ltgr,ltr,m,mfy,mg,mgh,mghi,mgrk,mh,mhi,mhy,ml,mlg,mlgr,mlr,mr,ms,msfi,msg,\
+ltgr,ltr,mg,mgh,mghi,mgrk,mh,mhi,mhy,mlg,mlgr,ms,msfi,msg,\
msgf,msgfi,msgfr,msgr,msgrkc,msr,msrkc,msy,n,ng,ngr,ngrk,nihf,nihh,nihl,\
nilf,nilh,nill,nr,nrk,ny,o,og,ogr,ogrk,oihf,oihh,oihl,oilf,oilh,oill,or,\
ork,oy,pfpo,popcnt,risbg,risbgn,rll,rllg,s,sg,sgf,sgfr,sgh,sgr,sgrk,sh,\
(const_int 1)] (const_int 0)))
(define_attr "z14_unit_fxd" ""
-(cond [(eq_attr "mnemonic" "dlgr,dlr,dr,dsgfr,dsgr")
+(cond [(eq_attr "mnemonic" "dlgr,dsgfr,dsgr")
(const_int 1)] (const_int 0)))
(define_attr "z14_unit_lsu" ""
cli,cliy,clm,clmy,clrl,clt,cly,crl,cy,ddb,deb,ear,ic,icm,icmh,icmy,icy,l,\
laa,laag,lan,lang,lao,laog,lat,lax,laxg,lb,lcbb,ld,lde,ldeb,ldy,le,ley,lg,\
lgat,lgb,lgf,lgfrl,lgh,lghrl,lgrl,lh,lhrl,lhy,llc,llgc,llgf,llgfrl,llgh,\
-llghrl,llgt,llh,llhrl,loc,locg,lrl,lrv,lrvg,lrvh,lt,ltg,ltgf,ly,m,madb,maeb,\
-meeb,mfy,mg,mgh,mh,mhy,ml,mlg,ms,msdb,mseb,msg,msgf,msy,mvghi,mvhhi,mvhi,\
+llghrl,llgt,llh,llhrl,loc,locg,lrl,lrv,lrvg,lrvh,lt,ltg,ltgf,ly,madb,maeb,\
+meeb,mg,mgh,mh,mhy,mlg,ms,msdb,mseb,msg,msgf,msy,mvghi,mvhhi,mvhi,\
mvi,mviy,n,ng,ni,niy,ntstg,ny,o,og,oi,oiy,oy,s,sar,sdb,seb,sfpc,sg,sgf,\
sgh,sh,shy,sl,slb,slbg,slg,slgf,sly,sqdb,sqeb,st,stc,stcy,std,stdy,ste,\
stey,stg,stgrl,sth,sthrl,sthy,stoc,stocg,strl,strv,strvg,strvh,sty,sy,\
(cond [(eq_attr "mnemonic" "bas,basr,cdfbr,cdftr,cdgbr,cdgtr,cdlfbr,\
cdlftr,cdlgbr,cdlgtr,cefbr,cegbr,celfbr,celgbr,cfdbr,cfebr,cfxbr,cgdbr,cgdtr,\
cgebr,cgxbr,cgxtr,chhsi,clfdbr,clfebr,clfxbr,clfxtr,clgdbr,clgdtr,clgebr,\
-clgxbr,clgxtr,cs,csg,csy,d,efpc,ex,lcgfr,lngfr,lpgfr,lpq,lxr,lzxr,rxsbg,stpq,\
+clgxbr,clgxtr,cs,csg,csy,efpc,ex,lcgfr,lngfr,lpgfr,lpq,lxr,lzxr,rxsbg,stpq,\
vgef,vgeg,vscef,vsceg,vsteb")
(const_int 1)] (const_int 0)))
(define_attr "z14_expanded" ""
-(cond [(eq_attr "mnemonic" "cds,cdsg,cdsy,cxfbr,cxftr,cxgbr,cxgtr,\
-cxlftr,cxlgbr,cxlgtr,dl,dlg,dsg,dsgf,lam,lm,lmg,lmy,sldl,srda,srdl,stam,stm,\
-stmg,stmy,tbegin,tbeginc")
+(cond [(eq_attr "mnemonic" "cdsg,cxfbr,cxftr,cxgbr,cxgtr,\
+cxlftr,cxlgbr,cxlgtr,dlg,dsg,dsgf,lam,lmg,stam,\
+stmg,tbegin,tbeginc")
(const_int 1)] (const_int 0)))
(define_attr "z14_groupalone" ""
(cond [(eq_attr "mnemonic" "alc,alcg,alcgr,alcr,axbr,axtr,clc,cxbr,\
-cxtr,dlgr,dlr,dr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\
-lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,m,madb,maeb,maebr,mfy,mg,mgrk,\
-ml,mlg,mlgr,mlr,mr,msdb,mseb,msebr,mvc,mxbr,mxtr,oc,ppa,sfpc,slb,slbg,\
+cxtr,dlgr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\
+lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,madb,maeb,maebr,mg,mgrk,\
+mlg,mlgr,msdb,mseb,msebr,mvc,mxbr,mxtr,oc,ppa,sfpc,slb,slbg,\
slbgr,slbr,sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc,kxbr,kxtr")
(const_int 1)] (const_int 0)))
lrvh,lrvr,lt,ltg,ltgf,ltgfr,ltgr,ltr,lzdr,lzer,n,ng,ngr,ngrk,nihf,nihh,\
nihl,nilf,nilh,nill,nop,nopr,nr,nrk,ny,o,og,ogr,ogrk,oihf,oihh,oihl,oilf,\
oilh,oill,or,ork,oy,pfpo,risbg,risbgn,rll,rllg,rnsbg,rosbg,s,sg,sgr,sgrk,\
-sl,sldl,slfi,slg,slgf,slgfi,slgfr,slgr,slgrk,sll,sllg,sllk,slr,slrk,sly,\
-sr,sra,srag,srak,srda,srdl,srl,srlg,srlk,sy,tm,tmh,tmhh,tmhl,tml,tmlh,\
+sl,slfi,slg,slgf,slgfi,slgfr,slgr,slgrk,sll,sllg,sllk,slr,slrk,sly,\
+sr,sra,srag,srak,srl,srlg,srlk,sy,tm,tmh,tmhh,tmhl,tml,tmlh,\
tmll,tmy,vlr,vlvgb,vlvgf,vlvgg,vlvgh,x,xg,xgr,xgrk,xihf,xilf,xr,xrk,xy")) "nothing")
(define_insn_reservation "z14_1" 1
(define_insn_reservation "z14_2" 2
(and (eq_attr "cpu" "z14")
(eq_attr "mnemonic" "cdb,cdbr,cebr,ear,ipm,l,lcbb,lcdbr,lcebr,ld,lde,\
-ldy,lg,lgdr,lgrl,llc,llgc,llgf,llgfrl,llgh,llghrl,llgt,llh,llhrl,lm,lmg,\
-lmy,lndbr,lnebr,lpdbr,lpebr,lrl,ltdbr,ltebr,ly,popcnt,sar,tcdb,tceb,\
+ldy,lg,lgdr,lgrl,llc,llgc,llgf,llgfrl,llgh,llghrl,llgt,llh,llhrl,lmg,\
+lndbr,lnebr,lpdbr,lpebr,lrl,ltdbr,ltebr,ly,popcnt,sar,tcdb,tceb,\
vceqbs,vceqfs,vceqgs,vceqhs,vchbs,vchfs,vchgs,vchhs,vchlbs,vchlfs,vchlgs,\
vchlhs,vfcedbs,vfcesbs,vfchdbs,vfchedbs,vfchesbs,vfchsbs,vfeeb,vfeef,vfeeh,\
vfeneb,vfenef,vfeneh,vfenezb,vfenezf,vfenezh,vftcidb,vftcisb,vistrb,vistrf,\
(define_insn_reservation "z14_3" 3
(and (eq_attr "cpu" "z14")
-(eq_attr "mnemonic" "cds,cdsy,mgh,mghi,mh,mhi,mhy,std,stdy,ste,stey,\
+(eq_attr "mnemonic" "mgh,mghi,mh,mhi,mhy,std,stdy,ste,stey,\
vcksm,vfeezbs,vfeezhs,vgfmab,vgfmaf,vgfmag,vgfmah,vgfmb,vgfmf,vgfmg,vgfmh,\
vistrbs,vistrfs,vl,vlbb,vll,vlrlr,vmaeb,vmaef,vmaeh,vmahb,vmahf,vmahh,vmalb,\
vmaleb,vmalef,vmaleh,vmalf,vmalhb,vmalhf,vmalhh,vmalhw,vmalob,vmalof,vmaloh,\
(define_insn_reservation "z14_5" 5
(and (eq_attr "cpu" "z14")
(eq_attr "mnemonic" "alc,alcg,alcgr,alcr,cs,csg,csy,msrkc,slb,slbg,\
-slbgr,slbr,stm,stmg,stmy")) "nothing")
+slbgr,slbr,stmg")) "nothing")
(define_insn_reservation "z14_6" 6
(and (eq_attr "cpu" "z14")
(define_insn_reservation "z14_9" 9
(and (eq_attr "cpu" "z14")
-(eq_attr "mnemonic" "cxfbr,cxgbr,cxlgbr,m,mfy,ml,mlr,mr,stam,wfaxb,\
+(eq_attr "mnemonic" "cxfbr,cxgbr,cxlgbr,stam,wfaxb,\
wfixb,wfsxb")) "nothing")
(define_insn_reservation "z14_10" 10
(define_insn_reservation "z14_20" 20
(and (eq_attr "cpu" "z14")
(eq_attr "mnemonic" "cdftr,cdgtr,cdlftr,cdlgtr,cgdtr,cgxtr,clfxtr,\
-clgdtr,clgxtr,cxftr,cxgtr,cxlftr,cxlgtr,d,ddb,ddbr,ddtr,deb,debr,dl,dlg,dlgr,\
-dlr,dr,dsg,dsgf,dsgfr,dsgr,dxbr,dxtr,efpc,mdtr,mxbr,mxtr,sqdb,sqdbr,sqeb,\
+clgdtr,clgxtr,cxftr,cxgtr,cxlftr,cxlgtr,ddb,ddbr,ddtr,deb,debr,dlg,dlgr,\
+dsg,dsgf,dsgfr,dsgr,dxbr,dxtr,efpc,mdtr,mxbr,mxtr,sqdb,sqdbr,sqeb,\
sqebr,sqxbr,vfddb,vfdsb,vfsqdb,vfsqsb,wfddb,wfdsb,wfdxb,wfmaxb,wfmsxb,wfmxb,\
wfnmaxb,wfnmsxb,wfsqdb,wfsqxb")) "nothing")
ltgfr,
ltgr,
ltr,
-m,
-mfy,
mg,
mgh,
mghi,
mh,
mhi,
mhy,
-ml,
mlg,
mlgr,
-mlr,
-mr,
ms,
msc,
msfi,
(define_attr "z16_unit_fxd" ""
(cond [(eq_attr "mnemonic"
"dlgr,
-dlr,
-dr,
dsgfr,
dsgr"
)
ltg,
ltgf,
ly,
-m,
madb,
maeb,
mdb,
meeb,
-mfy,
mg,
mgh,
mh,
mhy,
-ml,
mlg,
ms,
msc,
cs,
csg,
csy,
-d,
efpc,
ex,
lcgfr,
(define_attr "z16_expanded" ""
(cond [(eq_attr "mnemonic"
-"cds,
-cdsg,
-cdsy,
+"cdsg,
cxfbr,
cxftr,
cxgbr,
cxlftr,
cxlgbr,
cxlgtr,
-dl,
dlg,
dsg,
dsgf,
lam,
-lm,
lmg,
-lmy,
-sldl,
-srda,
-srdl,
stam,
-stm,
stmg,
-stmy,
tbegin,
tbeginc"
)
cxbr,
cxtr,
dlgr,
-dlr,
-dr,
dsgfr,
dsgr,
dxbr,
lxdtr,
lxeb,
lxebr,
-m,
madb,
maeb,
maebr,
-mfy,
mg,
mgrk,
-ml,
mlg,
mlgr,
-mlr,
-mr,
msdb,
mseb,
msebr,
sgr,
sgrk,
sl,
-sldl,
slfi,
slg,
slgf,
sra,
srag,
srak,
-srda,
-srdl,
srk,
srl,
srlg,
llgt,
llh,
llhrl,
-lm,
lmg,
-lmy,
lndbr,
lnebr,
lpdbr,
(define_insn_reservation "z16_3" 3
(and (eq_attr "cpu" "z16")
(eq_attr "mnemonic"
-"cds,
-cdsy,
-mgh,
+"mgh,
mghi,
mh,
mhi,
slbg,
slbgr,
slbr,
-stm,
stmg,
-stmy,
vcdgb,
vcdlgb,
vcefb,
cxgbr,
cxlfbr,
cxlgbr,
-m,
madb,
maeb,
maebr,
-mfy,
-ml,
-mlr,
-mr,
msdb,
mseb,
msebr,
clgxtr,
cxgtr,
cxlgtr,
-d,
ddb,
ddbr,
ddtr,
deb,
debr,
-dl,
dlg,
dlgr,
-dlr,
-dr,
dsg,
dsgf,
dsgfr,
lgf,lgfi,lgfr,lgfrl,lgh,lghi,lghr,lghrl,lgr,lh,lhi,lhr,lhrl,lhy,llcr,\
llgcr,llgfr,llghr,llgtr,llhr,llihf,llihh,llihl,llilf,llilh,llill,lngr,lnr,\
loc,locg,locghi,locgr,lochi,locr,lpgr,lpr,lr,lrv,lrvg,lrvgr,lrvh,lrvr,lt,\
-ltg,ltgf,ltgfr,ltgr,ltr,m,mfy,mg,mgh,mghi,mgrk,mh,mhi,mhy,ml,mlg,mlgr,mlr,\
-mr,ms,msfi,msg,msgf,msgfi,msgfr,msgr,msgrkc,msr,msrkc,msy,n,ng,ngr,ngrk,\
+ltg,ltgf,ltgfr,ltgr,ltr,mg,mgh,mghi,mgrk,mh,mhi,mhy,mlg,mlgr,\
+ms,msfi,msg,msgf,msgfi,msgfr,msgr,msgrkc,msr,msrkc,msy,n,ng,ngr,ngrk,\
nihf,nihh,nihl,nilf,nilh,nill,nr,nrk,ny,o,og,ogr,ogrk,oihf,oihh,oihl,oilf,\
oilh,oill,or,ork,oy,pfpo,popcnt,risbg,risbgn,rll,rllg,s,sg,sgf,sgfr,sgh,\
sgr,sgrk,sh,shy,sl,slb,slbg,slbgr,slbr,slfi,slg,slgf,slgfi,slgfr,slgr,\
(const_int 1)] (const_int 0)))
(define_attr "z15_unit_fxd" ""
-(cond [(eq_attr "mnemonic" "dlgr,dlr,dr,dsgfr,dsgr")
+(cond [(eq_attr "mnemonic" "dlgr,dsgfr,dsgr")
(const_int 1)] (const_int 0)))
(define_attr "z15_unit_lsu" ""
icmh,icmy,icy,l,laa,laag,lan,lang,lao,laog,lat,lax,laxg,lb,lcbb,ld,lde,\
ldeb,ldy,le,ley,lg,lgat,lgb,lgf,lgfrl,lgh,lghrl,lgrl,lh,lhrl,lhy,llc,llgc,\
llgf,llgfrl,llgh,llghrl,llgt,llh,llhrl,loc,locg,lrl,lrv,lrvg,lrvh,lt,ltg,\
-ltgf,ly,m,madb,maeb,mdb,meeb,mfy,mg,mgh,mh,mhy,ml,mlg,ms,msdb,mseb,msg,\
+ltgf,ly,madb,maeb,mdb,meeb,mg,mgh,mh,mhy,mlg,ms,msdb,mseb,msg,\
msgf,msy,mvghi,mvhhi,mvhi,mvi,mviy,n,ng,ni,niy,ntstg,ny,o,og,oi,oiy,oy,s,\
sar,sdb,seb,sfpc,sg,sgf,sgh,sh,shy,sl,slb,slbg,slg,slgf,sly,sqdb,sqeb,st,\
stc,stcy,std,stdy,ste,stey,stg,stgrl,sth,sthrl,sthy,stoc,stocg,strl,strv,\
(cond [(eq_attr "mnemonic" "bas,basr,cdfbr,cdftr,cdgbr,cdgtr,cdlfbr,\
cdlftr,cdlgbr,cdlgtr,cefbr,cegbr,celfbr,celgbr,cfdbr,cfebr,cfxbr,cgdbr,cgdtr,\
cgebr,cgxbr,cgxtr,chhsi,clfdbr,clfdtr,clfebr,clfxbr,clfxtr,clgdbr,clgdtr,\
-clgebr,clgxbr,clgxtr,cs,csg,csy,d,efpc,ex,lcgfr,lngfr,lpgfr,lpq,lxr,lzxr,\
+clgebr,clgxbr,clgxtr,cs,csg,csy,efpc,ex,lcgfr,lngfr,lpgfr,lpq,lxr,lzxr,\
rxsbg,stpq,vgef,vgeg,vscef,vsceg,vsteb,vsteh")
(const_int 1)] (const_int 0)))
(define_attr "z15_expanded" ""
-(cond [(eq_attr "mnemonic" "cds,cdsg,cdsy,cxfbr,cxftr,cxgbr,cxgtr,\
-cxlfbr,cxlftr,cxlgbr,cxlgtr,dl,dlg,dsg,dsgf,lam,lm,lmg,lmy,sldl,srda,srdl,\
-stam,stm,stmg,stmy,tbegin,tbeginc")
+(cond [(eq_attr "mnemonic" "cdsg,cxfbr,cxftr,cxgbr,cxgtr,\
+cxlfbr,cxlftr,cxlgbr,cxlgtr,dlg,dsg,dsgf,lam,lmg,\
+stam,stmg,tbegin,tbeginc")
(const_int 1)] (const_int 0)))
(define_attr "z15_groupalone" ""
(cond [(eq_attr "mnemonic" "alc,alcg,alcgr,alcr,axbr,axtr,clc,cxbr,\
-cxtr,dlgr,dlr,dr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\
-lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,m,madb,maeb,maebr,mfy,mg,mgrk,\
-ml,mlg,mlgr,mlr,mr,msdb,mseb,msebr,mvc,mxbr,mxtr,nc,oc,ppa,sfpc,slb,slbg,\
+cxtr,dlgr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\
+lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,madb,maeb,maebr,mg,mgrk,\
+mlg,mlgr,msdb,mseb,msebr,mvc,mxbr,mxtr,nc,oc,ppa,sfpc,slb,slbg,\
slbgr,slbr,sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc,kxbr,kxtr")
(const_int 1)] (const_int 0)))
lrv,lrvg,lrvgr,lrvh,lrvr,lt,ltg,ltgf,ltgfr,ltgr,ltr,lzdr,lzer,n,ng,ngr,\
ngrk,nihf,nihh,nihl,nilf,nilh,nill,nop,nopr,nr,nrk,ny,o,og,ogr,ogrk,oihf,\
oihh,oihl,oilf,oilh,oill,or,ork,oy,pfpo,risbg,risbgn,rll,rllg,rnsbg,rosbg,\
-s,sg,sgr,sgrk,sl,sldl,slfi,slg,slgf,slgfi,slgfr,slgr,slgrk,sll,sllg,\
-sllk,slr,slrk,sly,sr,sra,srag,srak,srda,srdl,srk,srl,srlg,srlk,sy,tm,tmh,\
+s,sg,sgr,sgrk,sl,slfi,slg,slgf,slgfi,slgfr,slgr,slgrk,sll,sllg,\
+sllk,slr,slrk,sly,sr,sra,srag,srak,srk,srl,srlg,srlk,sy,tm,tmh,\
tmhh,tmhl,tml,tmlh,tmll,tmy,vlr,vlvgb,vlvgf,vlvgg,vlvgh,x,xg,xgr,xgrk,xihf,\
xilf,xr,xrk,xy")) "nothing")
(define_insn_reservation "z15_2" 2
(and (eq_attr "cpu" "z15")
(eq_attr "mnemonic" "cdb,cdbr,ceb,cebr,ear,ipm,l,lcbb,lcdbr,lcebr,ld,\
-lde,ldy,lg,lgdr,lgrl,llc,llgc,llgf,llgfrl,llgh,llghrl,llgt,llh,llhrl,lm,\
-lmg,lmy,lndbr,lnebr,lpdbr,lpebr,lrl,ltdbr,ltebr,ly,popcnt,sar,tcdb,tceb,\
+lde,ldy,lg,lgdr,lgrl,llc,llgc,llgf,llgfrl,llgh,llghrl,llgt,llh,llhrl,\
+lmg,lndbr,lnebr,lpdbr,lpebr,lrl,ltdbr,ltebr,ly,popcnt,sar,tcdb,tceb,\
vceqbs,vceqfs,vceqgs,vceqhs,vchbs,vchfs,vchgs,vchhs,vchlbs,vchlfs,vchlgs,\
vchlhs,vfcedbs,vfcesbs,vfchdbs,vfchedbs,vfchesbs,vfchsbs,vfeeb,vfeef,vfeeh,\
vfeneb,vfenef,vfeneh,vfenezb,vfenezf,vfenezh,vftcidb,vftcisb,vistrb,vistrf,\
(define_insn_reservation "z15_3" 3
(and (eq_attr "cpu" "z15")
-(eq_attr "mnemonic" "cds,cdsy,mgh,mghi,mh,mhi,mhy,std,stdy,ste,stey,\
+(eq_attr "mnemonic" "mgh,mghi,mh,mhi,mhy,std,stdy,ste,stey,\
vcksm,vfeezbs,vfeezfs,vfeezhs,vgfmab,vgfmaf,vgfmag,vgfmah,vgfmb,vgfmf,vgfmg,\
vgfmh,vistrbs,vistrfs,vistrhs,vl,vlbb,vll,vlrlr,vmaeb,vmaef,vmaeh,vmahb,\
vmahf,vmahh,vmalb,vmaleb,vmalef,vmaleh,vmalf,vmalhb,vmalhf,vmalhh,vmalhw,\
(and (eq_attr "cpu" "z15")
(eq_attr "mnemonic" "adb,adbr,aeb,aebr,alc,alcg,alcgr,alcr,cs,csg,\
csy,fidbr,fidbra,fiebr,fiebra,ldeb,ldebr,ledbr,madbr,mdb,mdbr,meeb,meebr,\
-msdbr,msrkc,sdb,sdbr,seb,sebr,slb,slbg,slbgr,slbr,stm,stmg,stmy,vfadb,vfasb,\
+msdbr,msrkc,sdb,sdbr,seb,sebr,slb,slbg,slbgr,slbr,stmg,vfadb,vfasb,\
vfidb,vfisb,vfmadb,vfmasb,vfmdb,vfmsb,vfmsdb,vfmssb,vfnmadb,vfnmasb,vfnmsdb,\
vfnmssb,vfsdb,vfssb,vldeb,vledb,vmslg,wfadb,wfasb,wfidb,wfisb,wflld,wfmadb,\
wfmasb,wfmdb,wfmsb,wfmsdb,wfmssb,wfsdb,wfssb,wldeb,wledb")) "nothing")
(define_insn_reservation "z15_9" 9
(and (eq_attr "cpu" "z15")
(eq_attr "mnemonic" "cdfbr,cdgbr,cdlfbr,cdlgbr,cefbr,cegbr,celfbr,\
-celgbr,cxfbr,cxgbr,cxlfbr,cxlgbr,m,madb,maeb,maebr,mfy,ml,mlr,mr,msdb,mseb,\
+celgbr,cxfbr,cxgbr,cxlfbr,cxlgbr,madb,maeb,maebr,msdb,mseb,\
msebr,stam,wfaxb,wfixb,wfsxb")) "nothing")
(define_insn_reservation "z15_10" 10
(define_insn_reservation "z15_20" 20
(and (eq_attr "cpu" "z15")
(eq_attr "mnemonic" "cdgtr,cdlgtr,cgdtr,cgxtr,clfdtr,clfxtr,clgdtr,\
-clgxtr,cxgtr,cxlgtr,d,ddb,ddbr,ddtr,deb,debr,dl,dlg,dlgr,dlr,dr,dsg,dsgf,\
+clgxtr,cxgtr,cxlgtr,ddb,ddbr,ddtr,deb,debr,dlg,dlgr,dsg,dsgf,\
dsgfr,dsgr,dxbr,dxtr,efpc,mdtr,mxbr,mxtr,sqdb,sqdbr,sqeb,sqebr,sqxbr,vfddb,\
vfdsb,vfsqdb,vfsqsb,wfddb,wfdsb,wfdxb,wfmaxb,wfmsxb,wfmxb,wfnmaxb,wfnmsxb,\
wfsqdb,wfsqxb")) "nothing")
lgfi,lgfr,lgfrl,lgh,lghi,lghr,lghrl,lgr,lh,lhi,lhr,lhrl,lhy,llcr,llgcr,llgfr,\
llghr,llgtr,llhr,llihf,llihh,llihl,llilf,llilh,llill,llxab,llxaf,llxag,llxah,\
llxaq,lngfr,lngr,lnr,loc,locg,locghi,locgr,lochi,locr,lpgfr,lpgr,lpr,lr,lrv,\
-lrvg,lrvgr,lrvh,lrvr,lt,ltg,ltgf,ltgfr,ltgr,ltr,lxab,lxaf,lxag,lxah,lxaq,m,mfy,\
-mg,mgh,mghi,mgrk,mh,mhi,mhy,ml,mlg,mlgr,mlr,mr,ms,msc,msfi,msg,msgc,msgf,msgfi,\
+lrvg,lrvgr,lrvh,lrvr,lt,ltg,ltgf,ltgfr,ltgr,ltr,lxab,lxaf,lxag,lxah,lxaq,\
+mg,mgh,mghi,mgrk,mh,mhi,mhy,mlg,mlgr,ms,msc,msfi,msg,msgc,msgf,msgfi,\
msgfr,msgr,msgrkc,msr,msrkc,msy,n,ncgrk,ncrk,ng,ngr,ngrk,nihf,nihh,nihl,nilf,\
nilh,nill,nngrk,nnrk,nogrk,nork,nr,nrk,nxgrk,nxrk,ny,o,ocgrk,ocrk,og,ogr,ogrk,\
oihf,oihh,oihl,oilf,oilh,oill,or,ork,oy,pfpo,popcnt,risbg,risbgn,rll,rllg,\
rnsbg,rosbg,rxsbg,s,selgr,selr,sg,sgf,sgfr,sgh,sgr,sgrk,sh,shy,sl,slb,slbg,\
-slbgr,slbr,sldl,slfi,slg,slgf,slgfi,slgfr,slgr,slgrk,sll,sllg,sllk,slr,slrk,\
-sly,sr,sra,srag,srak,srda,srdl,srk,srl,srlg,srlk,sy,x,xg,xgr,xgrk,xihf,xilf,xr,\
+slbgr,slbr,slfi,slg,slgf,slgfi,slgfr,slgr,slgrk,sll,sllg,sllk,slr,slrk,\
+sly,sr,sra,srag,srak,srk,srl,srlg,srlk,sy,x,xg,xgr,xgrk,xihf,xilf,xr,\
xrk,xy")
(const_int 1)] (const_int 0)))
(const_int 1)] (const_int 0)))
(define_attr "z17_unit_fxd" ""
- (cond [(eq_attr "mnemonic" "dlgr,dlr,dr,dsgfr,dsgr")
+ (cond [(eq_attr "mnemonic" "dlgr,dsgfr,dsgr")
(const_int 1)] (const_int 0)))
(define_attr "z17_unit_lsu" ""
(cond [(eq_attr "mnemonic" "clc,ear,l,lam,lcbb,ld,lde,ldy,lg,lgrl,llc,llgc,\
-llgf,llgfrl,llgh,llghrl,llgt,llh,llhrl,lm,lmg,lmy,lpq,lrl,ly,mvcrl,sar,sfpc,\
+llgf,llgfrl,llgh,llghrl,llgt,llh,llhrl,lmg,lpq,lrl,ly,mvcrl,sar,sfpc,\
tabort,vl,vlbb,vlbrf,vlbrg,vlbrh,vlbrq,vlbrrepf,vlbrrepg,vlbrreph,vlerf,vlerg,\
vlerh,vll,vllebrzf,vllebrzg,vllebrzh,vllezb,vllezf,vllezg,vllezh,vllezlf,\
vlrepb,vlrepf,vlrepg,vlreph,vlrl,vlrlr")
(const_int 1)] (const_int 0)))
(define_attr "z17_expanded" ""
- (cond [(eq_attr "mnemonic" "cds,cdsg,cdsy,cxfbr,cxftr,cxgbr,cxgtr,cxlfbr,\
-cxlftr,cxlgbr,cxlgtr,d,dl,dlg,dsg,dsgf,lam,lm,lmg,lmy,sldl,srda,srdl,stam,stm,\
-stmg,stmy,tbegin,tbeginc")
+ (cond [(eq_attr "mnemonic" "cdsg,cxfbr,cxftr,cxgbr,cxgtr,cxlfbr,\
+cxlftr,cxlgbr,cxlgtr,dlg,dsg,dsgf,lam,lmg,stam,\
+stmg,tbegin,tbeginc")
(const_int 1)] (const_int 0)))
(define_attr "z17_groupalone" ""
(cond [(eq_attr "mnemonic" "alc,alcg,alcgr,alcr,axbr,axtr,clc,cxbr,cxfbr,\
-cxftr,cxgbr,cxgtr,cxlfbr,cxlftr,cxlgbr,cxlgtr,cxtr,d,dl,dlg,dlgr,dlr,dr,dsg,\
+cxftr,cxgbr,cxgtr,cxlfbr,cxlftr,cxlgbr,cxlgtr,cxtr,dlg,dlgr,dsg,\
dsgf,dsgfr,dsgr,dxbr,dxtr,ex,exrl,fixbr,fixbra,fixtr,flogr,kxbr,kxtr,lcxbr,\
-lnxbr,lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,m,madb,maeb,maebr,mfy,mg,\
-mgrk,ml,mlg,mlgr,mlr,mr,msdb,mseb,msebr,mvc,mvcrl,mxbr,mxtr,nc,oc,ppa,sfpc,slb,\
+lnxbr,lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,madb,maeb,maebr,mg,\
+mgrk,mlg,mlgr,msdb,mseb,msebr,mvc,mvcrl,mxbr,mxtr,nc,oc,ppa,sfpc,slb,\
slbg,slbgr,slbr,sqxbr,sxbr,sxtr,tabort,tbegin,tbeginc,tcxb,tdcxt,tend,xc")
(const_int 1)] (const_int 0)))
(define_attr "z17_endgroup" ""
(cond [(eq_attr "mnemonic" "bas,basr,bcr,br,bras,brasl,cdsg,clfebr,cs,csg,csy,\
-efpc,ex,exrl,ipm,lam,lpq,lxr,nopr,sldl,srda,srdl,stam,stm,stmg,stmy,tbegin,\
+efpc,ex,exrl,ipm,lam,lpq,lxr,nopr,stam,stmg,tbegin,\
tbeginc")
(const_int 1)] (const_int 0)))
lngr,lnr,lpdfr,lpgr,lpr,lr,lrv,lrvg,lrvgr,lrvh,lrvr,lt,ltg,ltgf,ltgfr,ltgr,ltr,\
lzdr,lzer,n,ncgrk,ncrk,ng,ngr,ngrk,nihf,nihh,nihl,nilf,nilh,nill,nngrk,nnrk,\
nogrk,nop,nopr,nork,nr,nrk,nxgrk,nxrk,ny,o,ocgrk,ocrk,og,ogr,ogrk,oihf,oihh,\
-oihl,oilf,oilh,oill,or,ork,oy,pfpo,risbg,risbgn,rll,rllg,s,sg,sgr,sgrk,sl,sldl,\
+oihl,oilf,oilh,oill,or,ork,oy,pfpo,risbg,risbgn,rll,rllg,s,sg,sgr,sgrk,sl,\
slfi,slg,slgf,slgfi,slgfr,slgr,slgrk,sll,sllg,sllk,slr,slrk,sly,sr,sra,srag,\
-srak,srda,srdl,srk,srl,srlg,srlk,sy,tm,tmh,tmhh,tmhl,tml,tmlh,tmll,tmy,vlr,\
+srak,srk,srl,srlg,srlk,sy,tm,tmh,tmhh,tmhl,tml,tmlh,tmll,tmy,vlr,\
vlvgb,vlvgf,vlvgg,vlvgh,x,xg,xgr,xgrk,xihf,xilf,xr,xrk,xy")) "nothing")
(define_insn_reservation "z17_1" 1
(and (eq_attr "cpu" "z17")
(eq_attr "mnemonic" "cdb,cdbr,ceb,cebr,clzg,ctzg,ear,ipm,kdb,kdbr,keb,kebr,l,\
lcbb,lcdbr,lcebr,ld,lde,ldy,lg,lgdr,lgrl,llc,llgc,llgf,llgfrl,llgh,llghrl,llgt,\
-llh,llhrl,lm,lmg,lmy,lndbr,lnebr,lpdbr,lpebr,lrl,ltdbr,ltebr,ly,popcnt,sar,\
+llh,llhrl,lmg,lndbr,lnebr,lpdbr,lpebr,lrl,ltdbr,ltebr,ly,popcnt,sar,\
tcdb,tceb,vfeeb,vfeef,vfeeh,vfeezbs,vfeezfs,vfeezhs,vfeneb,vfenef,vfeneh,\
vfenezb,vfenezf,vfenezh,vftcidb,vftcisb,vistrb,vistrbs,vistrf,vistrfs,vistrh,\
vistrhs,vlbrrepf,vlbrrepg,vlbrreph,vlgvb,vlgvf,vlgvg,vlgvh,vllebrzf,vllebrzg,\
(define_insn_reservation "z17_3" 3
(and (eq_attr "cpu" "z17")
- (eq_attr "mnemonic" "bdepg,bextg,cds,cdsy,mgh,mghi,mh,mhi,mhy,ms,msc,msfi,msg,\
+ (eq_attr "mnemonic" "bdepg,bextg,mgh,mghi,mh,mhi,mhy,ms,msc,msfi,msg,\
msgc,msgf,msgfi,msgfr,msgr,msgrkc,msr,msrkc,msy,std,stdy,ste,stey,vcksm,vgfmab,\
vgfmaf,vgfmag,vgfmah,vgfmb,vgfmf,vgfmg,vgfmh,vl,vlbb,vlbrf,vlbrg,vlbrh,vlbrq,\
vlerf,vlerg,vlerh,vll,vlrlr,vmaeb,vmaef,vmaeg,vmaeh,vmahb,vmahf,vmahg,vmahh,\
(and (eq_attr "cpu" "z17")
(eq_attr "mnemonic" "adb,adbr,aeb,aebr,alc,alcg,alcgr,alcr,cs,csg,csy,fidbr,\
fidbra,fiebr,fiebra,ldeb,ldebr,ledbr,madbr,mdb,mdbr,meeb,meebr,msdbr,sdb,sdbr,\
-seb,sebr,slb,slbg,slbgr,slbr,stm,stmg,stmy,vcdgb,vcdlgb,vcefb,vcelfb,vcfeb,\
+seb,sebr,slb,slbg,slbgr,slbr,stmg,vcdgb,vcdlgb,vcefb,vcelfb,vcfeb,\
vcgdb,vclfeb,vclgdb,vldeb,vledb,vmslg,wcdgb,wcdlgb,wcefb,wcelfb,wcfeb,wcgdb,\
wclfeb,wclgdb,wflld,wflrx,wldeb,wledb")) "nothing")
(define_insn_reservation "z17_8" 8
(and (eq_attr "cpu" "z17")
- (eq_attr "mnemonic" "cdgtr,cdlgtr,cdsg,cxgtr,cxlgtr,flogr,lpq,m,mfy,mg,mgrk,\
-ml,mlg,mlgr,mlr,mr,stpq,vsteb,vstebrh,vsteh")) "nothing")
+ (eq_attr "mnemonic" "cdgtr,cdlgtr,cdsg,cxgtr,cxlgtr,flogr,lpq,mg,mgrk,\
+mlg,mlgr,stpq,vsteb,vstebrh,vsteh")) "nothing")
(define_insn_reservation "z17_9" 9
(and (eq_attr "cpu" "z17")
(define_insn_reservation "z17_10" 10
(and (eq_attr "cpu" "z17")
- (eq_attr "mnemonic" "cgdtr,cgxtr,clfdtr,clfxtr,clgdtr,clgxtr,d,dl,dlg,dsg,\
+ (eq_attr "mnemonic" "cgdtr,cgxtr,clfdtr,clfxtr,clgdtr,clgxtr,dlg,dsg,\
dsgf,efpc,lxdb,lxdbr,lxeb,lxebr,vscef,vsceg")) "nothing")
(define_insn_reservation "z17_11" 11
(define_insn_reservation "z17_20" 20
(and (eq_attr "cpu" "z17")
- (eq_attr "mnemonic" "ddb,ddbr,ddtr,deb,debr,dlgr,dlr,dr,dsgfr,dsgr,dxbr,dxtr,\
+ (eq_attr "mnemonic" "ddb,ddbr,ddtr,deb,debr,dlgr,dsgfr,dsgr,dxbr,dxtr,\
mdtr,mvc,mxbr,mxtr,sqdb,sqdbr,sqeb,sqebr,sqxbr,vdf,vdg,vdlf,vdlg,vdlq,vdq,\
vfddb,vfdsb,vfmadb,vfmasb,vfmdb,vfmsb,vfmsdb,vfmssb,vfnmadb,vfnmasb,vfnmsdb,\
vfnmssb,vfsqdb,vfsqsb,vrf,vrg,vrlf,vrlg,vrlq,vrq,wfddb,wfdsb,wfdxb,wfmadb,\
(match_test "s390_mem_constraint (\"ZT\", op)"))
(define_constraint "ZL"
- "LARL operand when in 64-bit mode, otherwise nothing."
- (match_test "TARGET_64BIT && larl_operand (op, VOIDmode)"))
+ "LARL operand."
+ (match_test "larl_operand (op, VOIDmode)"))
;; This constraint must behave like "i", in particular, the matching values
;; must never be placed into registers or memory by
unsigned int has_features;
unsigned int has_processor;
unsigned int is_cpu_z9_109 = 0;
- unsigned int has_highgprs = 0;
unsigned int has_dfp = 0;
unsigned int has_te = 0;
unsigned int has_vx = 0;
- unsigned int has_opt_esa_zarch = 0;
- int i;
if (argc < 1)
return NULL;
arch = strcmp (argv[0], "arch") == 0;
if (!arch && strcmp (argv[0], "tune"))
return NULL;
- for (i = 1; i < argc; i++)
- if (strcmp (argv[i], "mesa_mzarch") == 0)
- has_opt_esa_zarch = 1;
f = fopen ("/proc/cpuinfo", "r");
if (f == NULL)
has_te = 1;
else if (i == 2 && startswith (p, "vx"))
has_vx = 1;
- else if (i == 8 && startswith (p, "highgprs"))
- has_highgprs = 1;
p += i;
}
has_features = 1;
{
const char *opt_htm = "";
const char *opt_vx = "";
- const char *opt_esa_zarch = "";
/* We may switch off these cpu features but never switch the on
explicitly. This overrides options specified on the command line. */
opt_htm = " -mno-htm";
if (!has_vx)
opt_vx = " -mno-vx";
- /* However, we set -mzarch only if neither -mzarch nor -mesa are used on
- the command line. This allows the user to switch to -mesa manually.
- */
- if (!has_opt_esa_zarch && has_highgprs)
- opt_esa_zarch = " -mzarch";
- options = concat (options, opt_htm, opt_vx, opt_esa_zarch, NULL);
+ options = concat (options, opt_htm, opt_vx, NULL);
}
if (has_dfp && is_cpu_z9_109)
cpu = "z9-ec";
__TM_failure_address (void* const tdb_ptr)
{
struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;
-#ifdef __s390x__
return tdb->atia;
-#else
- return tdb->atia & 0xffffffff;
-#endif
}
extern __inline long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
/* Target specific type definitions. */
-/* For 31 bit our size type differs from most other targets (where it
- is "unsigned int"). The difference tends to cause trouble e.g.:
- Glibc BZ #16712, GCC BZ #79358 but cannot be changed due to ABI
- issues. */
#undef SIZE_TYPE
#define SIZE_TYPE "long unsigned int"
#undef PTRDIFF_TYPE
-#define PTRDIFF_TYPE (TARGET_64BIT ? "long int" : "int")
+#define PTRDIFF_TYPE "long int"
#undef WCHAR_TYPE
#define WCHAR_TYPE "int"
/* Target specific assembler settings. */
/* Rewrite -march=arch* options to the original CPU name in order to
- make it work with older binutils. */
+ make it work with older binutils. The spec is incomplete in the sense that
+ it passes -march=z* but filters -march=archX with X>11 out. However,
+ starting with binutils 2.22 the .machine pseudo-op is supported which
+ overrides command line option -march anyway. */
#undef ASM_SPEC
#define ASM_SPEC \
- "%{m31&m64}%{mesa&mzarch}%{march=z*}" \
+ "%{march=z*}" \
"%{march=arch5:-march=z900}" \
"%{march=arch6:-march=z990}" \
"%{march=arch7:-march=z9-ec}" \
/* Target specific linker settings. */
-#ifdef DEFAULT_TARGET_64BIT
#define MULTILIB_DEFAULTS { "m64" }
-#else
-#define MULTILIB_DEFAULTS { "m31" }
-#endif
-#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
#define GLIBC_DYNAMIC_LINKER64 "/lib/ld64.so.1"
-#undef MUSL_DYNAMIC_LINKER32
-#define MUSL_DYNAMIC_LINKER32 "/lib/ld-musl-s390.so.1"
#undef MUSL_DYNAMIC_LINKER64
#define MUSL_DYNAMIC_LINKER64 "/lib/ld-musl-s390x.so.1"
#undef LINK_SPEC
#define LINK_SPEC \
- "%{m31:-m elf_s390}%{m64:-m elf64_s390} \
+ "-m elf64_s390 \
%{shared:-shared} \
%{!shared: \
%{static:-static} \
%{!static:%{!static-pie: \
%{rdynamic:-export-dynamic} \
- %{m31:-dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "} \
- %{m64:-dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}}} \
+ -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}} \
%{static-pie:-static -pie --no-dynamic-linker -z text}"
#define CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}"
#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
#ifdef TARGET_LIBC_PROVIDES_SSP
-/* s390 glibc provides __stack_chk_guard in 0x14(tp),
- s390x glibc provides it at 0x28(tp). */
-#define TARGET_THREAD_SSP_OFFSET (TARGET_64BIT ? 0x28 : 0x14)
+#define TARGET_THREAD_SSP_OFFSET 0x28
#endif
/* Define if long doubles should be mangled as 'g'. */
})
;; Return true if OP is a valid operand for the BRAS instruction.
-;; Allow SYMBOL_REFs and @PLT stubs.
(define_special_predicate "bras_sym_operand"
- (ior (and (match_code "symbol_ref")
- (ior (match_test "!flag_pic")
- (match_test "SYMBOL_REF_LOCAL_P (op)")
- (and (match_test "TARGET_64BIT")
- (match_test "SYMBOL_REF_FUNCTION_P (op)"))))
- (and (match_code "const")
- (and (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
- (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_PLT31")))))
+ (and (match_code "symbol_ref")
+ (ior (match_test "!flag_pic")
+ (match_test "SYMBOL_REF_LOCAL_P (op)")
+ (match_test "SYMBOL_REF_FUNCTION_P (op)"))))
;; Return true if OP is a PLUS that is not a legitimate
;; operand for the LA instruction.
if (GET_CODE (op) == UNSPEC
&& XINT (op, 1) == UNSPEC_GOTENT)
return true;
- if (GET_CODE (op) == UNSPEC
- && XINT (op, 1) == UNSPEC_PLT31)
- return true;
if (GET_CODE (op) == UNSPEC
&& XINT (op, 1) == UNSPEC_INDNTPOFF)
return true;
OB_DEF_VAR (s390_vec_scatter_element_flt,s390_vscef, B_VXE, O4_U2, BT_OV_VOID_V4SF_UV4SI_FLTPTR_ULONGLONG)
OB_DEF_VAR (s390_vec_scatter_element_dbl,s390_vsceg, 0, O4_U1, BT_OV_VOID_V2DF_UV2DI_DBLPTR_ULONGLONG)
-B_DEF (s390_vscef, vec_scatter_elementv4si,0, B_VX, O4_U2, BT_FN_VOID_UV4SI_UV4SI_UINTPTR_ULONGLONG)
-B_DEF (s390_vsceg, vec_scatter_elementv2di,0, B_VX, O4_U1, BT_FN_VOID_UV2DI_UV2DI_ULONGLONGPTR_ULONGLONG)
+B_DEF (s390_vscef, vec_scatter_elementv4si_DI,0, B_VX, O4_U2, BT_FN_VOID_UV4SI_UV4SI_UINTPTR_ULONGLONG)
+B_DEF (s390_vsceg, vec_scatter_elementv2di_DI,0, B_VX, O4_U1, BT_FN_VOID_UV2DI_UV2DI_ULONGLONGPTR_ULONGLONG)
/* First two operands are swapped in s390-c.cc */
OB_DEF (s390_vec_sel, s390_vec_sel_b8_a, s390_vec_sel_dbl_b, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
cpp_assert (pfile, "cpu=s390");
cpp_assert (pfile, "machine=s390");
cpp_define (pfile, "__s390__");
- if (TARGET_ZARCH)
- cpp_define (pfile, "__zarch__");
- if (TARGET_64BIT)
- cpp_define (pfile, "__s390x__");
+ cpp_define (pfile, "__zarch__");
+ cpp_define (pfile, "__s390x__");
if (TARGET_LONG_DOUBLE_128)
cpp_define (pfile, "__LONG_DOUBLE_128__");
cl_target_option_save (&opts, &global_options, &global_options_set);
void
s390_d_target_versions (void)
{
- if (TARGET_64BIT)
- {
- d_add_builtin_version ("S390X");
- d_add_builtin_version ("SystemZ");
- }
- else
- d_add_builtin_version ("S390");
+ d_add_builtin_version ("S390X");
+ d_add_builtin_version ("SystemZ");
if (TARGET_SOFT_FLOAT)
d_add_builtin_version ("D_SoftFloat");
#define cfun_frame_layout (cfun->machine->frame_layout)
#define cfun_save_high_fprs_p (!!cfun_frame_layout.high_fprs)
-#define cfun_save_arg_fprs_p (!!(TARGET_64BIT \
- ? cfun_frame_layout.fpr_bitmap & 0x0f \
- : cfun_frame_layout.fpr_bitmap & 0x03))
+#define cfun_save_arg_fprs_p (!!(cfun_frame_layout.fpr_bitmap & 0x0f))
#define cfun_gprs_save_area_size ((cfun_frame_layout.last_save_gpr_slot - \
- cfun_frame_layout.first_save_gpr_slot + 1) * UNITS_PER_LONG)
+ cfun_frame_layout.first_save_gpr_slot + 1) * UNITS_PER_WORD)
#define cfun_set_fpr_save(REGNO) (cfun->machine->frame_layout.fpr_bitmap |= \
(1 << (REGNO - FPR0_REGNUM)))
#define cfun_fpr_save_p(REGNO) (!!(cfun->machine->frame_layout.fpr_bitmap & \
/* Number of GPRs and FPRs used for argument passing. */
#define GP_ARG_NUM_REG 5
-#define FP_ARG_NUM_REG (TARGET_64BIT? 4 : 2)
+#define FP_ARG_NUM_REG 4
#define VEC_ARG_NUM_REG 8
/* Return TRUE if GPR REGNO is supposed to be restored in the function
uint64_t data type. What we want is c_uint64_type_node from
c-common.cc. But since backend code is not supposed to interface
with the frontend we recreate it here. */
- if (TARGET_64BIT)
- c_uint64_type_node = long_unsigned_type_node;
- else
- c_uint64_type_node = long_long_unsigned_type_node;
+ c_uint64_type_node = long_unsigned_type_node;
#undef DEF_TYPE
#define DEF_TYPE(INDEX, NODE, CONST_P) \
static scalar_int_mode
s390_libgcc_cmp_return_mode (void)
{
- return TARGET_64BIT ? DImode : SImode;
+ return DImode;
}
static scalar_int_mode
s390_libgcc_shift_count_mode (void)
{
- return TARGET_64BIT ? DImode : SImode;
+ return DImode;
}
static scalar_int_mode
s390_unwind_word_mode (void)
{
- return TARGET_64BIT ? DImode : SImode;
+ return DImode;
}
/* Return true if the back end supports mode MODE. */
static bool
s390_scalar_mode_supported_p (scalar_mode mode)
{
- /* In contrast to the default implementation reject TImode constants on 31bit
- TARGET_ZARCH for ABI compliance. */
- if (!TARGET_64BIT && TARGET_ZARCH && mode == TImode)
- return false;
-
if (DECIMAL_FLOAT_MODE_P (mode))
return default_decimal_float_supported_p ();
- if (TARGET_64BIT && TARGET_Z10 && mode == HFmode)
+ if (TARGET_Z10 && mode == HFmode)
return true;
return default_scalar_mode_supported_p (mode);
if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
&& (CONST_OK_FOR_K (INTVAL (XEXP (op0, 1)))
|| (CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'O', "Os")
- /* Avoid INT32_MIN on 32 bit. */
- && (!TARGET_ZARCH || INTVAL (XEXP (op0, 1)) != -0x7fffffff - 1))))
+ && INTVAL (XEXP (op0, 1)) != -0x7fffffff - 1)))
{
if (INTVAL (XEXP((op0), 1)) < 0)
return CCANmode;
if (GET_CODE (addr) == SYMBOL_REF
|| (GET_CODE (addr) == UNSPEC
- && (XINT (addr, 1) == UNSPEC_GOTENT
- || XINT (addr, 1) == UNSPEC_PLT31)))
+ && XINT (addr, 1) == UNSPEC_GOTENT))
{
if (symref)
*symref = addr;
{
rtx left = XEXP (x, 0);
rtx right = XEXP (x, 1);
- if (TARGET_ZARCH)
- {
- if (GET_CODE (right) == CONST_INT
- && CONST_OK_FOR_K (INTVAL (right)))
- *total = s390_cost->mghi;
- else if (GET_CODE (left) == SIGN_EXTEND)
- *total = s390_cost->msgf;
- else
- *total = s390_cost->msg; /* msgr, msg */
- }
- else /* TARGET_31BIT */
- {
- if (GET_CODE (left) == SIGN_EXTEND
- && GET_CODE (right) == SIGN_EXTEND)
- /* mulsidi case: mr, m */
- *total = s390_cost->m;
- else if (GET_CODE (left) == ZERO_EXTEND
- && GET_CODE (right) == ZERO_EXTEND)
- /* umulsidi case: ml, mlr */
- *total = s390_cost->ml;
- else
- /* Complex calculation is required. */
- *total = COSTS_N_INSNS (40);
- }
+ if (GET_CODE (right) == CONST_INT
+ && CONST_OK_FOR_K (INTVAL (right)))
+ *total = s390_cost->mghi;
+ else if (GET_CODE (left) == SIGN_EXTEND)
+ *total = s390_cost->msgf;
+ else
+ *total = s390_cost->msg; /* msgr, msg */
break;
}
case E_SFmode:
{
rtx right = XEXP (x, 1);
if (GET_CODE (right) == ZERO_EXTEND) /* 64 by 32 bit division */
- if (TARGET_ZARCH)
- *total = s390_cost->dsgfr;
- else
- *total = s390_cost->dr;
+ *total = s390_cost->dsgfr;
else /* 64 by 64 bit division */
*total = s390_cost->dsgr;
}
void
s390_split_access_reg (rtx reg, rtx *lo, rtx *hi)
{
- gcc_assert (TARGET_64BIT);
gcc_assert (ACCESS_REG_P (reg));
gcc_assert (GET_MODE (reg) == DImode);
gcc_assert (!(REGNO (reg) & 1));
return true;
/* Accept lliXX operands. */
- if (TARGET_ZARCH
- && GET_CODE (op) == CONST_INT
- && trunc_int_for_mode (INTVAL (op), word_mode) == INTVAL (op)
- && s390_single_part (op, word_mode, HImode, 0) >= 0)
+ if (GET_CODE (op) == CONST_INT
+ && trunc_int_for_mode (INTVAL (op), DImode) == INTVAL (op)
+ && s390_single_part (op, DImode, HImode, 0) >= 0)
return true;
if (TARGET_EXTIMM
&& GET_CODE (op) == CONST_INT
- && trunc_int_for_mode (INTVAL (op), word_mode) == INTVAL (op)
- && s390_single_part (op, word_mode, SImode, 0) >= 0)
+ && trunc_int_for_mode (INTVAL (op), DImode) == INTVAL (op)
+ && s390_single_part (op, DImode, SImode, 0) >= 0)
return true;
/* Accept larl operands. */
/* Accept double-word operands that can be split. */
if (GET_CODE (op) == CONST_WIDE_INT
|| (GET_CODE (op) == CONST_INT
- && trunc_int_for_mode (INTVAL (op), word_mode) != INTVAL (op)))
+ && trunc_int_for_mode (INTVAL (op), DImode) != INTVAL (op)))
{
- machine_mode dword_mode = word_mode == SImode ? DImode : TImode;
- rtx hi = operand_subword (op, 0, 0, dword_mode);
- rtx lo = operand_subword (op, 1, 0, dword_mode);
+ rtx hi = operand_subword (op, 0, 0, TImode);
+ rtx lo = operand_subword (op, 1, 0, TImode);
return legitimate_reload_constant_p (hi)
&& legitimate_reload_constant_p (lo);
}
}
if (GET_CODE (symref) == UNSPEC
- && alignment <= UNITS_PER_LONG)
+ && alignment <= UNITS_PER_WORD)
return true;
return false;
&& s390_class_max_nregs (FP_REGS, mode) == 1)))
{
if (in_p)
- sri->icode = (TARGET_64BIT ?
- CODE_FOR_reloaddi_la_in :
- CODE_FOR_reloadsi_la_in);
+ sri->icode = CODE_FOR_reloaddi_la_in;
else
- sri->icode = (TARGET_64BIT ?
- CODE_FOR_reloaddi_la_out :
- CODE_FOR_reloadsi_la_out);
+ sri->icode = CODE_FOR_reloaddi_la_out;
}
}
&& mode == Pmode
&& (!SYMBOL_REF_P (symref) || !SYMBOL_FLAG_NOTALIGN2_P (symref))
&& (offset & 1) == 1)
- sri->icode = ((mode == DImode) ? CODE_FOR_reloaddi_larl_odd_addend_z10
- : CODE_FOR_reloadsi_larl_odd_addend_z10);
+ sri->icode = CODE_FOR_reloaddi_larl_odd_addend_z10;
/* Handle all the (mem (symref)) accesses we cannot use the z10
instructions for. */
{
#define __SECONDARY_RELOAD_CASE(M,m) \
case E_##M##mode: \
- if (TARGET_64BIT) \
- sri->icode = in_p ? CODE_FOR_reload##m##di_toreg_z10 : \
- CODE_FOR_reload##m##di_tomem_z10; \
- else \
- sri->icode = in_p ? CODE_FOR_reload##m##si_toreg_z10 : \
- CODE_FOR_reload##m##si_tomem_z10; \
+ sri->icode = in_p ? CODE_FOR_reload##m##di_toreg_z10 : \
+ CODE_FOR_reload##m##di_tomem_z10; \
break;
switch (GET_MODE (x))
/* LRA can deal with transformation of plus op very well -- so we
don't need to prompt LRA in this case. */
if (! lra_in_progress && in_p && s390_plus_operand (x, mode))
- sri->icode = (TARGET_64BIT ?
- CODE_FOR_reloaddi_plus : CODE_FOR_reloadsi_plus);
+ sri->icode = CODE_FOR_reloaddi_plus;
/* Performing a multiword move from or to memory we have to make sure the
second chunk in memory is addressable without causing a displacement
&& s390_class_max_nregs (FP_REGS, mode) > 1))
{
if (in_p)
- sri->icode = (TARGET_64BIT ?
- CODE_FOR_reloaddi_la_in :
- CODE_FOR_reloadsi_la_in);
+ sri->icode = CODE_FOR_reloaddi_la_in;
else
- sri->icode = (TARGET_64BIT ?
- CODE_FOR_reloaddi_la_out :
- CODE_FOR_reloadsi_la_out);
+ sri->icode = CODE_FOR_reloaddi_la_out;
}
}
copied to r0 compiling with -fPIC. In other cases the target
register might be used as temporary (see legitimize_pic_address). */
if (in_p && SYMBOLIC_CONST (x) && flag_pic == 2 && rclass != ADDR_REGS)
- sri->icode = (TARGET_64BIT ?
- CODE_FOR_reloaddi_PIC_addr :
- CODE_FOR_reloadsi_PIC_addr);
+ sri->icode = CODE_FOR_reloaddi_PIC_addr;
/* Either scratch or no register needed. */
return NO_REGS;
We need secondary memory to move data between GPRs and FPRs.
- With DFP the ldgr lgdr instructions are available. Due to the
- different alignment we cannot use them for SFmode. For 31 bit a
- 64 bit value in GPR would be a register pair so here we still
- need to go via memory.
+ different alignment we cannot use them for SFmode.
- With z13 we can do the SF/SImode moves with vlgvf. Due to the
overlapping of FPRs and VRs we still disallow TF/TD modes to be
realized via ldgr/lgdr in conjunction with shifts in order satisfy
alignment requirements, or via vector loads. Thus, there is no secondary
memory needed. */
- if (TARGET_64BIT && TARGET_Z10 && GET_MODE_SIZE (mode) == 2
+ if (TARGET_Z10 && GET_MODE_SIZE (mode) == 2
&& ((reg_classes_intersect_p (class1, VEC_REGS)
&& reg_classes_intersect_p (class2, GENERAL_REGS))
|| (reg_classes_intersect_p (class2, VEC_REGS)
&& reg_classes_intersect_p (class2, GENERAL_REGS))
|| (reg_classes_intersect_p (class1, GENERAL_REGS)
&& reg_classes_intersect_p (class2, VEC_REGS)))
- && (TARGET_TPF || !TARGET_DFP || !TARGET_64BIT
- || GET_MODE_SIZE (mode) != 8)
+ && (TARGET_TPF || !TARGET_DFP || GET_MODE_SIZE (mode) != 8)
&& (!TARGET_VX || (SCALAR_FLOAT_MODE_P (mode)
&& GET_MODE_SIZE (mode) > 8)));
}
return true;
}
-/* Return true if OP is a valid operand for the LA instruction.
- In 31-bit, we need to prove that the result is used as an
- address, as LA performs only a 31-bit addition. */
+/* Return true if OP is a valid operand for the LA instruction. */
bool
legitimate_la_operand_p (rtx op)
if (!s390_decompose_address (op, &addr))
return false;
- return (TARGET_64BIT || addr.pointer);
+ return true;
}
/* Return true if it is valid *and* preferable to use LA to
if (addr.indx && s390_tune >= PROCESSOR_2817_Z196)
return false;
- if (!TARGET_64BIT && !addr.pointer)
- return false;
-
if (addr.pointer)
return true;
void
s390_load_address (rtx dst, rtx src)
{
- if (TARGET_64BIT)
- emit_move_insn (dst, src);
- else
- emit_insn (gen_force_la_31 (dst, src));
+ emit_move_insn (dst, src);
}
/* Return true if it ok to use SYMBOL_REF in a relative address. */
if ((GET_CODE (addr) == LABEL_REF
|| (SYMBOL_REF_P (addr) && s390_rel_address_ok_p (addr))
- || (GET_CODE (addr) == UNSPEC &&
- (XINT (addr, 1) == UNSPEC_GOTENT
- || XINT (addr, 1) == UNSPEC_PLT31)))
+ || (GET_CODE (addr) == UNSPEC && XINT (addr, 1) == UNSPEC_GOTENT))
&& GET_CODE (addend) == CONST_INT)
{
/* This can be locally addressed. */
else if (flag_pic == 1)
{
/* Assume GOT offset is a valid displacement operand (< 4k
- or < 512k with z990). This is handled the same way in
- both 31- and 64-bit code (@GOT).
+ or < 512k with z990).
lg <target>, sym@GOT(r12) */
if (reload_in_progress || reload_completed)
gcc_unreachable ();
break;
- /* For @PLT larl is used. This is handled like local
- symbol refs. */
- case UNSPEC_PLT31:
- gcc_unreachable ();
- break;
-
/* Everything else cannot happen. */
default:
gcc_unreachable ();
{
rtx tp = gen_reg_rtx (Pmode);
- emit_insn (gen_get_thread_pointer (Pmode, tp));
+ emit_insn (gen_get_thread_pointerdi (tp));
mark_reg_pointer (tp, BITS_PER_WORD);
case TLS_MODEL_INITIAL_EXEC:
if (flag_pic == 1)
{
- /* Assume GOT offset < 4k. This is handled the same way
- in both 31- and 64-bit code. */
+ /* Assume GOT offset < 4k. */
if (reload_in_progress || reload_completed)
df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true);
else if (TARGET_MVCLE)
{
val = force_not_mem (convert_modes (Pmode, QImode, val, 1));
- if (TARGET_64BIT)
- emit_insn (gen_setmem_long_di (dst, convert_to_mode (Pmode, len, 1),
- val));
- else
- emit_insn (gen_setmem_long_si (dst, convert_to_mode (Pmode, len, 1),
- val));
+ emit_insn (gen_setmem_long_di (dst, convert_to_mode (Pmode, len, 1),
+ val));
}
/* Non-constant length and no loop required. */
s390_load_address (highest_index_to_load_reg,
gen_rtx_PLUS (Pmode, highest_index_to_load_reg,
const1_rtx));
- if (TARGET_64BIT)
- emit_insn (gen_movdicc (str_idx_reg, cond,
- highest_index_to_load_reg, str_idx_reg));
- else
- emit_insn (gen_movsicc (str_idx_reg, cond,
- highest_index_to_load_reg, str_idx_reg));
+ emit_insn (gen_movdicc (str_idx_reg, cond,
+ highest_index_to_load_reg, str_idx_reg));
add_reg_br_prob_note (s390_emit_jump (is_aligned_label, cond),
profile_probability::very_unlikely ());
/* Generate INSERT IMMEDIATE (IILL et al). */
/* (set (ze (reg)) (const_int)). */
- if (TARGET_ZARCH
- && register_operand (dest, word_mode)
+ if (register_operand (dest, DImode)
&& (bitpos % 16) == 0
&& (bitsize % 16) == 0
&& const_int_operand (src, VOIDmode))
putsize = GET_MODE_BITSIZE (putmode);
regpos -= putsize;
- emit_move_insn (gen_rtx_ZERO_EXTRACT (word_mode, dest,
+ emit_move_insn (gen_rtx_ZERO_EXTRACT (DImode, dest,
GEN_INT (putsize),
GEN_INT (regpos)),
gen_int_mode (val, putmode));
if (bitpos == 0
&& (bitsize % BITS_PER_UNIT) == 0
&& MEM_P (dest)
- && (register_operand (src, word_mode)
+ && (register_operand (src, DImode)
|| const_int_operand (src, VOIDmode)))
{
/* Emit standard pattern if possible. */
else if (const_int_operand (src, VOIDmode))
{
int size = bitsize / BITS_PER_UNIT;
- rtx src_mem = adjust_address (force_const_mem (word_mode, src),
+ rtx src_mem = adjust_address (force_const_mem (DImode, src),
BLKmode,
UNITS_PER_WORD - size);
}
/* (set (ze (mem)) (reg)). */
- else if (register_operand (src, word_mode))
+ else if (register_operand (src, DImode))
{
if (bitsize <= 32)
- emit_move_insn (gen_rtx_ZERO_EXTRACT (word_mode, dest, op1,
+ emit_move_insn (gen_rtx_ZERO_EXTRACT (DImode, dest, op1,
const0_rtx), src);
else
{
emit_move_insn (adjust_address (dest, SImode, size),
gen_lowpart (SImode, src));
set_mem_size (dest, size);
- emit_move_insn (gen_rtx_ZERO_EXTRACT (word_mode, dest,
+ emit_move_insn (gen_rtx_ZERO_EXTRACT (DImode, dest,
GEN_INT (stcmh_width),
const0_rtx),
- gen_rtx_LSHIFTRT (word_mode, src, GEN_INT (32)));
+ gen_rtx_LSHIFTRT (DImode, src, GEN_INT (32)));
}
return true;
}
{
machine_mode save_mode = default_dwarf_frame_reg_mode (regno);
- /* Make sure not to return DImode for any GPR with -m31 -mzarch. */
if (GENERAL_REGNO_P (regno))
save_mode = Pmode;
static bool
s390_libgcc_floating_mode_supported_p (scalar_float_mode mode)
{
- return (TARGET_64BIT && TARGET_Z10 && mode == HFmode)
+ return (TARGET_Z10 && mode == HFmode)
|| default_libgcc_floating_mode_supported_p (mode);
}
y = XEXP (x, 0);
if (GET_CODE (y) == UNSPEC
- && (XINT (y, 1) == UNSPEC_GOTENT
- || XINT (y, 1) == UNSPEC_PLT31))
+ && XINT (y, 1) == UNSPEC_GOTENT)
return XVECEXP (y, 0, 0);
else
return orig_x;
y = XEXP (x, 0);
if (GET_CODE (y) == UNSPEC
- && (XINT (y, 1) == UNSPEC_GOTENT
- || XINT (y, 1) == UNSPEC_PLT31))
+ && XINT (y, 1) == UNSPEC_GOTENT)
y = XVECEXP (y, 0, 0);
else
return orig_x;
static void
s390_asm_output_machine_for_arch (FILE *asm_out_file)
{
- fprintf (asm_out_file, "\t.machinemode %s\n",
- (TARGET_ZARCH) ? "zarch" : "esa");
+ fprintf (asm_out_file, "\t.machinemode zarch\n");
fprintf (asm_out_file, "\t.machine \"%s",
processor_table[s390_arch].binutils_name);
if (S390_USE_ARCHITECTURE_MODIFIERS)
/* Note: The function label must be aligned so that (a) the bytes of the
following nop do not cross a cacheline boundary, and (b) a jump address
- (eight bytes for 64 bit targets, 4 bytes for 32 bit targets) can be
- stored directly before the label without crossing a cacheline
- boundary. All this is necessary to make sure the trampoline code can
- be changed atomically.
+ (eight bytes) can be stored directly before the label without crossing
+ a cacheline boundary. All this is necessary to make sure the
+ trampoline code can be changed atomically.
This alignment is done automatically using the FOUNCTION_BOUNDARY, but
if there are NOPs before the function label, the alignment is placed
before them. So it is necessary to duplicate the alignment after the
output_addr_const (file, XVECEXP (x, 0, 0));
fprintf (file, "@GOTOFF");
return true;
- case UNSPEC_PLT31:
- output_addr_const (file, XVECEXP (x, 0, 0));
- fprintf (file, "@PLT");
- return true;
case UNSPEC_PLTOFF:
output_addr_const (file, XVECEXP (x, 0, 0));
fprintf (file, "@PLTOFF");
return get_hard_reg_initial_val (Pmode, RETURN_REGNUM);
if (TARGET_PACKED_STACK)
- offset = -2 * UNITS_PER_LONG;
+ offset = -2 * UNITS_PER_WORD;
else
- offset = RETURN_REGNUM * UNITS_PER_LONG;
+ offset = RETURN_REGNUM * UNITS_PER_WORD;
addr = plus_constant (Pmode, frame, offset);
addr = memory_address (Pmode, addr);
if (TARGET_PACKED_STACK)
chain = plus_constant (Pmode, stack_pointer_rtx,
- STACK_POINTER_OFFSET - UNITS_PER_LONG);
+ STACK_POINTER_OFFSET - UNITS_PER_WORD);
else
chain = stack_pointer_rtx;
if (cfun_frame_layout.first_restore_gpr != -1)
{
b = (cfun_frame_layout.gprs_offset
- + cfun_frame_layout.first_restore_gpr * UNITS_PER_LONG);
+ + cfun_frame_layout.first_restore_gpr * UNITS_PER_WORD);
t = b + (cfun_frame_layout.last_restore_gpr
- - cfun_frame_layout.first_restore_gpr + 1) * UNITS_PER_LONG;
+ - cfun_frame_layout.first_restore_gpr + 1) * UNITS_PER_WORD;
}
- if (TARGET_64BIT && cfun_save_high_fprs_p)
+ if (cfun_save_high_fprs_p)
{
b = MIN (b, cfun_frame_layout.f8_offset);
t = MAX (t, (cfun_frame_layout.f8_offset
+ cfun_frame_layout.high_fprs * 8));
}
- if (!TARGET_64BIT)
- {
- if (cfun_fpr_save_p (FPR4_REGNUM))
- {
- b = MIN (b, cfun_frame_layout.f4_offset);
- t = MAX (t, cfun_frame_layout.f4_offset + 8);
- }
- if (cfun_fpr_save_p (FPR6_REGNUM))
- {
- b = MIN (b, cfun_frame_layout.f4_offset + 8);
- t = MAX (t, cfun_frame_layout.f4_offset + 16);
- }
- }
*area_bottom = b;
*area_top = t;
}
int min_preserve_fpr = INT_MAX, max_preserve_fpr = -1;
int min_fpr, max_fpr;
- /* Save the FP argument regs for stdarg. f0, f2 for 31 bit and
- f0-f4 for 64 bit. */
+ /* Save the FP argument regs f0-f4 for stdarg. */
if (cfun->stdarg
&& TARGET_HARD_FLOAT
&& cfun->va_list_fpr_size
cfun_frame_layout.last_save_gpr_slot = cfun_frame_layout.last_save_gpr;
/* The va_arg builtin uses a constant distance of 16 *
- UNITS_PER_LONG (r0-r15) to reach the FPRs from the reg_save_area
+ UNITS_PER_WORD (r0-r15) to reach the FPRs from the reg_save_area
pointer. So even if we are going to save the stack pointer in an
FPR we need the stack space in order to keep the offsets
correct. */
}
cfun_frame_layout.frame_size = get_frame_size ();
- if (!TARGET_64BIT && cfun_frame_layout.frame_size > 0x7fff0000)
- fatal_error (input_location,
- "total size of local variables exceeds architecture limit");
if (!TARGET_PACKED_STACK)
{
/* Fixed stack layout. */
cfun_frame_layout.backchain_offset = 0;
- cfun_frame_layout.f0_offset = 16 * UNITS_PER_LONG;
+ cfun_frame_layout.f0_offset = 16 * UNITS_PER_WORD;
cfun_frame_layout.f4_offset = cfun_frame_layout.f0_offset + 2 * 8;
cfun_frame_layout.f8_offset = -cfun_frame_layout.high_fprs * 8;
cfun_frame_layout.gprs_offset = (cfun_frame_layout.first_save_gpr_slot
- * UNITS_PER_LONG);
+ * UNITS_PER_WORD);
}
else if (TARGET_BACKCHAIN)
{
/* Kernel stack layout - packed stack, backchain, no float */
gcc_assert (TARGET_SOFT_FLOAT);
cfun_frame_layout.backchain_offset = (STACK_POINTER_OFFSET
- - UNITS_PER_LONG);
+ - UNITS_PER_WORD);
/* The distance between the backchain and the return address
save slot must not change. So we always need a slot for the
/* Packed stack layout without backchain. */
/* With stdarg FPRs need their dedicated slots. */
- num_fprs = (TARGET_64BIT && cfun->stdarg ? 2
+ num_fprs = (cfun->stdarg ? 2
: (cfun_fpr_save_p (FPR4_REGNUM) +
cfun_fpr_save_p (FPR6_REGNUM)));
cfun_frame_layout.f4_offset = STACK_POINTER_OFFSET - 8 * num_fprs;
cfun_frame_layout.frame_size += STACK_POINTER_OFFSET - lowest_offset;
- /* If under 31 bit an odd number of gprs has to be saved we have to
- adjust the frame size to sustain 8 byte alignment of stack
- frames. */
+ /* Adjust frame size to sustain 8 byte alignment of stack frames. */
cfun_frame_layout.frame_size = ((cfun_frame_layout.frame_size +
STACK_BOUNDARY / BITS_PER_UNIT - 1)
& ~(STACK_BOUNDARY / BITS_PER_UNIT - 1));
/* fallthrough */
case GENERAL_REGS:
if (REGNO_PAIR_OK (regno, mode))
- {
- if (TARGET_ZARCH
- || (mode != TFmode && mode != TCmode && mode != TDmode))
- return true;
- }
+ return true;
break;
case CC_REGS:
if (GET_MODE_CLASS (mode) == MODE_CC)
return true;
}
-/* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. When generating
- code that runs in z/Architecture mode, but conforms to the 31-bit
- ABI, GPRs can hold 8 bytes; the ABI guarantees only that the lower 4
- bytes are saved across calls, however. */
+/* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. */
static bool
s390_hard_regno_call_part_clobbered (unsigned int, unsigned int regno,
machine_mode mode)
{
- /* For r12 we know that the only bits we actually care about are
- preserved across function calls. Since r12 is a fixed reg all
- accesses to r12 are generated by the backend.
-
- This workaround is necessary until gcse implements proper
- tracking of partially clobbered registers. */
- if (!TARGET_64BIT
- && TARGET_ZARCH
- && GET_MODE_SIZE (mode) > 4
- && (!flag_pic || regno != PIC_OFFSET_TABLE_REGNUM)
- && ((regno >= 6 && regno <= 15) || regno == 32))
- return true;
-
if (TARGET_VX
&& GET_MODE_SIZE (mode) > 8
- && (((TARGET_64BIT && regno >= 24 && regno <= 31))
- || (!TARGET_64BIT && (regno == 18 || regno == 19))))
+ && regno >= 24
+ && regno <= 31)
return true;
return false;
reside. */
offset = (cfun_frame_layout.frame_size + cfun_frame_layout.gprs_offset +
(RETURN_REGNUM - cfun_frame_layout.first_save_gpr_slot) *
- UNITS_PER_LONG);
+ UNITS_PER_WORD);
break;
case BASE_REGNUM:
/* Special-case single register. */
if (first == last)
{
- if (TARGET_64BIT)
- insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
- else
- insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
+ insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
if (!global_not_special_regno_p (first))
RTX_FRAME_RELATED_P (insn) = 1;
{
rtx reg = gen_rtx_REG (Pmode, regno);
rtx reg_addr = plus_constant (Pmode, base,
- offset + (regno - first) * UNITS_PER_LONG);
+ offset + (regno - first) * UNITS_PER_WORD);
if (!s390_restore_gpr_p (regno))
add_reg_note (insn, REG_CFA_NO_RESTORE, reg);
add_reg_note (insn, REG_CFA_OFFSET,
goto emit;
addr = plus_constant (Pmode, base,
- offset + (start - first) * UNITS_PER_LONG);
+ offset + (start - first) * UNITS_PER_WORD);
if (start == last)
{
- if (TARGET_64BIT)
- note = gen_movdi (gen_rtx_MEM (Pmode, addr),
- gen_rtx_REG (Pmode, start));
- else
- note = gen_movsi (gen_rtx_MEM (Pmode, addr),
- gen_rtx_REG (Pmode, start));
+ note = gen_movdi (gen_rtx_MEM (Pmode, addr),
+ gen_rtx_REG (Pmode, start));
note = PATTERN (note);
add_reg_note (insn, REG_FRAME_RELATED_EXPR, note);
/* Special-case single register. */
if (first == last)
{
- if (TARGET_64BIT)
- insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
- else
- insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
+ insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
RTX_FRAME_RELATED_P (insn) = 1;
return insn;
{
rtx mem = gen_frame_mem (BLKmode, stack_pointer_rtx);
if (frame_pointer_needed)
- emit_insn (gen_stack_tie (Pmode, mem, hard_frame_pointer_rtx));
+ emit_insn (gen_stack_tiedi (mem, hard_frame_pointer_rtx));
else
- emit_insn (gen_stack_tie (Pmode, mem, stack_pointer_rtx));
+ emit_insn (gen_stack_tiedi (mem, stack_pointer_rtx));
}
/* Copy GPRS into FPR save slots. */
static void
s390_emit_stack_probe (rtx addr)
{
- rtx mem = gen_rtx_MEM (word_mode, addr);
+ rtx mem = gen_rtx_MEM (DImode, addr);
MEM_VOLATILE_P (mem) = 1;
emit_insn (gen_probe_stack (mem));
}
dump_stack_clash_frame_info (NO_PROBE_SMALL_FRAME, true);
else
{
- rtx offset = GEN_INT (probe_interval - UNITS_PER_LONG);
+ rtx offset = GEN_INT (probe_interval - UNITS_PER_WORD);
HOST_WIDE_INT rounded_size = -INTVAL (size) & -probe_interval;
HOST_WIDE_INT num_probes = rounded_size / probe_interval;
HOST_WIDE_INT residual = -INTVAL (size) - rounded_size;
s390_emit_stack_probe (gen_rtx_PLUS (Pmode,
stack_pointer_rtx,
GEN_INT (residual
- - UNITS_PER_LONG)));
+ - UNITS_PER_WORD)));
return temp_reg_clobbered_p;
}
= 1 << param_stack_clash_protection_probe_interval;
HOST_WIDE_INT last_probe_offset
= (TARGET_BACKCHAIN
- ? (TARGET_PACKED_STACK ? STACK_POINTER_OFFSET - UNITS_PER_LONG : 0)
+ ? (TARGET_PACKED_STACK ? STACK_POINTER_OFFSET - UNITS_PER_WORD : 0)
: probe_interval - (STACK_BOUNDARY / UNITS_PER_WORD));
s390_save_gprs_to_fprs ();
{
save_gprs (stack_pointer_rtx,
cfun_frame_layout.gprs_offset +
- UNITS_PER_LONG * (cfun_frame_layout.first_save_gpr
+ UNITS_PER_WORD * (cfun_frame_layout.first_save_gpr
- cfun_frame_layout.first_save_gpr_slot),
cfun_frame_layout.first_save_gpr,
cfun_frame_layout.last_save_gpr);
then LAST_PROBE_OFFSET can move even closer to sp. */
last_probe_offset
= (cfun_frame_layout.gprs_offset +
- UNITS_PER_LONG * (cfun_frame_layout.first_save_gpr
+ UNITS_PER_WORD * (cfun_frame_layout.first_save_gpr
- cfun_frame_layout.first_save_gpr_slot));
}
rtx t = gen_rtx_AND (Pmode, stack_pointer_rtx,
GEN_INT (stack_check_mask));
- if (TARGET_64BIT)
- emit_insn (gen_ctrapdi4 (gen_rtx_EQ (VOIDmode,
- t, const0_rtx),
- t, const0_rtx, const0_rtx));
- else
- emit_insn (gen_ctrapsi4 (gen_rtx_EQ (VOIDmode,
- t, const0_rtx),
- t, const0_rtx, const0_rtx));
+ emit_insn (gen_ctrapdi4 (gen_rtx_EQ (VOIDmode,
+ t, const0_rtx),
+ t, const0_rtx, const0_rtx));
}
}
}
/* Restore call saved fprs. */
- if (TARGET_64BIT)
- {
- if (cfun_save_high_fprs_p)
- {
- next_offset = cfun_frame_layout.f8_offset;
- for (i = FPR8_REGNUM; i <= FPR15_REGNUM; i++)
- {
- if (cfun_fpr_save_p (i))
- {
- restore_fpr (frame_pointer,
- offset + next_offset, i);
- cfa_restores
- = alloc_reg_note (REG_CFA_RESTORE,
- gen_rtx_REG (DFmode, i), cfa_restores);
- next_offset += 8;
- }
- }
- }
-
- }
- else
+ if (cfun_save_high_fprs_p)
{
- next_offset = cfun_frame_layout.f4_offset;
- /* f4, f6 */
- for (i = FPR4_REGNUM; i <= FPR4_REGNUM + 1; i++)
+ next_offset = cfun_frame_layout.f8_offset;
+ for (i = FPR8_REGNUM; i <= FPR15_REGNUM; i++)
{
if (cfun_fpr_save_p (i))
{
gen_rtx_REG (DFmode, i), cfa_restores);
next_offset += 8;
}
- else if (!TARGET_PACKED_STACK)
- next_offset += 8;
}
-
}
/* Restore call saved gprs. */
addr = plus_constant (Pmode, frame_pointer,
offset + cfun_frame_layout.gprs_offset
+ (i - cfun_frame_layout.first_save_gpr_slot)
- * UNITS_PER_LONG);
+ * UNITS_PER_WORD);
addr = gen_rtx_MEM (Pmode, addr);
set_mem_alias_set (addr, get_frame_alias_set ());
emit_move_insn (addr, gen_rtx_REG (Pmode, i));
offset + cfun_frame_layout.gprs_offset
+ (RETURN_REGNUM
- cfun_frame_layout.first_save_gpr_slot)
- * UNITS_PER_LONG);
+ * UNITS_PER_WORD);
addr = gen_rtx_MEM (Pmode, addr);
set_mem_alias_set (addr, get_frame_alias_set ());
emit_move_insn (return_reg, addr);
offset + cfun_frame_layout.gprs_offset
+ (cfun_frame_layout.first_restore_gpr
- cfun_frame_layout.first_save_gpr_slot)
- * UNITS_PER_LONG,
+ * UNITS_PER_WORD,
cfun_frame_layout.first_restore_gpr,
cfun_frame_layout.last_restore_gpr);
insn = emit_insn (insn);
switch_to_section (targetm.asm_out.function_rodata_section
(current_function_decl, false));
- if (TARGET_64BIT)
- output_asm_insn (".align\t8", NULL);
- else
- output_asm_insn (".align\t4", NULL);
+ output_asm_insn (".align\t8", NULL);
(*targetm.asm_out.internal_label) (asm_out_file, "L",
CODE_LABEL_NUMBER (parm_block));
- if (TARGET_64BIT)
- {
- output_asm_insn (".quad\t%0", &frame_size);
- output_asm_insn (".quad\t%0", &args_size);
- output_asm_insn (".quad\t%1-%0", ops);
- }
- else
- {
- output_asm_insn (".long\t%0", &frame_size);
- output_asm_insn (".long\t%0", &args_size);
- output_asm_insn (".long\t%1-%0", ops);
- }
+ output_asm_insn (".quad\t%0", &frame_size);
+ output_asm_insn (".quad\t%0", &args_size);
+ output_asm_insn (".quad\t%1-%0", ops);
switch_to_section (current_function_section ());
}
rtx r1, guard, cc = NULL;
rtx_insn *insn;
/* Offset from thread pointer to __private_ss. */
- int psso = TARGET_64BIT ? 0x38 : 0x20;
+ int psso = 0x38;
/* Pointer size in bytes. */
/* Frame size and argument size - the two parameters to __morestack. */
HOST_WIDE_INT frame_size = cfun_frame_layout.frame_size;
/* Get thread pointer. r1 is the only register we can always destroy - r0
could contain a static chain (and cannot be used to address memory
anyway), r2-r6 can contain parameters, and r6-r15 are callee-saved. */
- emit_insn (gen_get_thread_pointer (Pmode, r1));
+ emit_insn (gen_get_thread_pointerdi (r1));
/* Aim at __private_ss. */
guard = gen_rtx_MEM (Pmode, plus_constant (Pmode, r1, psso));
if (frame_size > SPLIT_STACK_AVAILABLE)
{
emit_move_insn (r1, guard);
- if (TARGET_64BIT)
- emit_insn (gen_adddi3 (r1, r1, GEN_INT (frame_size)));
- else
- emit_insn (gen_addsi3 (r1, r1, GEN_INT (frame_size)));
+ emit_insn (gen_adddi3 (r1, r1, GEN_INT (frame_size)));
guard = r1;
}
conventions: it preserves param/return/static chain registers for
calling main function body, and looks for its own parameters at %r1. */
if (cc != NULL)
- tmp = gen_split_stack_cond_call (Pmode,
- morestack_ref,
- parm_base,
- call_done,
- GEN_INT (frame_size),
- GEN_INT (args_size),
- cc);
+ tmp = gen_split_stack_cond_calldi (morestack_ref,
+ parm_base,
+ call_done,
+ GEN_INT (frame_size),
+ GEN_INT (args_size),
+ cc);
else
- tmp = gen_split_stack_call (Pmode,
- morestack_ref,
- parm_base,
- call_done,
- GEN_INT (frame_size),
- GEN_INT (args_size));
+ tmp = gen_split_stack_calldi (morestack_ref,
+ parm_base,
+ call_done,
+ GEN_INT (frame_size),
+ GEN_INT (args_size));
insn = emit_jump_insn (tmp);
JUMP_LABEL (insn) = call_done;
if (cfun_gpr_save_slot (i) != SAVE_SLOT_NONE)
return false;
- /* For 31 bit this is not covered by the frame_size check below
- since f4, f6 are saved in the register save area without needing
- additional stack space. */
- if (!TARGET_64BIT
- && (cfun_fpr_save_p (FPR4_REGNUM) || cfun_fpr_save_p (FPR6_REGNUM)))
- return false;
-
if (cfun->machine->base_reg
&& !call_used_regs[REGNO (cfun->machine->base_reg)])
return false;
}
else if (s390_function_arg_integer (arg.mode, arg.type))
{
- int size = s390_function_arg_size (arg.mode, arg.type);
- cum->gprs += ((size + UNITS_PER_LONG - 1) / UNITS_PER_LONG);
+ cum->gprs += 1;
}
else
gcc_unreachable ();
On S/390, we use general purpose registers 2 through 6 to
pass integer, pointer, and certain structure arguments, and
- floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
- to pass floating point arguments. All remaining arguments
- are pushed to the stack. */
+ floating point registers 0, 2, 4, and 6 to pass floating point
+ arguments. All remaining arguments are pushed to the stack. */
static rtx
s390_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
}
else if (s390_function_arg_integer (arg.mode, arg.type))
{
- int size = s390_function_arg_size (arg.mode, arg.type);
- int n_gprs = (size + UNITS_PER_LONG - 1) / UNITS_PER_LONG;
-
- if (cum->gprs + n_gprs > GP_ARG_NUM_REG)
+ if (cum->gprs + 1 > GP_ARG_NUM_REG)
return NULL_RTX;
- else if (n_gprs == 1 || UNITS_PER_WORD == UNITS_PER_LONG)
+ else
return gen_rtx_REG (arg.mode, cum->gprs + 2);
- else if (n_gprs == 2)
- {
- rtvec p = rtvec_alloc (2);
-
- RTVEC_ELT (p, 0)
- = gen_rtx_EXPR_LIST (SImode, gen_rtx_REG (SImode, cum->gprs + 2),
- const0_rtx);
- RTVEC_ELT (p, 1)
- = gen_rtx_EXPR_LIST (SImode, gen_rtx_REG (SImode, cum->gprs + 3),
- GEN_INT (4));
-
- return gen_rtx_PARALLEL (arg.mode, p);
- }
}
/* After the real arguments, expand_call calls us once again with an
/* Function arguments and return values are promoted to word size. */
static machine_mode
-s390_promote_function_mode (const_tree type, machine_mode mode,
- int *punsignedp,
+s390_promote_function_mode (const_tree type ATTRIBUTE_UNUSED,
+ machine_mode mode,
+ int *punsignedp ATTRIBUTE_UNUSED,
const_tree fntype ATTRIBUTE_UNUSED,
int for_return ATTRIBUTE_UNUSED)
{
if (INTEGRAL_MODE_P (mode)
- && GET_MODE_SIZE (mode) < UNITS_PER_LONG)
+ && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
{
+/* This is defined for TPF. */
+#ifdef POINTERS_EXTEND_UNSIGNED
if (type != NULL_TREE && POINTER_TYPE_P (type))
*punsignedp = POINTERS_EXTEND_UNSIGNED;
+#endif
return Pmode;
}
return gen_rtx_REG (mode, FIRST_VEC_ARG_REGNO);
else if (TARGET_HARD_FLOAT && SCALAR_FLOAT_MODE_P (mode))
return gen_rtx_REG (mode, 16);
- else if (GET_MODE_SIZE (mode) <= UNITS_PER_LONG
- || UNITS_PER_LONG == UNITS_PER_WORD)
- return gen_rtx_REG (mode, 2);
- else if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_LONG)
- {
- /* This case is triggered when returning a 64 bit value with
- -m31 -mzarch. Although the value would fit into a single
- register it has to be forced into a 32 bit register pair in
- order to match the ABI. */
- rtvec p = rtvec_alloc (2);
-
- RTVEC_ELT (p, 0)
- = gen_rtx_EXPR_LIST (SImode, gen_rtx_REG (SImode, 2), const0_rtx);
- RTVEC_ELT (p, 1)
- = gen_rtx_EXPR_LIST (SImode, gen_rtx_REG (SImode, 3), GEN_INT (4));
-
- return gen_rtx_PARALLEL (mode, p);
- }
-
- gcc_unreachable ();
+ return gen_rtx_REG (mode, 2);
}
/* Define where to return a scalar return value of type RET_TYPE. */
|| (cfun->va_list_fpr_size && n_fpr < FP_ARG_NUM_REG))
{
t = make_tree (TREE_TYPE (sav), return_address_pointer_rtx);
- t = fold_build_pointer_plus_hwi (t, -RETURN_REGNUM * UNITS_PER_LONG);
+ t = fold_build_pointer_plus_hwi (t, -RETURN_REGNUM * UNITS_PER_WORD);
t = build2 (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
TREE_SIDE_EFFECTS (t) = 1;
int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
tree lab_false, lab_over = NULL_TREE;
tree addr = create_tmp_var (ptr_type_node, "addr");
- bool left_align_p; /* How a value < UNITS_PER_LONG is aligned within
+ bool left_align_p; /* How a value < UNITS_PER_WORD is aligned within
a stack slot. */
f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
reg = gpr;
n_reg = 1;
- /* kernel stack layout on 31 bit: It is assumed here that no padding
- will be added by s390_frame_info because for va_args always an even
- number of gprs has to be saved r15-r2 = 14 regs. */
- sav_ofs = 2 * UNITS_PER_LONG;
- sav_scale = UNITS_PER_LONG;
- size = UNITS_PER_LONG;
+ sav_ofs = 2 * UNITS_PER_WORD;
+ sav_scale = UNITS_PER_WORD;
+ size = UNITS_PER_WORD;
max_reg = GP_ARG_NUM_REG - n_reg;
left_align_p = false;
}
indirect_p = 0;
reg = fpr;
n_reg = 1;
- sav_ofs = 16 * UNITS_PER_LONG;
+ sav_ofs = 16 * UNITS_PER_WORD;
sav_scale = 8;
max_reg = FP_ARG_NUM_REG - n_reg;
left_align_p = false;
/* Otherwise into GP registers. */
indirect_p = 0;
reg = gpr;
- n_reg = (size + UNITS_PER_LONG - 1) / UNITS_PER_LONG;
+ n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
- /* kernel stack layout on 31 bit: It is assumed here that no padding
- will be added by s390_frame_info because for va_args always an even
- number of gprs has to be saved r15-r2 = 14 regs. */
- sav_ofs = 2 * UNITS_PER_LONG;
+ sav_ofs = 2 * UNITS_PER_WORD;
- if (size < UNITS_PER_LONG)
- sav_ofs += UNITS_PER_LONG - size;
+ if (size < UNITS_PER_WORD)
+ sav_ofs += UNITS_PER_WORD - size;
- sav_scale = UNITS_PER_LONG;
+ sav_scale = UNITS_PER_WORD;
max_reg = GP_ARG_NUM_REG - n_reg;
left_align_p = false;
}
/* ... Otherwise out of the overflow area. */
t = ovf;
- if (size < UNITS_PER_LONG && !left_align_p)
- t = fold_build_pointer_plus_hwi (t, UNITS_PER_LONG - size);
+ if (size < UNITS_PER_WORD && !left_align_p)
+ t = fold_build_pointer_plus_hwi (t, UNITS_PER_WORD - size);
gimplify_expr (&t, pre_p, NULL, is_gimple_val, fb_rvalue);
gimplify_assign (addr, t, pre_p);
- if (size < UNITS_PER_LONG && left_align_p)
- t = fold_build_pointer_plus_hwi (t, UNITS_PER_LONG);
+ if (size < UNITS_PER_WORD && left_align_p)
+ t = fold_build_pointer_plus_hwi (t, UNITS_PER_WORD);
else
t = fold_build_pointer_plus_hwi (t, size);
op[0] = gen_rtx_REG (Pmode, 0);
op[1] = gen_rtx_REG (Pmode, 1);
- if (TARGET_64BIT)
- {
- output_asm_insn ("basr\t%1,0", op); /* 2 byte */
- output_asm_insn ("lmg\t%0,%1,14(%1)", op); /* 6 byte */
- output_asm_insn ("br\t%1", op); /* 2 byte */
- ASM_OUTPUT_SKIP (file, (HOST_WIDE_INT)(TRAMPOLINE_SIZE - 10));
- }
- else
- {
- output_asm_insn ("basr\t%1,0", op); /* 2 byte */
- output_asm_insn ("lm\t%0,%1,6(%1)", op); /* 4 byte */
- output_asm_insn ("br\t%1", op); /* 2 byte */
- ASM_OUTPUT_SKIP (file, (HOST_WIDE_INT)(TRAMPOLINE_SIZE - 8));
- }
+ output_asm_insn ("basr\t%1,0", op); /* 2 byte */
+ output_asm_insn ("lmg\t%0,%1,14(%1)", op); /* 6 byte */
+ output_asm_insn ("br\t%1", op); /* 2 byte */
+ ASM_OUTPUT_SKIP (file, (HOST_WIDE_INT)(TRAMPOLINE_SIZE - 10));
}
/* Emit RTL insns to initialize the variable parts of a trampoline.
rtx mem;
emit_block_move (m_tramp, assemble_trampoline_template (),
- GEN_INT (2 * UNITS_PER_LONG), BLOCK_OP_NORMAL);
+ GEN_INT (2 * UNITS_PER_WORD), BLOCK_OP_NORMAL);
- mem = adjust_address (m_tramp, Pmode, 2 * UNITS_PER_LONG);
+ mem = adjust_address (m_tramp, Pmode, 2 * UNITS_PER_WORD);
emit_move_insn (mem, cxt);
- mem = adjust_address (m_tramp, Pmode, 3 * UNITS_PER_LONG);
+ mem = adjust_address (m_tramp, Pmode, 3 * UNITS_PER_WORD);
emit_move_insn (mem, fnaddr);
}
op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
- op[1] = gen_rtx_MEM (Pmode, plus_constant (Pmode, op[1], UNITS_PER_LONG));
- op[3] = GEN_INT (UNITS_PER_LONG);
+ op[1] = gen_rtx_MEM (Pmode, plus_constant (Pmode, op[1], UNITS_PER_WORD));
+ op[3] = GEN_INT (UNITS_PER_WORD);
op[2] = gen_rtx_SYMBOL_REF (Pmode, flag_fentry ? "__fentry__" : "_mcount");
SYMBOL_REF_FLAGS (op[2]) |= SYMBOL_FLAG_FUNCTION;
- if (flag_pic && !TARGET_64BIT)
- {
- op[2] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[2]), UNSPEC_PLT31);
- op[2] = gen_rtx_CONST (Pmode, op[2]);
- }
if (flag_record_mcount)
fprintf (file, "1:\n");
else
output_asm_insn ("brasl\t0,%2%K2", op);
}
- else if (TARGET_64BIT)
- {
- if (flag_nop_mcount)
- output_asm_nops ("-mnop-mcount", /* stg */ 3 + /* brasl */ 3 +
- /* lg */ 3);
- else
- {
- output_asm_insn ("stg\t%0,%1", op);
- if (flag_dwarf2_cfi_asm)
- output_asm_insn (".cfi_rel_offset\t%0,%3", op);
- output_asm_insn ("brasl\t%0,%2%K2", op);
- output_asm_insn ("lg\t%0,%1", op);
- if (flag_dwarf2_cfi_asm)
- output_asm_insn (".cfi_restore\t%0", op);
- }
- }
+
+ if (flag_nop_mcount)
+ output_asm_nops ("-mnop-mcount", /* stg */ 3 + /* brasl */ 3 +
+ /* lg */ 3);
else
{
- if (flag_nop_mcount)
- output_asm_nops ("-mnop-mcount", /* st */ 2 + /* brasl */ 3 +
- /* l */ 2);
- else
- {
- output_asm_insn ("st\t%0,%1", op);
- if (flag_dwarf2_cfi_asm)
- output_asm_insn (".cfi_rel_offset\t%0,%3", op);
- output_asm_insn ("brasl\t%0,%2%K2", op);
- output_asm_insn ("l\t%0,%1", op);
- if (flag_dwarf2_cfi_asm)
- output_asm_insn (".cfi_restore\t%0", op);
- }
+ output_asm_insn ("stg\t%0,%1", op);
+ if (flag_dwarf2_cfi_asm)
+ output_asm_insn (".cfi_rel_offset\t%0,%3", op);
+ output_asm_insn ("brasl\t%0,%2%K2", op);
+ output_asm_insn ("lg\t%0,%1", op);
+ if (flag_dwarf2_cfi_asm)
+ output_asm_insn (".cfi_restore\t%0", op);
}
if (flag_record_mcount)
{
fprintf (file, "\t.section __mcount_loc, \"a\",@progbits\n");
- fprintf (file, "\t.%s 1b\n", TARGET_64BIT ? "quad" : "long");
+ fprintf (file, "\t.quad 1b\n");
fprintf (file, "\t.previous\n");
}
}
{
const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk));
rtx op[10];
- int nonlocal = 0;
assemble_start_function (thunk, fnname);
/* Make sure unwind info is emitted for the thunk if needed. */
/* Operand 0 is the target function. */
op[0] = XEXP (DECL_RTL (function), 0);
- if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
- {
- nonlocal = 1;
- if (!TARGET_64BIT)
- {
- op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]), UNSPEC_GOT);
- op[0] = gen_rtx_CONST (Pmode, op[0]);
- }
- }
/* Operand 1 is the 'this' pointer. */
if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
op[9] = NULL_RTX;
/* Generate code. */
- if (TARGET_64BIT)
- {
- /* Setup literal pool pointer if required. */
- if ((!DISP_IN_RANGE (delta)
- && !CONST_OK_FOR_K (delta)
- && !CONST_OK_FOR_Os (delta))
- || (!DISP_IN_RANGE (vcall_offset)
- && !CONST_OK_FOR_K (vcall_offset)
- && !CONST_OK_FOR_Os (vcall_offset)))
- {
- op[5] = gen_label_rtx ();
- output_asm_insn ("larl\t%4,%5", op);
- }
-
- /* Add DELTA to this pointer. */
- if (delta)
- {
- if (CONST_OK_FOR_J (delta))
- output_asm_insn ("la\t%1,%2(%1)", op);
- else if (DISP_IN_RANGE (delta))
- output_asm_insn ("lay\t%1,%2(%1)", op);
- else if (CONST_OK_FOR_K (delta))
- output_asm_insn ("aghi\t%1,%2", op);
- else if (CONST_OK_FOR_Os (delta))
- output_asm_insn ("agfi\t%1,%2", op);
- else
- {
- op[6] = gen_label_rtx ();
- output_asm_insn ("agf\t%1,%6-%5(%4)", op);
- }
- }
-
- /* Perform vcall adjustment. */
- if (vcall_offset)
- {
- if (DISP_IN_RANGE (vcall_offset))
- {
- output_asm_insn ("lg\t%4,0(%1)", op);
- output_asm_insn ("ag\t%1,%3(%4)", op);
- }
- else if (CONST_OK_FOR_K (vcall_offset))
- {
- output_asm_insn ("lghi\t%4,%3", op);
- output_asm_insn ("ag\t%4,0(%1)", op);
- output_asm_insn ("ag\t%1,0(%4)", op);
- }
- else if (CONST_OK_FOR_Os (vcall_offset))
- {
- output_asm_insn ("lgfi\t%4,%3", op);
- output_asm_insn ("ag\t%4,0(%1)", op);
- output_asm_insn ("ag\t%1,0(%4)", op);
- }
- else
- {
- op[7] = gen_label_rtx ();
- output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
- output_asm_insn ("ag\t%4,0(%1)", op);
- output_asm_insn ("ag\t%1,0(%4)", op);
- }
- }
-
- /* Jump to target. */
- output_asm_insn ("jg\t%0%K0", op);
-
- /* Output literal pool if required. */
- if (op[5])
- {
- output_asm_insn (".align\t4", op);
- targetm.asm_out.internal_label (file, "L",
- CODE_LABEL_NUMBER (op[5]));
- }
- if (op[6])
- {
- targetm.asm_out.internal_label (file, "L",
- CODE_LABEL_NUMBER (op[6]));
- output_asm_insn (".long\t%2", op);
- }
- if (op[7])
+ /* Setup literal pool pointer if required. */
+ if ((!DISP_IN_RANGE (delta)
+ && !CONST_OK_FOR_K (delta)
+ && !CONST_OK_FOR_Os (delta))
+ || (!DISP_IN_RANGE (vcall_offset)
+ && !CONST_OK_FOR_K (vcall_offset)
+ && !CONST_OK_FOR_Os (vcall_offset)))
+ {
+ op[5] = gen_label_rtx ();
+ output_asm_insn ("larl\t%4,%5", op);
+ }
+
+ /* Add DELTA to this pointer. */
+ if (delta)
+ {
+ if (CONST_OK_FOR_J (delta))
+ output_asm_insn ("la\t%1,%2(%1)", op);
+ else if (DISP_IN_RANGE (delta))
+ output_asm_insn ("lay\t%1,%2(%1)", op);
+ else if (CONST_OK_FOR_K (delta))
+ output_asm_insn ("aghi\t%1,%2", op);
+ else if (CONST_OK_FOR_Os (delta))
+ output_asm_insn ("agfi\t%1,%2", op);
+ else
{
- targetm.asm_out.internal_label (file, "L",
- CODE_LABEL_NUMBER (op[7]));
- output_asm_insn (".long\t%3", op);
+ op[6] = gen_label_rtx ();
+ output_asm_insn ("agf\t%1,%6-%5(%4)", op);
}
}
- else
- {
- /* Setup base pointer if required. */
- if (!vcall_offset
- || (!DISP_IN_RANGE (delta)
- && !CONST_OK_FOR_K (delta)
- && !CONST_OK_FOR_Os (delta))
- || (!DISP_IN_RANGE (delta)
- && !CONST_OK_FOR_K (vcall_offset)
- && !CONST_OK_FOR_Os (vcall_offset)))
- {
- op[5] = gen_label_rtx ();
- output_asm_insn ("basr\t%4,0", op);
- targetm.asm_out.internal_label (file, "L",
- CODE_LABEL_NUMBER (op[5]));
- }
-
- /* Add DELTA to this pointer. */
- if (delta)
- {
- if (CONST_OK_FOR_J (delta))
- output_asm_insn ("la\t%1,%2(%1)", op);
- else if (DISP_IN_RANGE (delta))
- output_asm_insn ("lay\t%1,%2(%1)", op);
- else if (CONST_OK_FOR_K (delta))
- output_asm_insn ("ahi\t%1,%2", op);
- else if (CONST_OK_FOR_Os (delta))
- output_asm_insn ("afi\t%1,%2", op);
- else
- {
- op[6] = gen_label_rtx ();
- output_asm_insn ("a\t%1,%6-%5(%4)", op);
- }
- }
- /* Perform vcall adjustment. */
- if (vcall_offset)
+ /* Perform vcall adjustment. */
+ if (vcall_offset)
+ {
+ if (DISP_IN_RANGE (vcall_offset))
{
- if (CONST_OK_FOR_J (vcall_offset))
- {
- output_asm_insn ("l\t%4,0(%1)", op);
- output_asm_insn ("a\t%1,%3(%4)", op);
- }
- else if (DISP_IN_RANGE (vcall_offset))
- {
- output_asm_insn ("l\t%4,0(%1)", op);
- output_asm_insn ("ay\t%1,%3(%4)", op);
- }
- else if (CONST_OK_FOR_K (vcall_offset))
- {
- output_asm_insn ("lhi\t%4,%3", op);
- output_asm_insn ("a\t%4,0(%1)", op);
- output_asm_insn ("a\t%1,0(%4)", op);
- }
- else if (CONST_OK_FOR_Os (vcall_offset))
- {
- output_asm_insn ("iilf\t%4,%3", op);
- output_asm_insn ("a\t%4,0(%1)", op);
- output_asm_insn ("a\t%1,0(%4)", op);
- }
- else
- {
- op[7] = gen_label_rtx ();
- output_asm_insn ("l\t%4,%7-%5(%4)", op);
- output_asm_insn ("a\t%4,0(%1)", op);
- output_asm_insn ("a\t%1,0(%4)", op);
- }
-
- /* We had to clobber the base pointer register.
- Re-setup the base pointer (with a different base). */
- op[5] = gen_label_rtx ();
- output_asm_insn ("basr\t%4,0", op);
- targetm.asm_out.internal_label (file, "L",
- CODE_LABEL_NUMBER (op[5]));
+ output_asm_insn ("lg\t%4,0(%1)", op);
+ output_asm_insn ("ag\t%1,%3(%4)", op);
}
-
- /* Jump to target. */
- op[8] = gen_label_rtx ();
-
- if (!flag_pic)
- output_asm_insn ("l\t%4,%8-%5(%4)", op);
- else if (!nonlocal)
- output_asm_insn ("a\t%4,%8-%5(%4)", op);
- /* We cannot call through .plt, since .plt requires %r12 loaded. */
- else if (flag_pic == 1)
+ else if (CONST_OK_FOR_K (vcall_offset))
{
- output_asm_insn ("a\t%4,%8-%5(%4)", op);
- output_asm_insn ("l\t%4,%0(%4)", op);
+ output_asm_insn ("lghi\t%4,%3", op);
+ output_asm_insn ("ag\t%4,0(%1)", op);
+ output_asm_insn ("ag\t%1,0(%4)", op);
}
- else if (flag_pic == 2)
+ else if (CONST_OK_FOR_Os (vcall_offset))
{
- op[9] = gen_rtx_REG (Pmode, 0);
- output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
- output_asm_insn ("a\t%4,%8-%5(%4)", op);
- output_asm_insn ("ar\t%4,%9", op);
- output_asm_insn ("l\t%4,0(%4)", op);
+ output_asm_insn ("lgfi\t%4,%3", op);
+ output_asm_insn ("ag\t%4,0(%1)", op);
+ output_asm_insn ("ag\t%1,0(%4)", op);
}
-
- output_asm_insn ("br\t%4", op);
-
- /* Output literal pool. */
- output_asm_insn (".align\t4", op);
-
- if (nonlocal && flag_pic == 2)
- output_asm_insn (".long\t%0", op);
- if (nonlocal)
+ else
{
- op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
- SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
+ op[7] = gen_label_rtx ();
+ output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
+ output_asm_insn ("ag\t%4,0(%1)", op);
+ output_asm_insn ("ag\t%1,0(%4)", op);
}
+ }
- targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
- if (!flag_pic)
- output_asm_insn (".long\t%0", op);
- else
- output_asm_insn (".long\t%0-%5", op);
+ /* Jump to target. */
+ output_asm_insn ("jg\t%0%K0", op);
- if (op[6])
- {
- targetm.asm_out.internal_label (file, "L",
- CODE_LABEL_NUMBER (op[6]));
- output_asm_insn (".long\t%2", op);
- }
- if (op[7])
- {
- targetm.asm_out.internal_label (file, "L",
- CODE_LABEL_NUMBER (op[7]));
- output_asm_insn (".long\t%3", op);
- }
+ /* Output literal pool if required. */
+ if (op[5])
+ {
+ output_asm_insn (".align\t4", op);
+ targetm.asm_out.internal_label (file, "L",
+ CODE_LABEL_NUMBER (op[5]));
+ }
+ if (op[6])
+ {
+ targetm.asm_out.internal_label (file, "L",
+ CODE_LABEL_NUMBER (op[6]));
+ output_asm_insn (".long\t%2", op);
}
+ if (op[7])
+ {
+ targetm.asm_out.internal_label (file, "L",
+ CODE_LABEL_NUMBER (op[7]));
+ output_asm_insn (".long\t%3", op);
+ }
+
final_end_function ();
assemble_end_function (thunk, fnname);
}
ASM_OUTPUT_LABEL (asm_out_file, label);
}
- if (!TARGET_ZARCH)
- fputs ("\t.machinemode zarch\n", asm_out_file);
-
if (REG_P (execute_target))
fprintf (asm_out_file, "\tex\t%%r0,0(%%r%d)\n", REGNO (execute_target));
else
output_asm_insn ("\texrl\t%%r0,%0", &execute_target);
- if (!TARGET_ZARCH)
- fputs ("\t.machinemode esa\n", asm_out_file);
-
fputs ("0:\tj\t0b\n", asm_out_file);
}
static bool
s390_valid_pointer_mode (scalar_int_mode mode)
{
- return (mode == SImode || (TARGET_64BIT && mode == DImode));
+ return mode == SImode || mode == DImode;
}
/* Checks whether the given CALL_EXPR would use a caller
if (REG_P (parm_rtx))
{
int size = s390_function_arg_size (arg.mode, arg.type);
- int nregs = (size + UNITS_PER_LONG - 1) / UNITS_PER_LONG;
+ int nregs = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
for (reg = 0; reg < nregs; reg++)
if (!call_used_or_fixed_reg_p (reg + REGNO (parm_rtx)))
if (TARGET_TPF_PROFILING)
return false;
- /* The 31 bit PLT code uses register 12 (GOT pointer - caller saved)
- which would have to be restored before the sibcall. */
- if (!TARGET_64BIT && flag_pic && decl && !targetm.binds_local_p (decl))
- return false;
-
/* The thunks for indirect branches require r1 if no exrl is
available. r1 might not be available when doing a sibling
call. */
s390_emit_call (rtx addr_location, rtx tls_call, rtx result_reg,
rtx retaddr_reg)
{
- bool plt31_call_p = false;
rtx_insn *insn;
rtx vec[4] = { NULL_RTX };
int elts = 0;
rtx *clobber_thunk_reg = &vec[3];
int i;
- /* Direct function calls need special treatment. */
- if (GET_CODE (addr_location) == SYMBOL_REF)
- {
- /* When calling a global routine in PIC mode, we must
- replace the symbol itself with the PLT stub. */
- if (flag_pic && !SYMBOL_REF_LOCAL_P (addr_location) && !TARGET_64BIT)
- {
- if (retaddr_reg != NULL_RTX)
- {
- addr_location = gen_rtx_UNSPEC (Pmode,
- gen_rtvec (1, addr_location),
- UNSPEC_PLT31);
- addr_location = gen_rtx_CONST (Pmode, addr_location);
- plt31_call_p = true;
- }
- else
- /* For -fpic code the PLT entries might use r12 which is
- call-saved. Therefore we cannot do a sibcall when
- calling directly using a symbol ref. When reaching
- this point we decided (in s390_function_ok_for_sibcall)
- to do a sibcall for a function pointer but one of the
- optimizers was able to get rid of the function pointer
- by propagating the symbol ref into the call. This
- optimization is illegal for S/390 so we turn the direct
- call into a indirect call again. */
- addr_location = force_reg (Pmode, addr_location);
- }
- }
-
/* If it is already an indirect call or the code above moved the
SYMBOL_REF to somewhere else make sure the address can be found in
register 1. */
if (retaddr_reg == NULL_RTX
- && GET_CODE (addr_location) != SYMBOL_REF
- && !plt31_call_p)
+ && GET_CODE (addr_location) != SYMBOL_REF)
{
emit_move_insn (gen_rtx_REG (Pmode, SIBCALL_REGNUM), addr_location);
addr_location = gen_rtx_REG (Pmode, SIBCALL_REGNUM);
}
if (TARGET_INDIRECT_BRANCH_NOBP_CALL
- && GET_CODE (addr_location) != SYMBOL_REF
- && !plt31_call_p)
+ && GET_CODE (addr_location) != SYMBOL_REF)
{
/* Indirect branch thunks require the target to be a single GPR. */
addr_location = force_reg (Pmode, addr_location);
insn = emit_call_insn (*call);
- /* 31-bit PLT stubs and tls calls use the GOT register implicitly. */
- if (plt31_call_p || tls_call != NULL_RTX)
+ /* tls calls use the GOT register implicitly. */
+ if (tls_call != NULL_RTX)
{
/* s390_function_ok_for_sibcall should
have denied sibcalls in this case. */
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
fixed_regs[BASE_REGNUM] = 0;
fixed_regs[RETURN_REGNUM] = 0;
- if (TARGET_64BIT)
- {
- for (i = FPR8_REGNUM; i <= FPR15_REGNUM; i++)
- call_used_regs[i] = 0;
- }
- else
- {
- call_used_regs[FPR4_REGNUM] = 0;
- call_used_regs[FPR6_REGNUM] = 0;
- }
+
+ for (i = FPR8_REGNUM; i <= FPR15_REGNUM; i++)
+ call_used_regs[i] = 0;
if (TARGET_SOFT_FLOAT)
{
if (cfun_frame_layout.first_save_gpr != -1)
save_gprs (base,
off + (cfun_frame_layout.first_save_gpr
- - first) * UNITS_PER_LONG,
+ - first) * UNITS_PER_WORD,
cfun_frame_layout.first_save_gpr,
cfun_frame_layout.last_save_gpr, insn);
{
rtx rpat = restore_gprs (base,
off + (cfun_frame_layout.first_restore_gpr
- - first) * UNITS_PER_LONG,
+ - first) * UNITS_PER_WORD,
cfun_frame_layout.first_restore_gpr,
cfun_frame_layout.last_restore_gpr);
s390_option_override_internal (struct gcc_options *opts,
struct gcc_options *opts_set)
{
- /* Architecture mode defaults according to ABI. */
- if (!(opts_set->x_target_flags & MASK_ZARCH))
- {
- if (TARGET_64BIT)
- opts->x_target_flags |= MASK_ZARCH;
- else
- opts->x_target_flags &= ~MASK_ZARCH;
- }
-
/* Set the march default in case it hasn't been specified on cmdline. */
if (!opts_set->x_s390_arch)
opts->x_s390_arch = PROCESSOR_2064_Z900;
if (opts->x_s390_arch == PROCESSOR_NATIVE
|| opts->x_s390_tune == PROCESSOR_NATIVE)
gcc_unreachable ();
- if (TARGET_64BIT && !TARGET_ZARCH_P (opts->x_target_flags))
- error ("64-bit ABI not supported in ESA/390 mode");
if (opts->x_s390_indirect_branch == indirect_branch_thunk_inline
|| opts->x_s390_indirect_branch_call == indirect_branch_thunk_inline
}
/* Enable hardware transactions if available and not explicitly
- disabled by user. E.g. with -m31 -march=zEC12 -mzarch */
+ disabled by user. E.g. with -march=zEC12. */
if (!TARGET_OPT_HTM_P (opts_set->x_target_flags))
{
- if (TARGET_CPU_HTM_P (opts) && TARGET_ZARCH_P (opts->x_target_flags))
+ if (TARGET_CPU_HTM_P (opts))
opts->x_target_flags |= MASK_OPT_HTM;
else
opts->x_target_flags &= ~MASK_OPT_HTM;
}
else
{
- if (TARGET_CPU_VX_P (opts) && TARGET_ZARCH_P (opts->x_target_flags))
+ if (TARGET_CPU_VX_P (opts))
/* Enable vector support if available and not explicitly disabled
- by user. E.g. with -m31 -march=z13 -mzarch */
+ by user. E.g. with -march=z13. */
opts->x_target_flags |= MASK_OPT_VX;
else
opts->x_target_flags &= ~MASK_OPT_VX;
}
- /* Use hardware DFP if available and not explicitly disabled by
- user. E.g. with -m31 -march=z10 -mzarch */
+ /* Use hardware DFP if available and not explicitly disabled by user. */
if (!TARGET_HARD_DFP_P (opts_set->x_target_flags))
{
if (TARGET_DFP_P (opts))
error ("hardware decimal floating-point instructions"
" not available on %s",
processor_table[(int)opts->x_s390_arch].name);
- if (!TARGET_ZARCH_P (opts->x_target_flags))
- error ("hardware decimal floating-point instructions"
- " not available in ESA/390 mode");
}
else
opts->x_target_flags &= ~MASK_HARD_DFP;
else
SET_OPTION_IF_UNSET (opts, opts_set, param_vect_partial_vector_usage, 0);
+ if (flag_m31)
+ error ("%<-m31%> is no longer supported");
+ if (flag_mesa)
+ error ("%<-mesa%> is no longer supported");
+
/* Set the default alignment. */
s390_default_align (opts);
/* Call target specific restore function to do post-init work. At the moment,
this just sets opts->x_s390_cost_pointer. */
s390_function_specific_restore (opts, opts_set, NULL);
-
- /* Check whether -mfentry is supported. It cannot be used in 31-bit mode,
- because 31-bit PLT stubs assume that %r12 contains GOT address, which is
- not the case when the code runs before the prolog. */
- if (opts->x_flag_fentry && !TARGET_64BIT)
- error ("%<-mfentry%> is supported only for 64-bit CPUs");
}
static void
/* Flags which affect the ABI and in general prevent inlining. */
unsigned HOST_WIDE_INT must_match_masks
- = (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP | MASK_SOFT_FLOAT
- | MASK_LONG_DOUBLE_128 | MASK_OPT_VX);
+ = (MASK_HARD_DFP | MASK_SOFT_FLOAT | MASK_LONG_DOUBLE_128 | MASK_OPT_VX);
/* Flags which we in general want to prevent inlining but accept for
always_inline. */
enum by_pieces_operation op ATTRIBUTE_UNUSED,
bool speed_p ATTRIBUTE_UNUSED)
{
- return (size == 1 || size == 2
- || size == 4 || (TARGET_ZARCH && size == 8));
+ return size == 1 || size == 2 || size == 4 || size == 8;
}
/* Implement TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook. */
return V16QImode;
default:;
}
- return word_mode;
+ return DImode;
}
/* Our hardware does not require vectors to be strictly aligned. */
emit_label (loop_end);
LABEL_NUSES (loop_end) = 1;
- if (TARGET_64BIT)
- {
- lens = convert_to_mode (V2DImode, lens, 1);
- emit_insn (gen_vec_extractv2didi (offset, lens, GEN_INT (0)));
- }
- else
- {
- lens = convert_to_mode (V4SImode, lens, 1);
- emit_insn (gen_vec_extractv4sisi (offset, lens, GEN_INT (1)));
- }
+ lens = convert_to_mode (V2DImode, lens, 1);
+ emit_insn (gen_vec_extractv2didi (offset, lens, GEN_INT (0)));
force_expand_binop (Pmode, add_optab, addr, offset, dst, 1, OPTAB_DIRECT);
}
static unsigned HOST_WIDE_INT
s390_asan_shadow_offset (void)
{
- return TARGET_64BIT ? HOST_WIDE_INT_1U << 52 : HOST_WIDE_INT_UC (0x20000000);
+ return HOST_WIDE_INT_1U << 52;
}
#ifdef HAVE_GAS_HIDDEN
fputs ("\t.machine push\n", asm_out_file);
fputs ("\t.machine z10\n", asm_out_file);
}
- /* We use exrl even if -mzarch hasn't been specified on the
- command line so we have to tell the assembler to accept
- it. */
- if (!TARGET_ZARCH)
- fputs ("\t.machinemode zarch\n", asm_out_file);
fputs ("\texrl\t0,1f\n", asm_out_file);
- if (!TARGET_ZARCH)
- fputs ("\t.machinemode esa\n", asm_out_file);
-
if (!TARGET_CPU_Z10)
fputs ("\t.machine pop\n", asm_out_file);
}
bool
s390_bitint_type_info (int n, struct bitint_info *info)
{
- if (!TARGET_64BIT)
- return false;
if (n <= 8)
info->limb_mode = QImode;
else if (n <= 16)
#define s390_tune_attr ((enum attr_cpu)(s390_tune > PROCESSOR_9175_Z17 ? PROCESSOR_9175_Z17 : s390_tune ))
/* These flags indicate that the generated code should run on a cpu
- providing the respective hardware facility regardless of the
- current cpu mode (ESA or z/Architecture). */
+ providing the respective hardware facility. */
#define TARGET_CPU_IEEE_FLOAT \
(s390_arch_flags & PF_IEEE_FLOAT)
providing the respective hardware facility when run in
z/Architecture mode. */
-#define TARGET_LONG_DISPLACEMENT \
- (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
+#define TARGET_LONG_DISPLACEMENT TARGET_CPU_LONG_DISPLACEMENT
#define TARGET_LONG_DISPLACEMENT_P(opts) \
- (TARGET_ZARCH_P (opts->x_target_flags) \
- && TARGET_CPU_LONG_DISPLACEMENT_P (opts))
-#define TARGET_EXTIMM \
- (TARGET_ZARCH && TARGET_CPU_EXTIMM)
-#define TARGET_EXTIMM_P(opts) \
- (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_EXTIMM_P (opts))
-#define TARGET_DFP \
- (TARGET_ZARCH && TARGET_CPU_DFP && TARGET_HARD_FLOAT)
+ (TARGET_CPU_LONG_DISPLACEMENT_P (opts))
+#define TARGET_EXTIMM TARGET_CPU_EXTIMM
+#define TARGET_EXTIMM_P(opts) (TARGET_CPU_EXTIMM_P (opts))
+#define TARGET_DFP (TARGET_CPU_DFP && TARGET_HARD_FLOAT)
#define TARGET_DFP_P(opts) \
- (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_DFP_P (opts) \
+ (TARGET_CPU_DFP_P (opts) \
&& TARGET_HARD_FLOAT_P (opts->x_target_flags))
-#define TARGET_Z10 \
- (TARGET_ZARCH && TARGET_CPU_Z10)
-#define TARGET_Z10_P(opts) \
- (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z10_P (opts))
-#define TARGET_Z196 \
- (TARGET_ZARCH && TARGET_CPU_Z196)
-#define TARGET_Z196_P(opts) \
- (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z196_P (opts))
-#define TARGET_ZEC12 \
- (TARGET_ZARCH && TARGET_CPU_ZEC12)
-#define TARGET_ZEC12_P(opts) \
- (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_ZEC12_P (opts))
+#define TARGET_Z10 TARGET_CPU_Z10
+#define TARGET_Z10_P(opts) (TARGET_CPU_Z10_P (opts))
+#define TARGET_Z196 TARGET_CPU_Z196
+#define TARGET_Z196_P(opts) (TARGET_CPU_Z196_P (opts))
+#define TARGET_ZEC12 TARGET_CPU_ZEC12
+#define TARGET_ZEC12_P(opts) (TARGET_CPU_ZEC12_P (opts))
#define TARGET_HTM (TARGET_OPT_HTM)
#define TARGET_HTM_P(opts) (TARGET_OPT_HTM_P (opts->x_target_flags))
-#define TARGET_Z13 \
- (TARGET_ZARCH && TARGET_CPU_Z13)
-#define TARGET_Z13_P(opts) \
- (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z13_P (opts))
-#define TARGET_VX \
- (TARGET_ZARCH && TARGET_CPU_VX && TARGET_OPT_VX && TARGET_HARD_FLOAT)
+#define TARGET_Z13 TARGET_CPU_Z13
+#define TARGET_Z13_P(opts) (TARGET_CPU_Z13_P (opts))
+#define TARGET_VX (TARGET_CPU_VX && TARGET_OPT_VX && TARGET_HARD_FLOAT)
#define TARGET_VX_P(opts) \
- (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_VX_P (opts) \
+ (TARGET_CPU_VX_P (opts) \
&& TARGET_OPT_VX_P (opts->x_target_flags) \
&& TARGET_HARD_FLOAT_P (opts->x_target_flags))
-#define TARGET_Z14 (TARGET_ZARCH && TARGET_CPU_Z14)
-#define TARGET_Z14_P(opts) \
- (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z14_P (opts))
-#define TARGET_VXE \
- (TARGET_VX && TARGET_CPU_VXE)
-#define TARGET_VXE_P(opts) \
- (TARGET_VX_P (opts) && TARGET_CPU_VXE_P (opts))
-#define TARGET_Z15 (TARGET_ZARCH && TARGET_CPU_Z15)
-#define TARGET_Z15_P(opts) \
- (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z15_P (opts))
-#define TARGET_VXE2 \
- (TARGET_VX && TARGET_CPU_VXE2)
-#define TARGET_VXE2_P(opts) \
- (TARGET_VX_P (opts) && TARGET_CPU_VXE2_P (opts))
-#define TARGET_Z16 (TARGET_ZARCH && TARGET_CPU_Z16)
-#define TARGET_Z16_P(opts) \
- (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z16_P (opts))
-#define TARGET_NNPA \
- (TARGET_ZARCH && TARGET_CPU_NNPA)
-#define TARGET_NNPA_P(opts) \
- (TARGET_ZARCH_P (opts) && TARGET_CPU_NNPA_P (opts))
-#define TARGET_VXE3 \
- (TARGET_VX && TARGET_CPU_VXE3)
-#define TARGET_VXE3_P(opts) \
- (TARGET_VX_P (opts) && TARGET_CPU_VXE3_P (opts))
-#define TARGET_Z17 (TARGET_ZARCH && TARGET_CPU_Z17)
-#define TARGET_Z17_P(opts) \
- (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z17_P (opts))
+#define TARGET_Z14 TARGET_CPU_Z14
+#define TARGET_Z14_P(opts) (TARGET_CPU_Z14_P (opts))
+#define TARGET_VXE (TARGET_VX && TARGET_CPU_VXE)
+#define TARGET_VXE_P(opts) (TARGET_VX_P (opts) && TARGET_CPU_VXE_P (opts))
+#define TARGET_Z15 TARGET_CPU_Z15
+#define TARGET_Z15_P(opts) (TARGET_CPU_Z15_P (opts))
+#define TARGET_VXE2 (TARGET_VX && TARGET_CPU_VXE2)
+#define TARGET_VXE2_P(opts) (TARGET_VX_P (opts) && TARGET_CPU_VXE2_P (opts))
+#define TARGET_Z16 TARGET_CPU_Z16
+#define TARGET_Z16_P(opts) (TARGET_CPU_Z16_P (opts))
+#define TARGET_NNPA TARGET_CPU_NNPA
+#define TARGET_NNPA_P(opts) (TARGET_CPU_NNPA_P (opts))
+#define TARGET_VXE3 (TARGET_VX && TARGET_CPU_VXE3)
+#define TARGET_VXE3_P(opts) (TARGET_VX_P (opts) && TARGET_CPU_VXE3_P (opts))
+#define TARGET_Z17 TARGET_CPU_Z17
+#define TARGET_Z17_P(opts) (TARGET_CPU_Z17_P (opts))
#if defined(HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13)
#define TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS TARGET_Z13
/* Target CPU builtins. */
#define TARGET_CPU_CPP_BUILTINS() s390_cpu_cpp_builtins (pfile)
-#ifdef DEFAULT_TARGET_64BIT
-#define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP \
- | MASK_OPT_HTM | MASK_OPT_VX)
-#else
-#define TARGET_DEFAULT 0
-#endif
+#define TARGET_DEFAULT (MASK_HARD_DFP | MASK_OPT_HTM | MASK_OPT_VX)
/* Support for configure-time defaults.
The order here is important so that -march doesn't squash the
tune values. */
#define OPTION_DEFAULT_SPECS \
- { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" }, \
{ "tune", "%{!mtune=*:%{!march=*:-mtune=%(VALUE)}}" }, \
{ "arch", "%{!march=*:-march=%(VALUE)}" }
#define MARCH_MTUNE_NATIVE_SPECS \
"%{mtune=native:%<mtune=native %:local_cpu_detect(tune)} " \
"%{march=native:%<march=native" \
- " %:local_cpu_detect(arch %{mesa|mzarch:mesa_mzarch})}"
+ " %:local_cpu_detect(arch)}"
#else
# define MARCH_MTUNE_NATIVE_SPECS ""
#endif
-#ifdef DEFAULT_TARGET_64BIT
-#define S390_TARGET_BITS_STRING "64"
-#else
-#define S390_TARGET_BITS_STRING "31"
-#endif
-
/* Defaulting rules. */
#define DRIVER_SELF_SPECS \
MARCH_MTUNE_NATIVE_SPECS, \
- "%{!m31:%{!m64:-m" S390_TARGET_BITS_STRING "}}", \
- "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
"%{!march=*:-march=z900}"
/* Target machine storage layout. */
being accessed. */
#define STACK_CHECK_MOVING_SP 1
-#ifndef IN_LIBGCC2
-
/* Width of a word, in units (bytes). */
- #define UNITS_PER_WORD (TARGET_ZARCH ? 8 : 4)
-
-/* Width of a pointer. To be used instead of UNITS_PER_WORD in
- ABI-relevant contexts. This always matches
- GET_MODE_SIZE (Pmode). */
- #define UNITS_PER_LONG (TARGET_64BIT ? 8 : 4)
- #define MIN_UNITS_PER_WORD 4
- #define MAX_BITS_PER_WORD 64
-#else
-
- /* In libgcc, UNITS_PER_WORD has ABI-relevant effects, e.g. whether
- the library should export TImode functions or not. Thus, we have
- to redefine UNITS_PER_WORD depending on __s390x__ for libgcc. */
- #ifdef __s390x__
- #define UNITS_PER_WORD 8
- #else
- #define UNITS_PER_WORD 4
- #endif
-#endif
+#define UNITS_PER_WORD 8
/* Width of a pointer, in bits. */
-#define POINTER_SIZE (TARGET_64BIT ? 64 : 32)
+#define POINTER_SIZE 64
/* Allocation boundary (in *bits*) for storing arguments in argument list. */
-#define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
+#define PARM_BOUNDARY 64
/* Boundary (in *bits*) on which stack pointer should be aligned. */
#define STACK_BOUNDARY 64
NONLOCAL needs twice Pmode to maintain both backchain and SP. */
#define STACK_SAVEAREA_MODE(LEVEL) \
((LEVEL) == SAVE_FUNCTION ? VOIDmode \
- : (LEVEL) == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
+ : (LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)
/* Type layout. */
/* Sizes in bits of the source language data types. */
#define SHORT_TYPE_SIZE 16
#define INT_TYPE_SIZE 32
-#define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
+#define LONG_TYPE_SIZE 64
#define LONG_LONG_TYPE_SIZE 64
/* We use "unsigned char" as default. */
The 'fake' hard registers are call-clobbered and fixed.
The access registers are call-saved and fixed.
- On 31-bit, FPRs 18-19 are call-clobbered;
- on 64-bit, FPRs 24-31 are call-clobbered.
+ FPRs 24-31 are call-clobbered.
The remaining FPRs are call-saved.
All non-FP vector registers are call-clobbered v16-v31. */
dynamic allocations (alloca), and finally the local variables. */
/* Offset from stack-pointer to first location of outgoing args. */
-#define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
+#define STACK_POINTER_OFFSET 160
/* Offset from the stack pointer register to an item dynamically
allocated on the stack, e.g., by `alloca'. */
#define DYNAMIC_CHAIN_ADDRESS(FRAME) \
(TARGET_PACKED_STACK ? \
plus_constant (Pmode, (FRAME), \
- STACK_POINTER_OFFSET - UNITS_PER_LONG) : (FRAME))
+ STACK_POINTER_OFFSET - UNITS_PER_WORD) : (FRAME))
/* For -mpacked-stack this adds 160 - 8 (96 - 4) to the output of
builtin_frame_address. Otherwise arg pointer -
#define RETURN_ADDR_RTX(COUNT, FRAME) \
s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
-/* In 31-bit mode, we need to mask off the high bit of return addresses. */
-#define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
-
/* Exception handling. */
: DW_EH_PE_absptr)
/* Register save slot alignment. */
-#define DWARF_CIE_DATA_ALIGNMENT (-UNITS_PER_LONG)
+#define DWARF_CIE_DATA_ALIGNMENT (-UNITS_PER_WORD)
/* Let the assembler generate debug line info. */
#define DWARF2_ASM_LINE_DEBUG_INFO 1
#define LAST_VEC_ARG_REGNO 53
/* Arguments can be placed in general registers 2 to 6, or in floating
- point registers 0 and 2 for 31 bit and fprs 0, 2, 4 and 6 for 64
- bit. */
+ point registers 0, 2, 4 and 6. */
#define FUNCTION_ARG_REGNO_P(N) \
(((N) >=2 && (N) < 7) || (N) == 16 || (N) == 17 \
- || (TARGET_64BIT && ((N) == 18 || (N) == 19)) \
+ || ((N) == 18 || (N) == 19) \
|| (TARGET_VX && ((N) >= FIRST_VEC_ARG_REGNO && (N) <= LAST_VEC_ARG_REGNO)))
/* Trampolines for nested functions. */
-#define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
+#define TRAMPOLINE_SIZE 32
#define TRAMPOLINE_ALIGNMENT BITS_PER_WORD
/* Addressing modes, and classification of registers for them. */
/* An integer expression for the size in bits of the largest integer machine
mode that should actually be used. We allow pairs of registers. */
-#define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
+#define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
/* The maximum number of bytes that a single instruction can move quickly
between memory and registers or between two memory locations. */
-#define MOVE_MAX (TARGET_ZARCH ? 16 : 8)
-#define MOVE_MAX_PIECES (TARGET_ZARCH ? 8 : 4)
+#define MOVE_MAX 16
+#define MOVE_MAX_PIECES 8
#define MAX_MOVE_MAX 16
/* Don't perform CSE on function addresses. */
to split a struct move into several word-size moves. For S/390
only small values make sense here since struct moves are relatively
cheap thanks to mvc so the small default value chosen for archs
- with memmove patterns should be ok. But this value is multiplied
- in tree-sra with UNITS_PER_WORD to make a decision so we adjust it
- here to compensate for that factor since mvc costs exactly the same
- on 31 and 64 bit. */
-#define MOVE_RATIO(speed) (TARGET_64BIT? 2 : 4)
+ with memmove patterns should be ok. */
+#define MOVE_RATIO(speed) 2
/* Sections. */
/* Output before writable (uninitialized) data. */
#define BSS_SECTION_ASM_OP ".bss"
-/* S/390 constant pool breaks the devices in crtstuff.c to control section
- in where code resides. We have to write it as asm code. */
-#ifndef __s390x__
-#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
- asm (SECTION_OP "\n\
- bras\t%r2,1f\n\
-0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
-1: l\t%r3,0(%r2)\n\
- bas\t%r14,0(%r3,%r2)\n\
- .previous");
-#endif
-
/* Position independent code. */
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
do { \
char buf[32]; \
- fputs (integer_asm_op (UNITS_PER_LONG, TRUE), (FILE)); \
+ fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
assemble_name ((FILE), buf); \
fputc ('\n', (FILE)); \
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
do { \
char buf[32]; \
- fputs (integer_asm_op (UNITS_PER_LONG, TRUE), (FILE)); \
+ fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
assemble_name ((FILE), buf); \
fputc ('-', (FILE)); \
/* Specify the machine mode that this machine uses for the index in the
tablejump instruction. */
-#define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
+#define CASE_VECTOR_MODE DImode
/* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */
-#define Pmode (TARGET_64BIT ? DImode : SImode)
-
-/* This is -1 for "pointer mode" extend. See ptr_extend in s390.md. */
-#define POINTERS_EXTEND_UNSIGNED -1
+#define Pmode DImode
/* A function address in a call instruction is a byte address (for
indexing purposes) so give the MEM rtx a byte's mode. */
UNSPEC_GOTENT
UNSPEC_GOT
UNSPEC_GOTOFF
- UNSPEC_PLT31
UNSPEC_PLTOFF
; Literal pool
(const (symbol_ref "s390_tune_attr")))
(define_attr "cpu_facility"
- "standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vx,z13,z14,vxe,z15,vxe2,z16,nnpa,vxe3,z17"
+ "standard,ieee,longdisp,extimm,dfp,z10,z196,zEC12,vx,z13,z14,vxe,z15,vxe2,z16,nnpa,vxe3,z17"
(const_string "standard"))
(define_attr "enabled" ""
(match_test "TARGET_CPU_IEEE_FLOAT"))
(const_int 1)
- (and (eq_attr "cpu_facility" "zarch")
- (match_test "TARGET_ZARCH"))
- (const_int 1)
-
(and (eq_attr "cpu_facility" "longdisp")
(match_test "TARGET_LONG_DISPLACEMENT"))
(const_int 1)
(match_test "TARGET_DFP"))
(const_int 1)
- (eq_attr "cpu_facility" "cpu_zarch")
- (const_int 1)
-
(and (eq_attr "cpu_facility" "z10")
(match_test "TARGET_Z10"))
(const_int 1)
; 32 bit int<->fp conversion instructions are available since VXE2 (z15).
(define_mode_iterator VX_CONV_BFP [DF (SF "TARGET_VXE2")])
-;; These mode iterators allow 31-bit and 64-bit GPR patterns to be generated
+;; These mode iterators allow 32-bit and 64-bit GPR patterns to be generated
;; from the same template.
-(define_mode_iterator GPR [(DI "TARGET_ZARCH") SI])
-(define_mode_iterator DGPR [(TI "TARGET_ZARCH") DI SI])
+(define_mode_iterator TDSI [TI DI SI])
(define_mode_iterator DSI [DI SI])
(define_mode_iterator TDI [TI DI])
-;; These mode iterators allow :P to be used for patterns that operate on
-;; pointer-sized quantities. Exactly one of the two alternatives will match.
-(define_mode_iterator P [(DI "TARGET_64BIT") (SI "!TARGET_64BIT")])
-
-;; These macros refer to the actual word_mode of the configuration.
-;; This is equal to Pmode except on 31-bit machines in zarch mode.
-(define_mode_iterator DW [(TI "TARGET_ZARCH") (DI "!TARGET_ZARCH")])
-(define_mode_iterator W [(DI "TARGET_ZARCH") (SI "!TARGET_ZARCH")])
-
-;; Used by the umul pattern to express modes having half the size.
-(define_mode_attr DWH [(TI "DI") (DI "SI")])
-(define_mode_attr dwh [(TI "di") (DI "si")])
-
;; This mode iterator allows the QI and HI patterns to be defined from
;; the same template.
(define_mode_iterator HQI [HI QI])
;; This mode iterator allows the integer patterns to be defined from the
;; same template.
-(define_mode_iterator INT [(DI "TARGET_ZARCH") SI HI QI])
-(define_mode_iterator DINT [(TI "TARGET_ZARCH") DI SI HI QI])
+(define_mode_iterator INT [DI SI HI QI])
+(define_mode_iterator DINT [TI DI SI HI QI])
(define_mode_iterator SINT [SI HI QI])
;; This iterator allows some 'ashift' and 'lshiftrt' pattern to be defined from
(define_mode_attr _d [(TF "") (FPRX2 "") (DF "") (SF "") (TD "d") (DD "d")
(SD "d")])
-;; In GPR and P templates, a constraint like "<d0>" will expand to "d" in DImode
-;; and "0" in SImode. This allows to combine instructions of which the 31bit
+;; In DSI templates, a constraint like "<d0>" will expand to "d" in DImode
+;; and "0" in SImode. This allows to combine instructions of which the 32bit
;; version only operates on one register.
(define_mode_attr d0 [(DI "d") (SI "0")])
-;; In combination with d0 this allows to combine instructions of which the 31bit
+;; In combination with d0 this allows to combine instructions of which the 32bit
;; version only operates on one register. The DImode version needs an additional
;; register for the assembler output.
(define_mode_attr 1 [(DI "%1,") (SI "")])
;; in "RSE" for TImode and "RS" for DImode.
(define_mode_attr TE [(TI "E") (DI "")])
-;; In GPR templates, a string like "lc<g>r" will expand to "lcgr" in DImode
+;; In DSI templates, a string like "lc<g>r" will expand to "lcgr" in DImode
;; and "lcr" in SImode.
(define_mode_attr g [(DI "g") (SI "")])
-;; In GPR templates, a string like "sl<y>" will expand to "slg" in DImode
+;; In DSI templates, a string like "sl<y>" will expand to "slg" in DImode
;; and "sly" in SImode. This is useful because on 64bit the ..g instructions
-;; were enhanced with long displacements whereas 31bit instructions got a ..y
+;; were enhanced with long displacements whereas 32bit instructions got a ..y
;; variant for long displacements.
(define_mode_attr y [(DI "g") (SI "y")])
-;; In DW templates, a string like "cds<g>" will expand to "cdsg" in TImode
-;; and "cds" in DImode.
-(define_mode_attr tg [(TI "g") (DI "")])
-
;; In TDI templates, a string like "c<d>sg".
(define_mode_attr td [(TI "d") (DI "")])
-;; In GPR templates, a string like "c<gf>dbr" will expand to "cgdbr" in DImode
+;; In DSI templates, a string like "c<gf>dbr" will expand to "cgdbr" in DImode
;; and "cfdbr" in SImode.
(define_mode_attr gf [(DI "g") (SI "f") (DF "g") (SF "f")])
-;; In GPR templates, a string like sll<gk> will expand to sllg for DI
+;; In DSI templates, a string like sll<gk> will expand to sllg for DI
;; and sllk for SI. This way it is possible to merge the new z196 SI
;; 3 operands shift instructions into the existing patterns.
(define_mode_attr gk [(DI "g") (SI "k")])
(match_operand:DI 1 "immediate_operand"
"N0HD0,N1HD0,N2HD0,N3HD0"))
(match_operand:DI 2 "immediate_operand" "n,n,n,n")))]
- "TARGET_ZARCH
- && s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], true))
+ "s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], true))
&& s390_single_part (operands[1], DImode, HImode, 0) >= 0"
"@
tmhh\t%0,%i1
(match_operand:DI 1 "const0_operand" "")))
(set (match_operand:DI 2 "register_operand" "=d,d")
(sign_extend:DI (match_dup 0)))]
- "s390_match_ccmode(insn, CCSmode) && TARGET_ZARCH"
+ "s390_match_ccmode(insn, CCSmode)"
"ltgfr\t%2,%0
ltgf\t%2,%0"
[(set_attr "op_type" "RRE,RXY")
; ltr, lt, ltgr, ltg
(define_insn "*tst<mode>_extimm"
[(set (reg CC_REGNUM)
- (compare (match_operand:GPR 0 "nonimmediate_operand" "d,T")
- (match_operand:GPR 1 "const0_operand" "")))
- (set (match_operand:GPR 2 "register_operand" "=d,d")
+ (compare (match_operand:DSI 0 "nonimmediate_operand" "d,T")
+ (match_operand:DSI 1 "const0_operand" "")))
+ (set (match_operand:DSI 2 "register_operand" "=d,d")
(match_dup 0))]
"s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM"
"@
; Peephole to combine a load-and-test from volatile memory which combine does
; not do.
(define_peephole2
- [(set (match_operand:GPR 0 "register_operand")
- (match_operand:GPR 2 "memory_operand"))
+ [(set (match_operand:DSI 0 "register_operand")
+ (match_operand:DSI 2 "memory_operand"))
(set (reg CC_REGNUM)
- (compare (match_dup 0) (match_operand:GPR 1 "const0_operand")))]
+ (compare (match_dup 0) (match_operand:DSI 1 "const0_operand")))]
"s390_match_ccmode (peep2_next_insn (1), CCSmode) && TARGET_EXTIMM
&& GENERAL_REG_P (operands[0])
&& satisfies_constraint_T (operands[2])
; ltr, lt, ltgr, ltg
(define_insn "*tst<mode>_cconly_extimm"
[(set (reg CC_REGNUM)
- (compare (match_operand:GPR 0 "nonimmediate_operand" "d,T")
- (match_operand:GPR 1 "const0_operand" "")))
- (clobber (match_scratch:GPR 2 "=X,d"))]
+ (compare (match_operand:DSI 0 "nonimmediate_operand" "d,T")
+ (match_operand:DSI 1 "const0_operand" "")))
+ (clobber (match_scratch:DSI 2 "=X,d"))]
"s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM"
"@
lt<g>r\t%0,%0
(match_operand:DI 1 "const0_operand" "")))
(set (match_operand:DI 2 "register_operand" "=d")
(match_dup 0))]
- "s390_match_ccmode(insn, CCSmode) && TARGET_ZARCH && !TARGET_EXTIMM"
+ "s390_match_ccmode(insn, CCSmode) && !TARGET_EXTIMM"
"ltgr\t%2,%0"
[(set_attr "op_type" "RRE")
(set_attr "z10prop" "z10_fr_E1")])
(set_attr "cpu_facility" "*,*,longdisp")
(set_attr "z10prop" "z10_fr_E1,z10_super_E1,z10_super_E1")])
-(define_insn "*tstdi_cconly_31"
- [(set (reg CC_REGNUM)
- (compare (match_operand:DI 0 "register_operand" "d")
- (match_operand:DI 1 "const0_operand" "")))]
- "s390_match_ccmode(insn, CCSmode) && !TARGET_ZARCH"
- "srda\t%0,0"
- [(set_attr "op_type" "RS")
- (set_attr "atype" "reg")])
-
; ltr, ltgr
(define_insn "*tst<mode>_cconly2"
[(set (reg CC_REGNUM)
- (compare (match_operand:GPR 0 "register_operand" "d")
- (match_operand:GPR 1 "const0_operand" "")))]
+ (compare (match_operand:DSI 0 "register_operand" "d")
+ (match_operand:DSI 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode)"
"lt<g>r\t%0,%0"
[(set_attr "op_type" "RR<E>")
[(set (reg CC_REGNUM)
(compare (match_operand:DI 0 "nonimmediate_operand" "%d,d,d,d,Q")
(match_operand:DI 1 "general_operand" "d,K,Os,T,BQ")))]
- "s390_match_ccmode (insn, CCTmode) && TARGET_ZARCH"
+ "s390_match_ccmode (insn, CCTmode)"
"@
cgr\t%0,%1
cghi\t%0,%h1
(compare (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand"
"d,T,b"))
(match_operand:DI 0 "register_operand" "d, d,d")))]
- "s390_match_ccmode(insn, CCSRmode) && TARGET_ZARCH"
+ "s390_match_ccmode(insn, CCSRmode)"
"@
cgfr\t%0,%1
cgf\t%0,%1
(define_insn "*cmpdi_ccs_signhi_rl"
[(set (reg CC_REGNUM)
(compare (sign_extend:DI (match_operand:HI 1 "memory_operand" "T,b"))
- (match_operand:GPR 0 "register_operand" "d,d")))]
+ (match_operand:DSI 0 "register_operand" "d,d")))]
"s390_match_ccmode(insn, CCSRmode) && TARGET_Z10"
"@
cgh\t%0,%1
; cr, chi, cfi, c, cy, cgr, cghi, cgfi, cg, chsi, cghsi, crl, cgrl
(define_insn "*cmp<mode>_ccs"
[(set (reg CC_REGNUM)
- (compare (match_operand:GPR 0 "nonimmediate_operand"
+ (compare (match_operand:DSI 0 "nonimmediate_operand"
"d,d,Q, d,d,d,d")
- (match_operand:GPR 1 "general_operand"
+ (match_operand:DSI 1 "general_operand"
"d,K,K,Os,R,T,b")))]
"s390_match_ccmode(insn, CCSmode)"
"@
(set_attr "relative_long" "yes")])
; clhrl, clghrl
-(define_insn "*cmp<GPR:mode>_ccu_zerohi_rldi"
+(define_insn "*cmp<DSI:mode>_ccu_zerohi_rldi"
[(set (reg CC_REGNUM)
- (compare (zero_extend:GPR (mem:HI (match_operand:DI 1
+ (compare (zero_extend:DSI (mem:HI (match_operand:DI 1
"larl_operand" "X")))
- (match_operand:GPR 0 "register_operand" "d")))]
+ (match_operand:DSI 0 "register_operand" "d")))]
"s390_match_ccmode(insn, CCURmode) && TARGET_Z10"
"cl<g>hrl\t%0,%1"
[(set_attr "op_type" "RIL")
(compare (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand"
"d,T,b"))
(match_operand:DI 0 "register_operand" "d,d,d")))]
- "s390_match_ccmode (insn, CCURmode) && TARGET_ZARCH"
+ "s390_match_ccmode (insn, CCURmode)"
"@
clgfr\t%0,%1
clgf\t%0,%1
"d, d,d,Q,d, Q,BQ")
(match_operand:DI 1 "general_operand"
"d,Op,b,D,T,BQ,Q")))]
- "s390_match_ccmode (insn, CCUmode) && TARGET_ZARCH"
+ "s390_match_ccmode (insn, CCUmode)"
"@
clgr\t%0,%1
clgfi\t%0,%1
(match_operand:SPACESHIP_INT 1 "register_operand")
(match_operand:SPACESHIP_INT 2 "register_operand")
(match_operand:SI 3 "const_int_operand")]
- "TARGET_Z13 && TARGET_64BIT"
+ "TARGET_Z13"
"s390_expand_int_spaceship (operands[0], operands[1], operands[2], operands[3]); DONE;")
(define_mode_iterator SPACESHIP_BFP [TF DF SF])
(match_operand:SPACESHIP_BFP 1 "register_operand")
(match_operand:SPACESHIP_BFP 2 "register_operand")
(match_operand:SI 3 "const_int_operand")]
- "TARGET_Z13 && TARGET_64BIT && TARGET_HARD_FLOAT"
+ "TARGET_Z13 && TARGET_HARD_FLOAT"
"s390_expand_fp_spaceship (operands[0], operands[1], operands[2], operands[3]); DONE;")
(define_insn "*cmp_and_br_signed_<mode>"
[(set (pc)
(if_then_else (match_operator 0 "s390_signed_integer_comparison"
- [(match_operand:GPR 1 "register_operand" "d,d")
- (match_operand:GPR 2 "nonmemory_operand" "d,C")])
+ [(match_operand:DSI 1 "register_operand" "d,d")
+ (match_operand:DSI 2 "nonmemory_operand" "d,C")])
(label_ref (match_operand 3 "" ""))
(pc)))
(clobber (reg:CC CC_REGNUM))]
(define_insn "*cmp_and_br_unsigned_<mode>"
[(set (pc)
(if_then_else (match_operator 0 "s390_unsigned_integer_comparison"
- [(match_operand:GPR 1 "register_operand" "d,d")
- (match_operand:GPR 2 "nonmemory_operand" "d,I")])
+ [(match_operand:DSI 1 "register_operand" "d,d")
+ (match_operand:DSI 2 "nonmemory_operand" "d,I")])
(label_ref (match_operand 3 "" ""))
(pc)))
(clobber (reg:CC CC_REGNUM))]
(define_insn "*icmp_and_br_signed_<mode>"
[(set (pc)
(if_then_else (match_operator 0 "s390_signed_integer_comparison"
- [(match_operand:GPR 1 "register_operand" "d,d")
- (match_operand:GPR 2 "nonmemory_operand" "d,C")])
+ [(match_operand:DSI 1 "register_operand" "d,d")
+ (match_operand:DSI 2 "nonmemory_operand" "d,C")])
(pc)
(label_ref (match_operand 3 "" ""))))
(clobber (reg:CC CC_REGNUM))]
(define_insn "*icmp_and_br_unsigned_<mode>"
[(set (pc)
(if_then_else (match_operator 0 "s390_unsigned_integer_comparison"
- [(match_operand:GPR 1 "register_operand" "d,d")
- (match_operand:GPR 2 "nonmemory_operand" "d,I")])
+ [(match_operand:DSI 1 "register_operand" "d,d")
+ (match_operand:DSI 2 "nonmemory_operand" "d,I")])
(pc)
(label_ref (match_operand 3 "" ""))))
(clobber (reg:CC CC_REGNUM))]
(define_insn "*movti_bigconst"
[(set (match_operand:TI 0 "register_operand" "=d")
(match_operand:TI 1 "reload_const_wide_int_operand" ""))]
- "TARGET_ZARCH"
+ ""
"#")
; FIXME: More constants are possible by enabling jxx, jyy constraints
(define_insn "movti"
[(set (match_operand:TI 0 "nonimmediate_operand" "=d,S,v, v, v, v, v, v,v,d,v,R,d, d, d, d, d,o")
(match_operand:TI 1 "general_operand" " S,d,v,j00,jm1,jyy,jxx,jzz,d,v,R,v,K,NxHD0,Os,NxSD0,dT,d"))]
- "TARGET_ZARCH"
+ ""
"@
lmg\t%0,%N0,%S1
stmg\t%1,%N1,%S0
(define_split
[(set (match_operand:TI 0 "nonimmediate_operand" "")
(match_operand:TI 1 "general_operand" ""))]
- "TARGET_ZARCH && reload_completed
+ "reload_completed
&& s390_split_ok_p (operands[0], operands[1], TImode, 0)"
[(set (match_dup 2) (match_dup 4))
(set (match_dup 3) (match_dup 5))]
(define_split
[(set (match_operand:TI 0 "nonimmediate_operand" "")
(match_operand:TI 1 "general_operand" ""))]
- "TARGET_ZARCH && reload_completed
+ "reload_completed
&& s390_split_ok_p (operands[0], operands[1], TImode, 1)"
[(set (match_dup 2) (match_dup 4))
(set (match_dup 3) (match_dup 5))]
(define_split
[(set (match_operand:TI 0 "register_operand" "")
(match_operand:TI 1 "memory_operand" ""))]
- "TARGET_ZARCH && reload_completed
+ "reload_completed
&& !VECTOR_REG_P (operands[0])
&& !s_operand (operands[1], VOIDmode)"
[(set (match_dup 0) (match_dup 1))]
; Unfortunately there is no such variant for QI, TI and FP mode moves.
; These patterns are also used for unaligned SI and DI accesses.
-(define_expand "reload<ALL:mode><P:mode>_tomem_z10"
+(define_expand "reload<ALL:mode>di_tomem_z10"
[(parallel [(match_operand:ALL 0 "memory_operand" "")
(match_operand:ALL 1 "register_operand" "=d")
- (match_operand:P 2 "register_operand" "=&a")])]
+ (match_operand:DI 2 "register_operand" "=&a")])]
"TARGET_Z10"
{
s390_reload_symref_address (operands[1], operands[0], operands[2], 1);
DONE;
})
-(define_expand "reload<ALL:mode><P:mode>_toreg_z10"
+(define_expand "reload<ALL:mode>di_toreg_z10"
[(parallel [(match_operand:ALL 0 "register_operand" "=d")
(match_operand:ALL 1 "memory_operand" "")
- (match_operand:P 2 "register_operand" "=a")])]
+ (match_operand:DI 2 "register_operand" "=a")])]
"TARGET_Z10"
{
s390_reload_symref_address (operands[0], operands[1], operands[2], 0);
DONE;
})
-(define_expand "reload<P:mode>_larl_odd_addend_z10"
- [(parallel [(match_operand:P 0 "register_operand" "=d")
- (match_operand:P 1 "larl_operand" "")
- (match_operand:P 2 "register_operand" "=a")])]
+(define_expand "reloaddi_larl_odd_addend_z10"
+ [(parallel [(match_operand:DI 0 "register_operand" "=d")
+ (match_operand:DI 1 "larl_operand" "")
+ (match_operand:DI 2 "register_operand" "=a")])]
"TARGET_Z10"
{
s390_reload_larl_operand (operands[0], operands[1], operands[2]);
; Handles loading a PLUS (load address) expression
-(define_expand "reload<mode>_plus"
- [(parallel [(match_operand:P 0 "register_operand" "=a")
- (match_operand:P 1 "s390_plus_operand" "")
- (match_operand:P 2 "register_operand" "=&a")])]
+(define_expand "reloaddi_plus"
+ [(parallel [(match_operand:DI 0 "register_operand" "=a")
+ (match_operand:DI 1 "s390_plus_operand" "")
+ (match_operand:DI 2 "register_operand" "=&a")])]
""
{
s390_expand_plus_operand (operands[0], operands[1], operands[2]);
; - non-offsetable memory accesses for multiword moves
; - full vector reg moves with long displacements
-(define_expand "reload<mode>_la_in"
- [(parallel [(match_operand 0 "register_operand" "")
- (match_operand 1 "" "")
- (match_operand:P 2 "register_operand" "=&a")])]
+(define_expand "reloaddi_la_in"
+ [(parallel [(match_operand 0 "register_operand" "")
+ (match_operand 1 "" "")
+ (match_operand:DI 2 "register_operand" "=&a")])]
""
{
gcc_assert (MEM_P (operands[1]));
DONE;
})
-(define_expand "reload<mode>_la_out"
- [(parallel [(match_operand 0 "" "")
- (match_operand 1 "register_operand" "")
- (match_operand:P 2 "register_operand" "=&a")])]
+(define_expand "reloaddi_la_out"
+ [(parallel [(match_operand 0 "" "")
+ (match_operand 1 "register_operand" "")
+ (match_operand:DI 2 "register_operand" "=&a")])]
""
{
gcc_assert (MEM_P (operands[0]));
DONE;
})
-(define_expand "reload<mode>_PIC_addr"
- [(parallel [(match_operand 0 "register_operand" "=d")
- (match_operand 1 "larl_operand" "")
- (match_operand:P 2 "register_operand" "=a")])]
+(define_expand "reloaddi_PIC_addr"
+ [(parallel [(match_operand 0 "register_operand" "=d")
+ (match_operand 1 "larl_operand" "")
+ (match_operand:DI 2 "register_operand" "=a")])]
""
{
rtx new_rtx = legitimize_pic_address (operands[1], operands[2]);
""
{
/* Handle symbolic constants. */
- if (TARGET_64BIT
- && (SYMBOLIC_CONST (operands[1])
- || (GET_CODE (operands[1]) == PLUS
- && XEXP (operands[1], 0) == pic_offset_table_rtx
- && SYMBOLIC_CONST (XEXP (operands[1], 1)))))
+ if (SYMBOLIC_CONST (operands[1])
+ || (GET_CODE (operands[1]) == PLUS
+ && XEXP (operands[1], 0) == pic_offset_table_rtx
+ && SYMBOLIC_CONST (XEXP (operands[1], 1))))
emit_symbolic_move (operands);
})
"=d, d, d, d, d, d, d, d,f,d,!*f,d,d,d,d,T,!*f,!*f,!*f,!R,!T,b,Q,d,t,Q,t,v,v,v,d,v,R,d")
(match_operand:DI 1 "general_operand"
" K,N0HD0,N1HD0,N2HD0,N3HD0,Os,N0SD0,N1SD0,d,f,j00,L,b,d,T,d, *f, R, T,*f,*f,d,K,t,d,t,Q,K,v,d,v,R,v,ZL"))]
- "TARGET_ZARCH"
+ ""
"@
lghi\t%0,%h1
llihh\t%0,%i1
[(set (match_operand:DI 0 "register_operand" "=d")
(ashift:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "a"))
(const_int LXAMODEITER)))]
- "TARGET_Z17 && TARGET_64BIT"
+ "TARGET_Z17"
"lxa<lxamode>\t%0,0(%1,0)"
[(set_attr "op_type" "RXY")])
(ashift:DI (sign_extend:DI (plus:SI (match_operand:SI 1 "register_operand" "a")
(match_operand:SI 2 "const_int_operand")))
(const_int LXAMODEITER)))]
- "TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
+ "TARGET_Z17 && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"lxa<lxamode>\t%0,%2(%1,0)"
[(set_attr "op_type" "RXY")])
(plus:DI (ashift:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "a"))
(const_int LXAMODEITER))
(match_operand:DI 2 "register_operand" "a")))]
- "TARGET_Z17 && TARGET_64BIT"
+ "TARGET_Z17"
"lxa<lxamode>\t%0,0(%1,%2)"
[(set_attr "op_type" "RXY")])
(match_operand:SI 2 "const_int_operand")))
(const_int LXAMODEITER))
(match_operand:DI 3 "register_operand" "a")))]
- "TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
+ "TARGET_Z17 && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"lxa<lxamode>\t%0,%2(%1,%3)"
[(set_attr "op_type" "RXY")])
(plus:DI (sign_extend:DI (plus:SI (match_operand:SI 1 "register_operand" "a")
(match_operand:SI 2 "const_int_operand")))
(match_operand:DI 3 "register_operand" "a")))]
- "TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
+ "TARGET_Z17 && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"lxab\t%0,%2(%1,%3)"
[(set_attr "op_type" "RXY")])
0)
(const_int LXAMODEITER))
(const_int <LLXAMASK>)))]
- "TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
+ "TARGET_Z17 && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"llxa<lxamode>\t%0,%2(%1,0)"
[(set_attr "op_type" "RXY")])
(const_int LXAMODEITER))
(const_int <LLXAMASK>))
(match_operand:DI 2 "register_operand" "a")))]
- "TARGET_Z17 && TARGET_64BIT"
+ "TARGET_Z17"
"llxa<lxamode>\t%0,0(%1,%2)"
[(set_attr "op_type" "RXY")])
(const_int LXAMODEITER))
(const_int <LLXAMASK>))
(match_operand:DI 3 "register_operand" "a")))]
- "TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
+ "TARGET_Z17 && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"llxa<lxamode>\t%0,%2(%1,%3)"
[(set_attr "op_type" "RXY")])
(plus:DI (zero_extend:DI (plus:SI (match_operand:SI 1 "register_operand" "a")
(match_operand:SI 2 "const_int_operand")))
(match_operand:DI 3 "register_operand" "a")))]
- "TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
+ "TARGET_Z17 && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"llxab\t%0,%2(%1,%3)"
[(set_attr "op_type" "RXY")])
; Splitters for loading TLS pointer from UNSPEC_GET_TP.
-; UNSPEC_GET_TP is used instead of %a0:P, since the latter is a hard register,
+; UNSPEC_GET_TP is used instead of %a0:DI, since the latter is a hard register,
; and those are not handled by Partial Redundancy Elimination (gcse.cc), which
; results in generation of redundant thread pointer loads.
-(define_insn_and_split "*get_tp_31"
- [(set (match_operand:SI 0 "register_operand" "=r")
- (unspec:SI [(match_operand:SI 1 "register_operand" "t")]
- UNSPEC_GET_TP))]
- ""
- "#"
- "&& reload_completed"
- [(set (match_dup 0) (match_dup 1))])
-
(define_insn_and_split "*get_tp_64"
[(set (match_operand:DI 0 "register_operand" "=r")
(unspec:DI [(match_operand:DI 1 "register_operand" "t")]
UNSPEC_GET_TP))]
- "TARGET_ZARCH"
+ ""
"#"
"&& reload_completed"
[(set (match_dup 2) (match_dup 3))
(define_split
[(set (match_operand:DI 0 "register_operand" "")
(match_operand:DI 1 "register_operand" ""))]
- "TARGET_ZARCH && ACCESS_REG_P (operands[0]) && reload_completed
+ "ACCESS_REG_P (operands[0]) && reload_completed
&& dead_or_set_p (insn, operands[1])"
[(set (match_dup 3) (match_dup 2))
(set (match_dup 1) (lshiftrt:DI (match_dup 1) (const_int 32)))
(define_split
[(set (match_operand:DI 0 "register_operand" "")
(match_operand:DI 1 "register_operand" ""))]
- "TARGET_ZARCH && ACCESS_REG_P (operands[0]) && reload_completed
+ "ACCESS_REG_P (operands[0]) && reload_completed
&& !dead_or_set_p (insn, operands[1])"
[(set (match_dup 3) (match_dup 2))
(set (match_dup 1) (rotate:DI (match_dup 1) (const_int 32)))
"operands[2] = gen_lowpart (SImode, operands[1]);
s390_split_access_reg (operands[0], &operands[3], &operands[4]);")
-(define_insn "*movdi_31"
- [(set (match_operand:DI 0 "nonimmediate_operand"
- "=d,d,Q,S,d ,o,!*f,!*f,!*f,!*f,!R,!T,d")
- (match_operand:DI 1 "general_operand"
- " Q,S,d,d,dPT,d, *f, R, T,j00,*f,*f,b"))]
- "!TARGET_ZARCH"
- "@
- lm\t%0,%N0,%S1
- lmy\t%0,%N0,%S1
- stm\t%1,%N1,%S0
- stmy\t%1,%N1,%S0
- #
- #
- ldr\t%0,%1
- ld\t%0,%1
- ldy\t%0,%1
- lzdr\t%0
- std\t%1,%0
- stdy\t%1,%0
- #"
- [(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RRE,RX,RXY,*")
- (set_attr "type" "lm,lm,stm,stm,*,*,floaddf,floaddf,floaddf,fsimpdf,fstoredf,fstoredf,*")
- (set_attr "cpu_facility" "*,longdisp,*,longdisp,*,*,*,*,longdisp,*,*,longdisp,z10")])
-
-; For a load from a symbol ref we can use one of the target registers
-; together with larl to load the address.
-(define_split
- [(set (match_operand:DI 0 "register_operand" "")
- (match_operand:DI 1 "memory_operand" ""))]
- "!TARGET_ZARCH && reload_completed && TARGET_Z10
- && larl_operand (XEXP (operands[1], 0), SImode)"
- [(set (match_dup 2) (match_dup 3))
- (set (match_dup 0) (match_dup 1))]
-{
- operands[2] = operand_subword (operands[0], 1, 0, DImode);
- operands[3] = XEXP (operands[1], 0);
- operands[1] = replace_equiv_address (operands[1], operands[2]);
-})
-
-(define_split
- [(set (match_operand:DI 0 "nonimmediate_operand" "")
- (match_operand:DI 1 "general_operand" ""))]
- "!TARGET_ZARCH && reload_completed
- && !s_operand (operands[0], DImode)
- && !s_operand (operands[1], DImode)
- && s390_split_ok_p (operands[0], operands[1], DImode, 0)"
- [(set (match_dup 2) (match_dup 4))
- (set (match_dup 3) (match_dup 5))]
-{
- operands[2] = operand_subword (operands[0], 0, 0, DImode);
- operands[3] = operand_subword (operands[0], 1, 0, DImode);
- operands[4] = operand_subword (operands[1], 0, 0, DImode);
- operands[5] = operand_subword (operands[1], 1, 0, DImode);
-})
-
-(define_split
- [(set (match_operand:DI 0 "nonimmediate_operand" "")
- (match_operand:DI 1 "general_operand" ""))]
- "!TARGET_ZARCH && reload_completed
- && !s_operand (operands[0], DImode)
- && !s_operand (operands[1], DImode)
- && s390_split_ok_p (operands[0], operands[1], DImode, 1)"
- [(set (match_dup 2) (match_dup 4))
- (set (match_dup 3) (match_dup 5))]
-{
- operands[2] = operand_subword (operands[0], 1, 0, DImode);
- operands[3] = operand_subword (operands[0], 0, 0, DImode);
- operands[4] = operand_subword (operands[1], 1, 0, DImode);
- operands[5] = operand_subword (operands[1], 0, 0, DImode);
-})
-
-(define_split
- [(set (match_operand:DI 0 "register_operand" "")
- (match_operand:DI 1 "memory_operand" ""))]
- "!TARGET_ZARCH && reload_completed
- && !FP_REG_P (operands[0])
- && !s_operand (operands[1], VOIDmode)"
- [(set (match_dup 0) (match_dup 1))]
-{
- rtx addr = operand_subword (operands[0], 1, 0, DImode);
- s390_load_address (addr, XEXP (operands[1], 0));
- operands[1] = replace_equiv_address (operands[1], addr);
-})
-
(define_peephole2
[(set (match_operand:DI 0 "register_operand" "")
(mem:DI (match_operand 1 "address_operand" "")))]
- "TARGET_ZARCH
- && !FP_REG_P (operands[0])
+ "!FP_REG_P (operands[0])
&& GET_CODE (operands[1]) == SYMBOL_REF
&& CONSTANT_POOL_ADDRESS_P (operands[1])
&& get_pool_mode (operands[1]) == DImode
(define_insn "*la_64"
[(set (match_operand:DI 0 "register_operand" "=d,d")
(match_operand:QI 1 "address_operand" "ZR,ZT"))]
- "TARGET_64BIT"
+ ""
"@
la\t%0,%a1
lay\t%0,%a1"
[(set (match_operand:DI 0 "register_operand" "")
(match_operand:QI 1 "address_operand" ""))
(clobber (reg:CC CC_REGNUM))])]
- "TARGET_64BIT
- && preferred_la_operand_p (operands[1], const0_rtx)"
+ "preferred_la_operand_p (operands[1], const0_rtx)"
[(set (match_dup 0) (match_dup 1))]
"")
(plus:DI (match_dup 0)
(match_operand:DI 2 "nonmemory_operand" "")))
(clobber (reg:CC CC_REGNUM))])]
- "TARGET_64BIT
- && !reg_overlap_mentioned_p (operands[0], operands[2])
+ "!reg_overlap_mentioned_p (operands[0], operands[2])
&& preferred_la_operand_p (operands[1], operands[2])"
[(set (match_dup 0) (plus:DI (match_dup 1) (match_dup 2)))]
"")
(define_peephole2
[(set (match_operand:DI 0 "register_operand" "")
(match_operand:DI 1 "memory_operand" ""))]
- "TARGET_64BIT
- && TARGET_EXTIMM
+ "TARGET_EXTIMM
&& GENERAL_REG_P (operands[0])
&& s390_const_int_pool_entry_p (operands[1], nullptr)
&& peep2_reg_dead_p (1, gen_rtx_REG (CCmode, CC_REGNUM))"
; movsi instruction pattern(s).
;
-(define_expand "movsi"
- [(set (match_operand:SI 0 "general_operand" "")
- (match_operand:SI 1 "general_operand" ""))]
- ""
-{
- /* Handle symbolic constants. */
- if (!TARGET_64BIT
- && (SYMBOLIC_CONST (operands[1])
- || (GET_CODE (operands[1]) == PLUS
- && XEXP (operands[1], 0) == pic_offset_table_rtx
- && SYMBOLIC_CONST (XEXP(operands[1], 1)))))
- emit_symbolic_move (operands);
-})
-
-(define_insn "*movsi_larl"
- [(set (match_operand:SI 0 "register_operand" "=d")
- (match_operand:SI 1 "larl_operand" "X"))]
- "!TARGET_64BIT
- && !FP_REG_P (operands[0])"
- "larl\t%0,%1"
- [(set_attr "op_type" "RIL")
- (set_attr "type" "larl")
- (set_attr "z10prop" "z10_fwd_A1")
- (set_attr "relative_long" "yes")])
-
-(define_insn "*movsi_zarch"
+(define_insn "movsi"
[(set (match_operand:SI 0 "nonimmediate_operand"
"=d, d, d, d,d,d,d,d,d,R,T,!*f,!*f,!*f,!*f,!*f,!R,!T,d,t,Q,b,Q,t,v,v,v,d,v,R")
(match_operand:SI 1 "general_operand"
" K,N0HS0,N1HS0,Os,L,b,d,R,T,d,d, *f, *f, R, R, T,*f,*f,t,d,t,d,K,Q,K,v,d,v,R,v"))]
- "TARGET_ZARCH"
+ ""
"@
lhi\t%0,%h1
llilh\t%0,%i1
*,*,*,*,*,*,*,*,*,*,
*,yes,*,*,*,*,*,*,*,*")])
-(define_insn "*movsi_esa"
- [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,R,!*f,!*f,!*f,!*f,!R,d,t,Q,t")
- (match_operand:SI 1 "general_operand" "K,d,R,d, *f, *f, R, R,*f,t,d,t,Q"))]
- "!TARGET_ZARCH"
- "@
- lhi\t%0,%h1
- lr\t%0,%1
- l\t%0,%1
- st\t%1,%0
- ldr\t%0,%1
- ler\t%0,%1
- lde\t%0,%1
- le\t%0,%1
- ste\t%1,%0
- ear\t%0,%1
- sar\t%0,%1
- stam\t%1,%1,%S0
- lam\t%0,%0,%S1"
- [(set_attr "op_type" "RI,RR,RX,RX,RR,RR,RXE,RX,RX,RRE,RRE,RS,RS")
- (set_attr "type" "*,lr,load,store,floadsf,floadsf,floadsf,floadsf,fstoresf,*,*,*,*")
- (set_attr "z10prop" "z10_fwd_A1,z10_fr_E1,z10_fwd_A3,z10_rec,*,*,*,*,*,z10_super_E1,
- z10_super,*,*")
- (set_attr "cpu_facility" "*,*,*,*,vx,*,vx,*,*,*,*,*,*")
-])
-
(define_peephole2
[(set (match_operand:SI 0 "register_operand" "")
(mem:SI (match_operand 1 "address_operand" "")))]
[(set (match_dup 0) (match_dup 2))]
"operands[2] = get_pool_constant (operands[1]);")
-(define_insn "*la_31"
- [(set (match_operand:SI 0 "register_operand" "=d,d")
- (match_operand:QI 1 "address_operand" "ZR,ZT"))]
- "!TARGET_64BIT && legitimate_la_operand_p (operands[1])"
- "@
- la\t%0,%a1
- lay\t%0,%a1"
- [(set_attr "op_type" "RX,RXY")
- (set_attr "type" "la")
- (set_attr "cpu_facility" "*,longdisp")
- (set_attr "z10prop" "z10_fwd_A1,z10_fwd_A1")])
-
-(define_peephole2
- [(parallel
- [(set (match_operand:SI 0 "register_operand" "")
- (match_operand:QI 1 "address_operand" ""))
- (clobber (reg:CC CC_REGNUM))])]
- "!TARGET_64BIT
- && preferred_la_operand_p (operands[1], const0_rtx)"
- [(set (match_dup 0) (match_dup 1))]
- "")
-
-(define_peephole2
- [(set (match_operand:SI 0 "register_operand" "")
- (match_operand:SI 1 "register_operand" ""))
- (parallel
- [(set (match_dup 0)
- (plus:SI (match_dup 0)
- (match_operand:SI 2 "nonmemory_operand" "")))
- (clobber (reg:CC CC_REGNUM))])]
- "!TARGET_64BIT
- && !reg_overlap_mentioned_p (operands[0], operands[2])
- && preferred_la_operand_p (operands[1], operands[2])"
- [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))]
- "")
-
-(define_insn "*la_31_and"
- [(set (match_operand:SI 0 "register_operand" "=d,d")
- (and:SI (match_operand:QI 1 "address_operand" "ZR,ZT")
- (const_int 2147483647)))]
- "!TARGET_64BIT"
- "@
- la\t%0,%a1
- lay\t%0,%a1"
- [(set_attr "op_type" "RX,RXY")
- (set_attr "type" "la")
- (set_attr "cpu_facility" "*,longdisp")
- (set_attr "z10prop" "z10_fwd_A1,z10_fwd_A1")])
-
-(define_insn_and_split "*la_31_and_cc"
- [(set (match_operand:SI 0 "register_operand" "=d")
- (and:SI (match_operand:QI 1 "address_operand" "p")
- (const_int 2147483647)))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_64BIT"
- "#"
- "&& reload_completed"
- [(set (match_dup 0)
- (and:SI (match_dup 1) (const_int 2147483647)))]
- ""
- [(set_attr "op_type" "RX")
- (set_attr "type" "la")])
-
-(define_insn "force_la_31"
- [(set (match_operand:SI 0 "register_operand" "=d,d")
- (match_operand:QI 1 "address_operand" "ZR,ZT"))
- (use (const_int 0))]
- "!TARGET_64BIT"
- "@
- la\t%0,%a1
- lay\t%0,%a1"
- [(set_attr "op_type" "RX")
- (set_attr "type" "la")
- (set_attr "cpu_facility" "*,longdisp")
- (set_attr "z10prop" "z10_fwd_A1,z10_fwd_A1")])
-
;
; movhi instruction pattern(s).
;
{
/* On z/Architecture, zero-extending from memory to register
is just as fast as a QImode load. */
- if (TARGET_ZARCH && optimize && can_create_pseudo_p ()
+ if (optimize && can_create_pseudo_p ()
&& register_operand (operands[0], VOIDmode)
&& GET_CODE (operands[1]) == MEM)
{
(define_insn "movstrictsi"
[(set (strict_low_part (match_operand:SI 0 "subreg_register_operand" "+d,d,d,d"))
(match_operand:SI 1 "general_operand" "d,R,T,t"))]
- "TARGET_ZARCH"
+ ""
"@
lr\t%0,%1
l\t%0,%1
(define_insn "*mov<mode>_64"
[(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,f,o,d,S, d,o")
(match_operand:TD_TF 1 "general_operand" " G,f,o,f,S,d,dT,d"))]
- "TARGET_ZARCH"
+ ""
"@
lzxr\t%0
lxr\t%0,%1
(set_attr "type" "fsimptf,fsimptf,*,*,lm,stm,*,*")
(set_attr "cpu_facility" "z196,*,*,*,*,*,*,*")])
-(define_insn "*mov<mode>_31"
- [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,f,o")
- (match_operand:TD_TF 1 "general_operand" " G,f,o,f"))]
- "!TARGET_ZARCH"
- "@
- lzxr\t%0
- lxr\t%0,%1
- #
- #"
- [(set_attr "op_type" "RRE,RRE,*,*")
- (set_attr "type" "fsimptf,fsimptf,*,*")
- (set_attr "cpu_facility" "z196,*,*,*")])
-
; TFmode in GPRs splitters
(define_split
[(set (match_operand:TD_TF 0 "nonimmediate_operand" "")
(match_operand:TD_TF 1 "general_operand" ""))]
- "TARGET_ZARCH && reload_completed
+ "reload_completed
&& !s_operand (operands[0], <MODE>mode)
&& !s_operand (operands[1], <MODE>mode)
&& s390_split_ok_p (operands[0], operands[1], <MODE>mode, 0)"
(define_split
[(set (match_operand:TD_TF 0 "nonimmediate_operand" "")
(match_operand:TD_TF 1 "general_operand" ""))]
- "TARGET_ZARCH && reload_completed
+ "reload_completed
&& !s_operand (operands[0], <MODE>mode)
&& !s_operand (operands[1], <MODE>mode)
&& s390_split_ok_p (operands[0], operands[1], <MODE>mode, 1)"
(define_split
[(set (match_operand:TD_TF 0 "register_operand" "")
(match_operand:TD_TF 1 "memory_operand" ""))]
- "TARGET_ZARCH && reload_completed
+ "reload_completed
&& GENERAL_REG_P (operands[0])
&& !s_operand (operands[1], VOIDmode)"
[(set (match_dup 0) (match_dup 1))]
(define_insn "*mov<mode>_64"
[(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d,d,d,d,b,T")
(match_operand:DD_DF 1 "general_operand" " G,f,R,T,f,f,G,d,b,T,d,d"))]
- "TARGET_ZARCH"
+ ""
"@
lzdr\t%0
ldr\t%0,%1
(set_attr "cpu_facility" "z196,*,*,longdisp,*,longdisp,*,*,z10,*,z10,*")
(set_attr "relative_long" "*,*,*,*,*,*,*,*,yes,*,*,*")])
-(define_insn "*mov<mode>_31"
- [(set (match_operand:DD_DF 0 "nonimmediate_operand"
- "=f,f,f,f,R,T,d,d,Q,S, d,o")
- (match_operand:DD_DF 1 "general_operand"
- " G,f,R,T,f,f,Q,S,d,d,dPT,d"))]
- "!TARGET_ZARCH"
- "@
- lzdr\t%0
- ldr\t%0,%1
- ld\t%0,%1
- ldy\t%0,%1
- std\t%1,%0
- stdy\t%1,%0
- lm\t%0,%N0,%S1
- lmy\t%0,%N0,%S1
- stm\t%1,%N1,%S0
- stmy\t%1,%N1,%S0
- #
- #"
- [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RS,RSY,RS,RSY,*,*")
- (set_attr "type" "fsimpdf,fload<mode>,fload<mode>,fload<mode>,
- fstore<mode>,fstore<mode>,lm,lm,stm,stm,*,*")
- (set_attr "cpu_facility" "z196,*,*,longdisp,*,longdisp,*,longdisp,*,longdisp,*,*")])
-
-(define_split
- [(set (match_operand:DD_DF 0 "nonimmediate_operand" "")
- (match_operand:DD_DF 1 "general_operand" ""))]
- "!TARGET_ZARCH && reload_completed
- && !s_operand (operands[0], <MODE>mode)
- && !s_operand (operands[1], <MODE>mode)
- && s390_split_ok_p (operands[0], operands[1], <MODE>mode, 0)"
- [(set (match_dup 2) (match_dup 4))
- (set (match_dup 3) (match_dup 5))]
-{
- operands[2] = operand_subword (operands[0], 0, 0, <MODE>mode);
- operands[3] = operand_subword (operands[0], 1, 0, <MODE>mode);
- operands[4] = operand_subword (operands[1], 0, 0, <MODE>mode);
- operands[5] = operand_subword (operands[1], 1, 0, <MODE>mode);
-})
-
-(define_split
- [(set (match_operand:DD_DF 0 "nonimmediate_operand" "")
- (match_operand:DD_DF 1 "general_operand" ""))]
- "!TARGET_ZARCH && reload_completed
- && !s_operand (operands[0], <MODE>mode)
- && !s_operand (operands[1], <MODE>mode)
- && s390_split_ok_p (operands[0], operands[1], <MODE>mode, 1)"
- [(set (match_dup 2) (match_dup 4))
- (set (match_dup 3) (match_dup 5))]
-{
- operands[2] = operand_subword (operands[0], 1, 0, <MODE>mode);
- operands[3] = operand_subword (operands[0], 0, 0, <MODE>mode);
- operands[4] = operand_subword (operands[1], 1, 0, <MODE>mode);
- operands[5] = operand_subword (operands[1], 0, 0, <MODE>mode);
-})
-
-(define_split
- [(set (match_operand:DD_DF 0 "register_operand" "")
- (match_operand:DD_DF 1 "memory_operand" ""))]
- "!TARGET_ZARCH && reload_completed
- && !FP_REG_P (operands[0])
- && !s_operand (operands[1], VOIDmode)"
- [(set (match_dup 0) (match_dup 1))]
-{
- rtx addr = operand_subword (operands[0], 1, 0, <MODE>mode);
- s390_load_address (addr, XEXP (operands[1], 0));
- operands[1] = replace_equiv_address (operands[1], addr);
-})
-
;
; mov(sf|sd) instruction pattern(s).
;
(define_insn "movhf"
[(set (match_operand:HF 0 "nonimmediate_operand")
(match_operand:HF 1 "general_operand"))]
- "TARGET_64BIT"
+ ""
{@ [ cons: =0, 1; attrs: op_type, cpu_facility ]
[ v , v ; VRR , vx ] vlr\t%v0,%v1
[ v , d ; VRS , vx ] vlvgh\t%v0,%1,0
count = INTVAL (operands[2]);
regno = REGNO (operands[0]);
mode = GET_MODE (operands[0]);
- if (mode != SImode && (!TARGET_ZARCH || mode != DImode))
+ if (mode != SImode && mode != DImode)
FAIL;
operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
[(match_parallel 0 "load_multiple_operation"
[(set (match_operand:DI 1 "register_operand" "=r")
(match_operand:DI 2 "s_operand" "S"))])]
- "reload_completed && TARGET_ZARCH"
+ "reload_completed"
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (DImode, REGNO (operands[1]) + words - 1);
count = INTVAL (operands[2]);
regno = REGNO (operands[1]);
mode = GET_MODE (operands[1]);
- if (mode != SImode && (!TARGET_ZARCH || mode != DImode))
+ if (mode != SImode && mode != DImode)
FAIL;
operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
[(match_parallel 0 "store_multiple_operation"
[(set (match_operand:DI 1 "s_operand" "=S")
(match_operand:DI 2 "register_operand" "r"))])]
- "reload_completed && TARGET_ZARCH"
+ "reload_completed"
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (DImode, REGNO (operands[2]) + words - 1);
; strlenM instruction pattern(s).
;
-(define_expand "strlen<mode>"
- [(match_operand:P 0 "register_operand" "") ; result
+(define_expand "strlendi"
+ [(match_operand:DI 0 "register_operand" "") ; result
(match_operand:BLK 1 "memory_operand" "") ; input string
(match_operand:SI 2 "immediate_operand" "") ; search character
(match_operand:SI 3 "immediate_operand" "")] ; known alignment
""
{
if (!TARGET_VX || operands[2] != const0_rtx)
- emit_insn (gen_strlen_srst<mode> (operands[0], operands[1],
- operands[2], operands[3]));
+ emit_insn (gen_strlen_srstdi (operands[0], operands[1],
+ operands[2], operands[3]));
else
s390_expand_vec_strlen (operands[0], operands[1], operands[3]);
DONE;
})
-(define_expand "strlen_srst<mode>"
+(define_expand "strlen_srstdi"
[(set (reg:SI 0) (match_operand:SI 2 "immediate_operand" ""))
(parallel
[(set (match_dup 4)
- (unspec:P [(const_int 0)
+ (unspec:DI [(const_int 0)
(match_operand:BLK 1 "memory_operand" "")
(reg:SI 0)
(match_operand 3 "immediate_operand" "")] UNSPEC_SRST))
- (clobber (scratch:P))
+ (clobber (scratch:DI))
(clobber (reg:CC CC_REGNUM))])
(parallel
- [(set (match_operand:P 0 "register_operand" "")
- (minus:P (match_dup 4) (match_dup 5)))
+ [(set (match_operand:DI 0 "register_operand" "")
+ (minus:DI (match_dup 4) (match_dup 5)))
(clobber (reg:CC CC_REGNUM))])]
""
{
operands[1] = replace_equiv_address (operands[1], operands[5]);
})
-(define_insn "*strlen<mode>"
- [(set (match_operand:P 0 "register_operand" "=a")
- (unspec:P [(match_operand:P 2 "general_operand" "0")
- (mem:BLK (match_operand:P 3 "register_operand" "1"))
+(define_insn "*strlendi"
+ [(set (match_operand:DI 0 "register_operand" "=a")
+ (unspec:DI [(match_operand:DI 2 "general_operand" "0")
+ (mem:BLK (match_operand:DI 3 "register_operand" "1"))
(reg:SI 0)
(match_operand 4 "immediate_operand" "")] UNSPEC_SRST))
- (clobber (match_scratch:P 1 "=a"))
+ (clobber (match_scratch:DI 1 "=a"))
(clobber (reg:CC CC_REGNUM))]
""
"srst\t%0,%1\;jo\t.-4"
operands[4] = addr2;
})
-(define_insn "*cmpstr<mode>"
- [(clobber (match_operand:P 0 "register_operand" "=d"))
- (clobber (match_operand:P 1 "register_operand" "=d"))
+(define_insn "*cmpstrdi"
+ [(clobber (match_operand:DI 0 "register_operand" "=d"))
+ (clobber (match_operand:DI 1 "register_operand" "=d"))
(set (reg:CCU CC_REGNUM)
- (compare:CCU (mem:BLK (match_operand:P 2 "register_operand" "0"))
- (mem:BLK (match_operand:P 3 "register_operand" "1"))))
+ (compare:CCU (mem:BLK (match_operand:DI 2 "register_operand" "0"))
+ (mem:BLK (match_operand:DI 3 "register_operand" "1"))))
(use (reg:SI 0))]
""
"clst\t%0,%1\;jo\t.-4"
;
(define_expand "movstr"
- [(match_operand 0 "register_operand" "")
- (match_operand 1 "memory_operand" "")
- (match_operand 2 "memory_operand" "")]
- ""
-{
- if (TARGET_64BIT)
- emit_insn (gen_movstrdi (operands[0], operands[1], operands[2]));
- else
- emit_insn (gen_movstrsi (operands[0], operands[1], operands[2]));
- DONE;
-})
-
-(define_expand "movstr<P:mode>"
[(set (reg:SI 0) (const_int 0))
(parallel
[(clobber (match_dup 3))
(set (match_operand:BLK 1 "memory_operand" "")
(match_operand:BLK 2 "memory_operand" ""))
- (set (match_operand:P 0 "register_operand" "")
- (unspec:P [(match_dup 1)
- (match_dup 2)
- (reg:SI 0)] UNSPEC_MVST))
+ (set (match_operand:DI 0 "register_operand" "")
+ (unspec:DI [(match_dup 1)
+ (match_dup 2)
+ (reg:SI 0)] UNSPEC_MVST))
(clobber (reg:CC CC_REGNUM))])]
""
{
})
(define_insn "*movstr"
- [(clobber (match_operand:P 2 "register_operand" "=d"))
- (set (mem:BLK (match_operand:P 1 "register_operand" "0"))
- (mem:BLK (match_operand:P 3 "register_operand" "2")))
- (set (match_operand:P 0 "register_operand" "=d")
- (unspec:P [(mem:BLK (match_dup 1))
- (mem:BLK (match_dup 3))
- (reg:SI 0)] UNSPEC_MVST))
+ [(clobber (match_operand:DI 2 "register_operand" "=d"))
+ (set (mem:BLK (match_operand:DI 1 "register_operand" "0"))
+ (mem:BLK (match_operand:DI 3 "register_operand" "2")))
+ (set (match_operand:DI 0 "register_operand" "=d")
+ (unspec:DI [(mem:BLK (match_dup 1))
+ (mem:BLK (match_dup 3))
+ (reg:SI 0)] UNSPEC_MVST))
(clobber (reg:CC CC_REGNUM))]
""
"mvst\t%1,%2\;jo\t.-4"
(define_expand "cpymem<mode>"
[(set (match_operand:BLK 0 "memory_operand" "") ; destination
(match_operand:BLK 1 "memory_operand" "")) ; source
- (use (match_operand:GPR 2 "general_operand" "")) ; size
+ (use (match_operand:DSI 2 "general_operand" "")) ; size
(match_operand 3 "") ; align
(match_operand 4 "") ; expected align
(match_operand 5 "") ; expected size
(match_operand:BLK 1 "memory_operand" "Q,Q,Q,Q"))
(use (match_operand 2 "nonmemory_operand" "n,a,a,a"))
(use (match_operand 3 "immediate_operand" "X,R,X,X"))
- (clobber (match_scratch:P 4 "=X,X,X,&a"))]
+ (clobber (match_scratch:DI 4 "=X,X,X,&a"))]
"(GET_MODE (operands[2]) == Pmode || GET_MODE (operands[2]) == VOIDmode)"
"#"
[(set_attr "type" "cs")
- (set_attr "cpu_facility" "*,*,z10,cpu_zarch")])
+ (set_attr "cpu_facility" "*,*,z10,*")])
(define_split
[(set (match_operand:BLK 0 "memory_operand" "")
(clobber (reg:CC CC_REGNUM))])]
""
{
- machine_mode sreg_mode = TARGET_ZARCH ? DImode : SImode;
- machine_mode dreg_mode = TARGET_ZARCH ? TImode : DImode;
- rtx reg0 = gen_reg_rtx (dreg_mode);
- rtx reg1 = gen_reg_rtx (dreg_mode);
- rtx addr0 = gen_lowpart (Pmode, gen_highpart (sreg_mode, reg0));
- rtx addr1 = gen_lowpart (Pmode, gen_highpart (sreg_mode, reg1));
+ rtx reg0 = gen_reg_rtx (TImode);
+ rtx reg1 = gen_reg_rtx (TImode);
+ rtx addr0 = gen_lowpart (Pmode, gen_highpart (DImode, reg0));
+ rtx addr1 = gen_lowpart (Pmode, gen_highpart (DImode, reg1));
rtx len0 = gen_lowpart (Pmode, reg0);
rtx len1 = gen_lowpart (Pmode, reg1);
})
(define_insn "*cpymem_long"
- [(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
- (clobber (match_operand:<DBL> 1 "register_operand" "=d"))
- (set (mem:BLK (subreg:P (match_operand:<DBL> 2 "register_operand" "0") 0))
- (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "1") 0)))
- (use (match_dup 2))
- (use (match_dup 3))
- (clobber (reg:CC CC_REGNUM))]
- "TARGET_64BIT || !TARGET_ZARCH"
- "mvcle\t%0,%1,0\;jo\t.-4"
- [(set_attr "length" "8")
- (set_attr "type" "vs")])
-
-(define_insn "*cpymem_long_31z"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
(clobber (match_operand:TI 1 "register_operand" "=d"))
- (set (mem:BLK (subreg:SI (match_operand:TI 2 "register_operand" "0") 4))
- (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "1") 4)))
+ (set (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0))
+ (mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "1") 0)))
(use (match_dup 2))
(use (match_dup 3))
(clobber (reg:CC CC_REGNUM))]
- "!TARGET_64BIT && TARGET_ZARCH"
+ ""
"mvcle\t%0,%1,0\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
(define_expand "movmem<mode>"
[(set (match_operand:BLK 0 "memory_operand") ; destination
(match_operand:BLK 1 "memory_operand")) ; source
- (use (match_operand:GPR 2 "general_operand")) ; size
+ (use (match_operand:DSI 2 "general_operand")) ; size
(match_operand 3 "") ; align
(match_operand 4 "") ; expected align
(match_operand 5 "") ; expected size
(define_expand "signbithf2"
[(match_operand:SI 0 "register_operand")
(match_operand:HF 1 "nonimmediate_operand")]
- "TARGET_HARD_FLOAT && TARGET_Z10 && TARGET_64BIT"
+ "TARGET_HARD_FLOAT && TARGET_Z10"
{
if (TARGET_VX)
{
(match_operand:SIGNBIT_SINGLE 1 "nonimmediate_operand")]
""
{
- if (TARGET_VX && TARGET_64BIT)
+ if (TARGET_VX)
{
emit_insn (gen_rtx_SET (operands[0], simplify_gen_subreg (SImode, operands[1], <MODE>mode, 0)));
emit_insn (gen_rtx_SET (operands[0], gen_rtx_LSHIFTRT (SImode, operands[0], GEN_INT (31))));
}
- else if (TARGET_Z10 && TARGET_64BIT)
+ else if (TARGET_Z10)
emit_insn (gen_signbit<mode>2_z10 (operands[0], operands[1]));
else
emit_insn (gen_signbit_tdc<mode>2 (operands[0], force_reg (<MODE>mode, operands[1])));
[(set (match_operand:SI 0 "register_operand" "=d")
(unspec:SI [(match_operand:SIGNBIT_HALF_SINGLE 1 "nonimmediate_operand" "fRT")]
UNSPEC_SIGNBIT))]
- "TARGET_Z10 && TARGET_64BIT"
+ "TARGET_Z10"
"#")
(define_split
[(set (match_operand:SI 0 "register_operand")
(unspec:SI [(match_operand:SIGNBIT_HALF_SINGLE 1 "register_operand")]
UNSPEC_SIGNBIT))]
- "TARGET_Z10 && TARGET_64BIT && reload_completed"
+ "TARGET_Z10 && reload_completed"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 0) (lshiftrt:DI (match_dup 0) (const_int 63)))]
{
[(set (match_operand:SI 0 "register_operand")
(unspec:SI [(match_operand:SIGNBIT_HALF_SINGLE 1 "memory_operand")]
UNSPEC_SIGNBIT))]
- "TARGET_Z10 && TARGET_64BIT && reload_completed"
+ "TARGET_Z10 && reload_completed"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 0) (lshiftrt:SI (match_dup 0) (const_int 31)))]
{
(match_operand:SIGNBIT_DBL_TETRA 1 "nonimmediate_operand")]
""
{
- if (TARGET_Z10 && TARGET_64BIT)
+ if (TARGET_Z10)
{
rtx reg_di = gen_reg_rtx (DImode);
if (<MODE>mode == TFmode || <MODE>mode == TDmode)
(define_expand "setmem<mode>"
[(set (match_operand:BLK 0 "memory_operand" "") ; destination
(match_operand:QI 2 "general_operand" "")) ; value
- (use (match_operand:GPR 1 "general_operand" "")) ; size
+ (use (match_operand:DSI 1 "general_operand" "")) ; size
(match_operand 3 "") ; align
(match_operand 4 "") ; expected align
(match_operand 5 "") ; expected size
(const_int 0))
(use (match_operand 1 "nonmemory_operand" "n,a,a,a"))
(use (match_operand 2 "immediate_operand" "X,R,X,X"))
- (clobber (match_scratch:P 3 "=X,X,X,&a"))
+ (clobber (match_scratch:DI 3 "=X,X,X,&a"))
(clobber (reg:CC CC_REGNUM))]
"(GET_MODE (operands[1]) == Pmode || GET_MODE (operands[1]) == VOIDmode)"
"#"
[(set_attr "type" "cs")
- (set_attr "cpu_facility" "*,*,z10,cpu_zarch")])
+ (set_attr "cpu_facility" "*,*,z10,*")])
(define_split
[(set (match_operand:BLK 0 "memory_operand" "")
; Initialize a block of arbitrary length with (operands[2] % 256).
-(define_expand "setmem_long_<P:mode>"
+(define_expand "setmem_long_di"
[(parallel
[(clobber (match_dup 1))
(set (match_operand:BLK 0 "memory_operand" "")
- (unspec:BLK [(match_operand:P 2 "setmem_operand" "")
- (match_dup 4)] UNSPEC_REPLICATE_BYTE))
+ (unspec:BLK [(match_operand:DI 2 "setmem_operand" "")
+ (match_dup 4)] UNSPEC_REPLICATE_BYTE))
(use (match_dup 3))
(clobber (reg:CC CC_REGNUM))])]
""
{
- machine_mode sreg_mode = TARGET_ZARCH ? DImode : SImode;
- machine_mode dreg_mode = TARGET_ZARCH ? TImode : DImode;
- rtx reg0 = gen_reg_rtx (dreg_mode);
- rtx reg1 = gen_reg_rtx (dreg_mode);
- rtx addr0 = gen_lowpart (Pmode, gen_highpart (sreg_mode, reg0));
+ rtx reg0 = gen_reg_rtx (TImode);
+ rtx reg1 = gen_reg_rtx (TImode);
+ rtx addr0 = gen_lowpart (Pmode, gen_highpart (DImode, reg0));
rtx len0 = gen_lowpart (Pmode, reg0);
emit_clobber (reg0);
operands[4] = gen_lowpart (Pmode, operands[1]);
})
-; Patterns for 31 bit + Esa and 64 bit + Zarch.
-
(define_insn "*setmem_long"
- [(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
- (set (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "0") 0))
- (unspec:BLK [(match_operand:P 2 "setmem_operand" "Y")
- (subreg:P (match_dup 3) <modesize>)]
- UNSPEC_REPLICATE_BYTE))
- (use (match_operand:<DBL> 1 "register_operand" "d"))
- (clobber (reg:CC CC_REGNUM))]
- "TARGET_64BIT || !TARGET_ZARCH"
- "mvcle\t%0,%1,%Y2\;jo\t.-4"
- [(set_attr "length" "8")
- (set_attr "type" "vs")])
-
-(define_insn "*setmem_long_and"
- [(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
- (set (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "0") 0))
- (unspec:BLK [(zero_extend:P (match_operand:QI 2 "setmem_operand" "Y"))
- (subreg:P (match_dup 3) <modesize>)]
- UNSPEC_REPLICATE_BYTE))
- (use (match_operand:<DBL> 1 "register_operand" "d"))
- (clobber (reg:CC CC_REGNUM))]
- "(TARGET_64BIT || !TARGET_ZARCH)"
- "mvcle\t%0,%1,%Y2\;jo\t.-4"
- [(set_attr "length" "8")
- (set_attr "type" "vs")])
-
-; Variants for 31 bit + Zarch, necessary because of the odd in-register offsets
-; of the SImode subregs.
-
-(define_insn "*setmem_long_31z"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
- (set (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "0") 4))
- (unspec:BLK [(match_operand:SI 2 "setmem_operand" "Y")
- (subreg:SI (match_dup 3) 12)] UNSPEC_REPLICATE_BYTE))
+ (set (mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "0") 0))
+ (unspec:BLK [(match_operand:DI 2 "setmem_operand" "Y")
+ (subreg:DI (match_dup 3) <modesize>)]
+ UNSPEC_REPLICATE_BYTE))
(use (match_operand:TI 1 "register_operand" "d"))
(clobber (reg:CC CC_REGNUM))]
- "!TARGET_64BIT && TARGET_ZARCH"
+ ""
"mvcle\t%0,%1,%Y2\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
-(define_insn "*setmem_long_and_31z"
+(define_insn "*setmem_long_and"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
- (set (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "0") 4))
- (unspec:BLK [(zero_extend:SI (match_operand:QI 2 "setmem_operand" "Y"))
- (subreg:SI (match_dup 3) 12)] UNSPEC_REPLICATE_BYTE))
+ (set (mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "0") 0))
+ (unspec:BLK [(zero_extend:DI (match_operand:QI 2 "setmem_operand" "Y"))
+ (subreg:DI (match_dup 3) <modesize>)]
+ UNSPEC_REPLICATE_BYTE))
(use (match_operand:TI 1 "register_operand" "d"))
(clobber (reg:CC CC_REGNUM))]
- "(!TARGET_64BIT && TARGET_ZARCH)"
+ ""
"mvcle\t%0,%1,%Y2\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
(match_operand:BLK 1 "memory_operand" "Q,Q,Q,Q")))
(use (match_operand 2 "nonmemory_operand" "n,a,a,a"))
(use (match_operand 3 "immediate_operand" "X,R,X,X"))
- (clobber (match_scratch:P 4 "=X,X,X,&a"))]
+ (clobber (match_scratch:DI 4 "=X,X,X,&a"))]
"(GET_MODE (operands[2]) == Pmode || GET_MODE (operands[2]) == VOIDmode)"
"#"
[(set_attr "type" "cs")
- (set_attr "cpu_facility" "*,*,z10,cpu_zarch")])
+ (set_attr "cpu_facility" "*,*,z10,*")])
(define_split
[(set (reg:CCU CC_REGNUM)
(use (match_dup 3))])]
""
{
- machine_mode sreg_mode = TARGET_ZARCH ? DImode : SImode;
- machine_mode dreg_mode = TARGET_ZARCH ? TImode : DImode;
- rtx reg0 = gen_reg_rtx (dreg_mode);
- rtx reg1 = gen_reg_rtx (dreg_mode);
- rtx addr0 = gen_lowpart (Pmode, gen_highpart (sreg_mode, reg0));
- rtx addr1 = gen_lowpart (Pmode, gen_highpart (sreg_mode, reg1));
+ rtx reg0 = gen_reg_rtx (TImode);
+ rtx reg1 = gen_reg_rtx (TImode);
+ rtx addr0 = gen_lowpart (Pmode, gen_highpart (DImode, reg0));
+ rtx addr1 = gen_lowpart (Pmode, gen_highpart (DImode, reg1));
rtx len0 = gen_lowpart (Pmode, reg0);
rtx len1 = gen_lowpart (Pmode, reg1);
})
(define_insn "*cmpmem_long"
- [(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
- (clobber (match_operand:<DBL> 1 "register_operand" "=d"))
- (set (reg:CCU CC_REGNUM)
- (compare:CCU (mem:BLK (subreg:P (match_operand:<DBL> 2 "register_operand" "0") 0))
- (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "1") 0))))
- (use (match_dup 2))
- (use (match_dup 3))]
- "TARGET_64BIT || !TARGET_ZARCH"
- "clcle\t%0,%1,0\;jo\t.-4"
- [(set_attr "length" "8")
- (set_attr "type" "vs")])
-
-(define_insn "*cmpmem_long_31z"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
(clobber (match_operand:TI 1 "register_operand" "=d"))
(set (reg:CCU CC_REGNUM)
- (compare:CCU (mem:BLK (subreg:SI (match_operand:TI 2 "register_operand" "0") 4))
- (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "1") 4))))
+ (compare:CCU (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0))
+ (mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "1") 0))))
(use (match_dup 2))
(use (match_dup 3))]
- "!TARGET_64BIT && TARGET_ZARCH"
+ ""
"clcle\t%0,%1,0\;jo\t.-4"
- [(set_attr "op_type" "NN")
- (set_attr "type" "vs")
- (set_attr "length" "8")])
+ [(set_attr "length" "8")
+ (set_attr "type" "vs")])
; Convert CCUmode condition code to integer.
; Result is zero if EQ, positive if LTU, negative if GTU.
(sign_extend:DI (unspec:SI [(match_operand:CCU 1 "register_operand" "0")]
UNSPEC_STRCMPCC_TO_INT)))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
"#"
"&& reload_completed"
[(set (match_dup 0) (ashift:DI (match_dup 0) (const_int 34)))
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=d")
(sign_extend:DI (unspec:SI [(match_dup 1)] UNSPEC_STRCMPCC_TO_INT)))]
- "s390_match_ccmode (insn, CCSmode) && TARGET_ZARCH"
+ "s390_match_ccmode (insn, CCSmode)"
"#"
"&& reload_completed"
[(set (match_dup 0) (ashift:DI (match_dup 0) (const_int 34)))
(unspec:DI [(match_operand:BLK 1 "s_operand" "S")
(match_operand 2 "const_int_operand" "n")] UNSPEC_ICM))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
"icmh\t%0,%2,%S1"
[(set_attr "op_type" "RSY")
(set_attr "z10prop" "z10_super")])
-(define_insn "*sethighpartdi_31"
- [(set (match_operand:DI 0 "register_operand" "=d,d")
- (unspec:DI [(match_operand:BLK 1 "s_operand" "Q,S")
- (match_operand 2 "const_int_operand" "n,n")] UNSPEC_ICM))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH"
- "@
- icm\t%0,%2,%S1
- icmy\t%0,%2,%S1"
- [(set_attr "op_type" "RS,RSY")
- (set_attr "cpu_facility" "*,longdisp")
- (set_attr "z10prop" "z10_super_E1,z10_super_E1")])
-
;
; extv instruction patterns
;
})
(define_insn "*extzv<mode><clobbercc_or_nocc>"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (zero_extract:GPR
- (match_operand:GPR 1 "register_operand" "d")
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (zero_extract:DSI
+ (match_operand:DSI 1 "register_operand" "d")
(match_operand 2 "const_int_operand" "") ; size
(match_operand 3 "const_int_operand" ""))) ; start
]
(set_attr "z10prop" "z10_super_E1")])
(define_insn_and_split "*pre_z10_extzv<mode>"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (zero_extract:GPR (match_operand:QI 1 "s_operand" "S")
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (zero_extract:DSI (match_operand:QI 1 "s_operand" "S")
(match_operand 2 "nonzero_shift_count_operand" "")
(const_int 0)))
(clobber (reg:CC CC_REGNUM))]
"#"
"&& reload_completed"
[(parallel
- [(set (match_dup 0) (unspec:GPR [(match_dup 1) (match_dup 3)] UNSPEC_ICM))
+ [(set (match_dup 0) (unspec:DSI [(match_dup 1) (match_dup 3)] UNSPEC_ICM))
(clobber (reg:CC CC_REGNUM))])
- (set (match_dup 0) (lshiftrt:GPR (match_dup 0) (match_dup 2)))]
+ (set (match_dup 0) (lshiftrt:DSI (match_dup 0) (match_dup 2)))]
{
int bitsize = INTVAL (operands[2]);
int size = (bitsize - 1) / BITS_PER_UNIT + 1; /* round up */
operands[1] = adjust_address (operands[1], BLKmode, 0);
set_mem_size (operands[1], size);
- operands[2] = GEN_INT (<GPR:bitsize> - bitsize);
+ operands[2] = GEN_INT (<DSI:bitsize> - bitsize);
operands[3] = GEN_INT (mask);
})
(define_insn_and_split "*pre_z10_extv<mode>"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (sign_extract:GPR (match_operand:QI 1 "s_operand" "S")
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (sign_extract:DSI (match_operand:QI 1 "s_operand" "S")
(match_operand 2 "nonzero_shift_count_operand" "")
(const_int 0)))
(clobber (reg:CC CC_REGNUM))]
"#"
"&& reload_completed"
[(parallel
- [(set (match_dup 0) (unspec:GPR [(match_dup 1) (match_dup 3)] UNSPEC_ICM))
+ [(set (match_dup 0) (unspec:DSI [(match_dup 1) (match_dup 3)] UNSPEC_ICM))
(clobber (reg:CC CC_REGNUM))])
(parallel
- [(set (match_dup 0) (ashiftrt:GPR (match_dup 0) (match_dup 2)))
+ [(set (match_dup 0) (ashiftrt:DSI (match_dup 0) (match_dup 2)))
(clobber (reg:CC CC_REGNUM))])]
{
int bitsize = INTVAL (operands[2]);
operands[1] = adjust_address (operands[1], BLKmode, 0);
set_mem_size (operands[1], size);
- operands[2] = GEN_INT (<GPR:bitsize> - bitsize);
+ operands[2] = GEN_INT (<DSI:bitsize> - bitsize);
operands[3] = GEN_INT (mask);
})
; the location operand isn't word mode. However, we do this in the
; back-end when generating atomic operations. See s390_two_part_insv.
(define_insn "*insv<mode><clobbercc_or_nocc>"
- [(set (zero_extract:GPR (match_operand:GPR 0 "nonimmediate_operand" "+d")
+ [(set (zero_extract:DSI (match_operand:DSI 0 "nonimmediate_operand" "+d")
(match_operand 1 "const_int_operand" "I") ; size
(match_operand 2 "const_int_operand" "I")) ; pos
- (match_operand:GPR 3 "nonimmediate_operand" "d"))]
+ (match_operand:DSI 3 "nonimmediate_operand" "d"))]
"<z10_or_zEC12_cond>
&& EXTRACT_ARGS_IN_RANGE (INTVAL (operands[1]), INTVAL (operands[2]),
GET_MODE_BITSIZE (<MODE>mode))
; and op1 with a mask being 1 for the selected bits and 0 for the rest
; and op3=op0 with a mask being 0 for the selected bits and 1 for the rest
(define_insn "*insv<mode><clobbercc_or_nocc>_noshift"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "=d,d")
- (ior:GPR (and:GPR (match_operand:GPR 1 "nonimmediate_operand" "d,0")
- (match_operand:GPR 2 "contiguous_bitmask_operand" ""))
- (and:GPR (match_operand:GPR 3 "nonimmediate_operand" "0,d")
- (match_operand:GPR 4 "const_int_operand" ""))))]
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d,d")
+ (ior:DSI (and:DSI (match_operand:DSI 1 "nonimmediate_operand" "d,0")
+ (match_operand:DSI 2 "contiguous_bitmask_operand" ""))
+ (and:DSI (match_operand:DSI 3 "nonimmediate_operand" "0,d")
+ (match_operand:DSI 4 "const_int_operand" ""))))]
"<z10_or_zEC12_cond> && INTVAL (operands[2]) == ~INTVAL (operands[4])"
"@
<risbg_n>\t%0,%1,%<bfstart>2,%<bfend>2,0
; Implement appending Y on the left of S bits of X
; x = (y << s) | (x & ((1 << s) - 1))
(define_insn "*insv<mode><clobbercc_or_nocc>_appendbitsleft"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "=d")
- (ior:GPR (and:GPR (match_operand:GPR 1 "nonimmediate_operand" "0")
- (match_operand:GPR 2 "immediate_operand" ""))
- (ashift:GPR (match_operand:GPR 3 "nonimmediate_operand" "d")
- (match_operand:GPR 4 "nonzero_shift_count_operand" ""))))]
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d")
+ (ior:DSI (and:DSI (match_operand:DSI 1 "nonimmediate_operand" "0")
+ (match_operand:DSI 2 "immediate_operand" ""))
+ (ashift:DSI (match_operand:DSI 3 "nonimmediate_operand" "d")
+ (match_operand:DSI 4 "nonzero_shift_count_operand" ""))))]
"<z10_or_zEC12_cond>
&& UINTVAL (operands[2]) == (HOST_WIDE_INT_1U << UINTVAL (operands[4])) - 1"
"<risbg_n>\t%0,%3,<bitoff>,64-%4-1,%4"
; a = ((i32)a & -16777216) | (((ui32)b) >> 8)
(define_insn "*<risbg_n>_<mode>_ior_and_lshiftrt"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (ior:GPR (and:GPR
- (match_operand:GPR 1 "register_operand" "0")
- (match_operand:GPR 2 "const_int_operand" ""))
- (lshiftrt:GPR
- (match_operand:GPR 3 "register_operand" "d")
- (match_operand:GPR 4 "nonzero_shift_count_operand" ""))))]
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (ior:DSI (and:DSI
+ (match_operand:DSI 1 "register_operand" "0")
+ (match_operand:DSI 2 "const_int_operand" ""))
+ (lshiftrt:DSI
+ (match_operand:DSI 3 "register_operand" "d")
+ (match_operand:DSI 4 "nonzero_shift_count_operand" ""))))]
"<z10_or_zEC12_cond> && UINTVAL (operands[2])
== (HOST_WIDE_INT_M1U
<< (GET_MODE_BITSIZE (<MODE>mode) - UINTVAL (operands[4])))"
; -> z = y >> d; z = risbg;
(define_split
- [(set (match_operand:GPR 0 "nonimmediate_operand" "")
- (ior:GPR (lshiftrt:GPR (match_operand:GPR 1 "nonimmediate_operand" "")
- (match_operand:GPR 2 "nonzero_shift_count_operand" ""))
- (ashift:GPR (match_operand:GPR 3 "nonimmediate_operand" "")
- (match_operand:GPR 4 "nonzero_shift_count_operand" ""))))]
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "")
+ (ior:DSI (lshiftrt:DSI (match_operand:DSI 1 "nonimmediate_operand" "")
+ (match_operand:DSI 2 "nonzero_shift_count_operand" ""))
+ (ashift:DSI (match_operand:DSI 3 "nonimmediate_operand" "")
+ (match_operand:DSI 4 "nonzero_shift_count_operand" ""))))]
"TARGET_ZEC12 && UINTVAL (operands[2]) + UINTVAL (operands[4]) >= <bitsize>"
[(set (match_dup 6)
- (lshiftrt:GPR (match_dup 1) (match_dup 2)))
+ (lshiftrt:DSI (match_dup 1) (match_dup 2)))
(set (match_dup 0)
- (ior:GPR (and:GPR (match_dup 6) (match_dup 5))
- (ashift:GPR (match_dup 3) (match_dup 4))))]
+ (ior:DSI (and:DSI (match_dup 6) (match_dup 5))
+ (ashift:DSI (match_dup 3) (match_dup 4))))]
{
operands[5] = GEN_INT ((HOST_WIDE_INT_1U << UINTVAL (operands[4])) - 1);
if (reg_overlap_mentioned_p (operands[0], operands[3]))
(define_split
[(parallel
- [(set (match_operand:GPR 0 "nonimmediate_operand" "")
- (ior:GPR (lshiftrt:GPR (match_operand:GPR 1 "nonimmediate_operand" "")
- (match_operand:GPR 2 "nonzero_shift_count_operand" ""))
- (ashift:GPR (match_operand:GPR 3 "nonimmediate_operand" "")
- (match_operand:GPR 4 "nonzero_shift_count_operand" ""))))
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "")
+ (ior:DSI (lshiftrt:DSI (match_operand:DSI 1 "nonimmediate_operand" "")
+ (match_operand:DSI 2 "nonzero_shift_count_operand" ""))
+ (ashift:DSI (match_operand:DSI 3 "nonimmediate_operand" "")
+ (match_operand:DSI 4 "nonzero_shift_count_operand" ""))))
(clobber (reg:CC CC_REGNUM))])]
"TARGET_Z10 && !TARGET_ZEC12 && UINTVAL (operands[2]) + UINTVAL (operands[4]) >= <bitsize>"
[(set (match_dup 6)
- (lshiftrt:GPR (match_dup 1) (match_dup 2)))
+ (lshiftrt:DSI (match_dup 1) (match_dup 2)))
(parallel
[(set (match_dup 0)
- (ior:GPR (and:GPR (match_dup 6) (match_dup 5))
- (ashift:GPR (match_dup 3) (match_dup 4))))
+ (ior:DSI (and:DSI (match_dup 6) (match_dup 5))
+ (ashift:DSI (match_dup 3) (match_dup 4))))
(clobber (reg:CC CC_REGNUM))])]
{
operands[5] = GEN_INT ((HOST_WIDE_INT_1U << UINTVAL (operands[4])) - 1);
; rosbg, rxsbg
(define_insn "*r<noxa>sbg_<mode>_noshift"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "=d")
- (IXOR:GPR
- (and:GPR (match_operand:GPR 1 "nonimmediate_operand" "d")
- (match_operand:GPR 2 "contiguous_bitmask_operand" ""))
- (match_operand:GPR 3 "nonimmediate_operand" "0")))
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d")
+ (IXOR:DSI
+ (and:DSI (match_operand:DSI 1 "nonimmediate_operand" "d")
+ (match_operand:DSI 2 "contiguous_bitmask_operand" ""))
+ (match_operand:DSI 3 "nonimmediate_operand" "0")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z10"
"r<noxa>sbg\t%0,%1,%<bfstart>2,%<bfend>2,0"
; rosbg, rxsbg
(define_insn "*r<noxa>sbg_<mode>_srl_bitmask"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "=d")
- (IXOR:GPR
- (and:GPR
- (lshiftrt:GPR
- (match_operand:GPR 1 "nonimmediate_operand" "d")
- (match_operand:GPR 3 "nonzero_shift_count_operand" ""))
- (match_operand:GPR 2 "contiguous_bitmask_nowrap_operand" ""))
- (match_operand:GPR 4 "nonimmediate_operand" "0")))
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d")
+ (IXOR:DSI
+ (and:DSI
+ (lshiftrt:DSI
+ (match_operand:DSI 1 "nonimmediate_operand" "d")
+ (match_operand:DSI 3 "nonzero_shift_count_operand" ""))
+ (match_operand:DSI 2 "contiguous_bitmask_nowrap_operand" ""))
+ (match_operand:DSI 4 "nonimmediate_operand" "0")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z10
&& s390_extzv_shift_ok (<bitsize>, 64 - INTVAL (operands[3]),
; rosbg, rxsbg
(define_insn "*r<noxa>sbg_<mode>_sll_bitmask"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "=d")
- (IXOR:GPR
- (and:GPR
- (ashift:GPR
- (match_operand:GPR 1 "nonimmediate_operand" "d")
- (match_operand:GPR 3 "nonzero_shift_count_operand" ""))
- (match_operand:GPR 2 "contiguous_bitmask_nowrap_operand" ""))
- (match_operand:GPR 4 "nonimmediate_operand" "0")))
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d")
+ (IXOR:DSI
+ (and:DSI
+ (ashift:DSI
+ (match_operand:DSI 1 "nonimmediate_operand" "d")
+ (match_operand:DSI 3 "nonzero_shift_count_operand" ""))
+ (match_operand:DSI 2 "contiguous_bitmask_nowrap_operand" ""))
+ (match_operand:DSI 4 "nonimmediate_operand" "0")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z10
&& s390_extzv_shift_ok (<bitsize>, INTVAL (operands[3]),
;; a = a ^ (b << const_int)
; rosbg, rxsbg
(define_insn "*r<noxa>sbg_<mode>_sll"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "=d")
- (IXOR:GPR
- (ashift:GPR
- (match_operand:GPR 1 "nonimmediate_operand" "d")
- (match_operand:GPR 2 "nonzero_shift_count_operand" ""))
- (match_operand:GPR 3 "nonimmediate_operand" "0")))
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d")
+ (IXOR:DSI
+ (ashift:DSI
+ (match_operand:DSI 1 "nonimmediate_operand" "d")
+ (match_operand:DSI 2 "nonzero_shift_count_operand" ""))
+ (match_operand:DSI 3 "nonimmediate_operand" "0")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z10"
{
;; a = a ^ (b >> const_int)
; rosbg, rxsbg
(define_insn "*r<noxa>sbg_<mode>_srl"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "=d")
- (IXOR:GPR
- (lshiftrt:GPR
- (match_operand:GPR 1 "nonimmediate_operand" "d")
- (match_operand:GPR 2 "nonzero_shift_count_operand" ""))
- (match_operand:GPR 3 "nonimmediate_operand" "0")))
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d")
+ (IXOR:DSI
+ (lshiftrt:DSI
+ (match_operand:DSI 1 "nonimmediate_operand" "d")
+ (match_operand:DSI 2 "nonzero_shift_count_operand" ""))
+ (match_operand:DSI 3 "nonimmediate_operand" "0")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z10"
{
"rnsbg\t%0,%4,%2,%2+%1-1,%3"
[(set_attr "op_type" "RIE")])
-(define_insn "*insv<mode>_mem_reg"
- [(set (zero_extract:W (match_operand:QI 0 "memory_operand" "+Q,S")
- (match_operand 1 "const_int_operand" "n,n")
- (const_int 0))
- (match_operand:W 2 "register_operand" "d,d"))]
+(define_insn "*insvdi_mem_reg"
+ [(set (zero_extract:DI (match_operand:QI 0 "memory_operand" "+Q,S")
+ (match_operand 1 "const_int_operand" "n,n")
+ (const_int 0))
+ (match_operand:DI 2 "register_operand" "d,d"))]
"EXTRACT_ARGS_IN_RANGE (INTVAL (operands[1]), 0, 64)
&& INTVAL (operands[1]) > 0
&& INTVAL (operands[1]) <= GET_MODE_BITSIZE (SImode)
(const_int 0))
(lshiftrt:DI (match_operand:DI 2 "register_operand" "d")
(const_int 32)))]
- "TARGET_ZARCH
- && EXTRACT_ARGS_IN_RANGE (INTVAL (operands[1]), 0, 64)
+ "EXTRACT_ARGS_IN_RANGE (INTVAL (operands[1]), 0, 64)
&& INTVAL (operands[1]) > 0
&& INTVAL (operands[1]) <= GET_MODE_BITSIZE (SImode)
&& INTVAL (operands[1]) % BITS_PER_UNIT == 0"
(const_int 16)
(match_operand 1 "const_int_operand" "n"))
(match_operand:DI 2 "const_int_operand" "n"))]
- "TARGET_ZARCH
- && EXTRACT_ARGS_IN_RANGE (16, INTVAL (operands[1]), 64)
+ "EXTRACT_ARGS_IN_RANGE (16, INTVAL (operands[1]), 64)
&& INTVAL (operands[1]) >= 0
&& INTVAL (operands[1]) < BITS_PER_WORD
&& INTVAL (operands[1]) % 16 == 0"
(unspec:DI [(match_operand:DI 1 "register_operand" "d")
(match_operand:DI 2 "register_operand" "d")]
UNSPEC_BDEPG))]
- "TARGET_Z17 && TARGET_64BIT"
+ "TARGET_Z17"
"bdepg\t%0,%1,%2"
[(set_attr "op_type" "RRF")])
(unspec:DI [(match_operand:DI 1 "register_operand" "d")
(match_operand:DI 2 "register_operand" "d")]
UNSPEC_BEXTG))]
- "TARGET_Z17 && TARGET_64BIT"
+ "TARGET_Z17"
"bextg\t%0,%1,%2"
[(set_attr "op_type" "RRF")])
; extendsidi2 instruction pattern(s).
;
-(define_expand "extendsidi2"
- [(set (match_operand:DI 0 "register_operand" "")
- (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "")))]
- ""
-{
- if (!TARGET_ZARCH)
- {
- emit_clobber (operands[0]);
- emit_move_insn (gen_highpart (SImode, operands[0]), operands[1]);
- emit_move_insn (gen_lowpart (SImode, operands[0]), const0_rtx);
- emit_insn (gen_ashrdi3 (operands[0], operands[0], GEN_INT (32)));
- DONE;
- }
-})
-
-(define_insn "*extendsidi2"
+(define_insn "extendsidi2"
[(set (match_operand:DI 0 "register_operand" "=d,d,d")
(sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,T,b")))]
- "TARGET_ZARCH"
+ ""
"@
lgfr\t%0,%1
lgf\t%0,%1
(sign_extend:DSI (match_operand:HQI 1 "nonimmediate_operand" "")))]
""
{
- if (<DSI:MODE>mode == DImode && !TARGET_ZARCH)
- {
- rtx tmp = gen_reg_rtx (SImode);
- emit_insn (gen_extend<HQI:mode>si2 (tmp, operands[1]));
- emit_insn (gen_extendsidi2 (operands[0], tmp));
- DONE;
- }
- else if (!TARGET_EXTIMM)
+ if (!TARGET_EXTIMM)
{
rtx bitcount = GEN_INT (<DSI:bitsize> - <HQI:bitsize>);
(define_insn "*extendhidi2_extimm"
[(set (match_operand:DI 0 "register_operand" "=d,d,d")
(sign_extend:DI (match_operand:HI 1 "general_operand" "d,T,b")))]
- "TARGET_ZARCH && TARGET_EXTIMM"
+ "TARGET_EXTIMM"
"@
lghr\t%0,%1
lgh\t%0,%1
(define_insn "*extendhidi2"
[(set (match_operand:DI 0 "register_operand" "=d")
(sign_extend:DI (match_operand:HI 1 "memory_operand" "T")))]
- "TARGET_ZARCH"
+ ""
"lgh\t%0,%1"
[(set_attr "op_type" "RXY")
(set_attr "z10prop" "z10_super_E1")])
; lbr, lgbr, lb, lgb
(define_insn "*extendqi<mode>2_extimm"
- [(set (match_operand:GPR 0 "register_operand" "=d,d")
- (sign_extend:GPR (match_operand:QI 1 "nonimmediate_operand" "d,T")))]
+ [(set (match_operand:DSI 0 "register_operand" "=d,d")
+ (sign_extend:DSI (match_operand:QI 1 "nonimmediate_operand" "d,T")))]
"TARGET_EXTIMM"
"@
l<g>br\t%0,%1
; lb, lgb
(define_insn "*extendqi<mode>2"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (sign_extend:GPR (match_operand:QI 1 "memory_operand" "T")))]
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (sign_extend:DSI (match_operand:QI 1 "memory_operand" "T")))]
"!TARGET_EXTIMM && TARGET_LONG_DISPLACEMENT"
"l<g>b\t%0,%1"
[(set_attr "op_type" "RXY")
(set_attr "z10prop" "z10_super_E1")])
(define_insn_and_split "*extendqi<mode>2_short_displ"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (sign_extend:GPR (match_operand:QI 1 "s_operand" "Q")))
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (sign_extend:DSI (match_operand:QI 1 "s_operand" "Q")))
(clobber (reg:CC CC_REGNUM))]
"!TARGET_EXTIMM && !TARGET_LONG_DISPLACEMENT"
"#"
"&& reload_completed"
[(parallel
- [(set (match_dup 0) (unspec:GPR [(match_dup 1) (const_int 8)] UNSPEC_ICM))
+ [(set (match_dup 0) (unspec:DSI [(match_dup 1) (const_int 8)] UNSPEC_ICM))
(clobber (reg:CC CC_REGNUM))])
(parallel
- [(set (match_dup 0) (ashiftrt:GPR (match_dup 0) (match_dup 2)))
+ [(set (match_dup 0) (ashiftrt:DSI (match_dup 0) (match_dup 2)))
(clobber (reg:CC CC_REGNUM))])]
{
operands[1] = adjust_address (operands[1], BLKmode, 0);
set_mem_size (operands[1], GET_MODE_SIZE (QImode));
- operands[2] = GEN_INT (<GPR:bitsize> - BITS_PER_UNIT);
+ operands[2] = GEN_INT (<DSI:bitsize> - BITS_PER_UNIT);
})
;
; zero_extendsidi2 instruction pattern(s).
;
-(define_expand "zero_extendsidi2"
- [(set (match_operand:DI 0 "register_operand" "")
- (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "")))]
- ""
-{
- if (!TARGET_ZARCH)
- {
- emit_clobber (operands[0]);
- emit_move_insn (gen_lowpart (SImode, operands[0]), operands[1]);
- emit_move_insn (gen_highpart (SImode, operands[0]), const0_rtx);
- DONE;
- }
-})
-
-(define_insn "*zero_extendsidi2"
+(define_insn "zero_extendsidi2"
[(set (match_operand:DI 0 "register_operand" "=d,d,d,d")
(zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,T,b,v")))]
- "TARGET_ZARCH"
+ ""
"@
llgfr\t%0,%1
llgf\t%0,%1
[(set (match_operand:DI 0 "register_operand" "=d")
(and:DI (subreg:DI (match_operand:SI 1 "memory_operand" "T") 0)
(const_int 2147483647)))]
- "TARGET_ZARCH"
+ ""
"llgt\t%0,%1"
[(set_attr "op_type" "RXE")
(set_attr "z10prop" "z10_super_E1")])
(and:DI (subreg:DI (match_operand:SI 1 "memory_operand" "T") 0)
(const_int 2147483647)))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
"#"
"&& reload_completed"
[(set (match_dup 0)
[(set (match_operand:SI 0 "register_operand" "=d,d")
(and:SI (match_operand:SI 1 "nonimmediate_operand" "d,T")
(const_int 2147483647)))]
- "TARGET_ZARCH"
+ ""
"@
llgtr\t%0,%1
llgt\t%0,%1"
[(set (match_operand:DI 0 "register_operand" "=d,d")
(and:DI (match_operand:DI 1 "nonimmediate_operand" "d,o")
(const_int 2147483647)))]
- "TARGET_ZARCH"
+ ""
"@
llgtr\t%0,%1
llgt\t%0,%N1"
(and:DSI (match_operand:DSI 1 "nonimmediate_operand" "")
(const_int 2147483647)))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH && reload_completed"
+ "reload_completed"
[(set (match_dup 0)
(and:DSI (match_dup 1)
(const_int 2147483647)))]
(zero_extend:DI (match_operand:HQI 1 "nonimmediate_operand" "")))]
""
{
- if (!TARGET_ZARCH)
- {
- rtx tmp = gen_reg_rtx (SImode);
- emit_insn (gen_zero_extend<mode>si2 (tmp, operands[1]));
- emit_insn (gen_zero_extendsidi2 (operands[0], tmp));
- DONE;
- }
- else if (!TARGET_EXTIMM)
+ if (!TARGET_EXTIMM)
{
rtx bitcount = GEN_INT (64 - <HQI:bitsize>);
operands[1] = gen_lowpart (DImode, operands[1]);
; llhrl, llghrl
(define_insn "*zero_extendhi<mode>2_z10"
- [(set (match_operand:GPR 0 "register_operand" "=d,d,d,d")
- (zero_extend:GPR (match_operand:HI 1 "nonimmediate_operand" "d,T,b,v")))]
+ [(set (match_operand:DSI 0 "register_operand" "=d,d,d,d")
+ (zero_extend:DSI (match_operand:HI 1 "nonimmediate_operand" "d,T,b,v")))]
"TARGET_Z10"
"@
ll<g>hr\t%0,%1
(set_attr "relative_long" "*,*,yes,*")])
; llhr, llcr, llghr, llgcr, llh, llc, llgh, llgc
-(define_insn "*zero_extend<HQI:mode><GPR:mode>2_extimm"
- [(set (match_operand:GPR 0 "register_operand" "=d,d,d")
- (zero_extend:GPR (match_operand:HQI 1 "nonimmediate_operand" "d,T,v")))]
+(define_insn "*zero_extend<HQI:mode><DSI:mode>2_extimm"
+ [(set (match_operand:DSI 0 "register_operand" "=d,d,d")
+ (zero_extend:DSI (match_operand:HQI 1 "nonimmediate_operand" "d,T,v")))]
"TARGET_EXTIMM"
"@
ll<g><hc>r\t%0,%1
(set_attr "z10prop" "z10_super_E1,z10_fwd_A3,*")])
; llgh, llgc
-(define_insn "*zero_extend<HQI:mode><GPR:mode>2"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (zero_extend:GPR (match_operand:HQI 1 "memory_operand" "T")))]
- "TARGET_ZARCH && !TARGET_EXTIMM"
+(define_insn "*zero_extend<HQI:mode><DSI:mode>2"
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (zero_extend:DSI (match_operand:HQI 1 "memory_operand" "T")))]
+ "!TARGET_EXTIMM"
"llg<hc>\t%0,%1"
[(set_attr "op_type" "RXY")
(set_attr "z10prop" "z10_fwd_A3")])
-(define_insn_and_split "*zero_extendhisi2_31"
- [(set (match_operand:SI 0 "register_operand" "=&d")
- (zero_extend:SI (match_operand:HI 1 "s_operand" "S")))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH"
- "#"
- "&& reload_completed"
- [(set (match_dup 0) (const_int 0))
- (parallel
- [(set (strict_low_part (match_dup 2)) (match_dup 1))
- (clobber (reg:CC CC_REGNUM))])]
- "operands[2] = gen_lowpart (HImode, operands[0]);")
-
-(define_insn_and_split "*zero_extendqisi2_31"
- [(set (match_operand:SI 0 "register_operand" "=&d")
- (zero_extend:SI (match_operand:QI 1 "memory_operand" "T")))]
- "!TARGET_ZARCH"
- "#"
- "&& reload_completed"
- [(set (match_dup 0) (const_int 0))
- (set (strict_low_part (match_dup 2)) (match_dup 1))]
- "operands[2] = gen_lowpart (QImode, operands[0]);")
-
;
; zero_extendqihi2 instruction pattern(s).
;
(define_expand "zero_extendqihi2"
[(set (match_operand:HI 0 "register_operand" "")
(zero_extend:HI (match_operand:QI 1 "register_operand" "")))]
- "TARGET_ZARCH && !TARGET_EXTIMM"
+ "!TARGET_EXTIMM"
{
operands[1] = gen_lowpart (HImode, operands[1]);
emit_insn (gen_andhi3 (operands[0], operands[1], GEN_INT (0xff)));
(define_insn "*zero_extendqihi2_64"
[(set (match_operand:HI 0 "register_operand" "=d")
(zero_extend:HI (match_operand:QI 1 "memory_operand" "T")))]
- "TARGET_ZARCH && !TARGET_EXTIMM"
+ "!TARGET_EXTIMM"
"llgc\t%0,%1"
[(set_attr "op_type" "RXY")
(set_attr "z10prop" "z10_fwd_A3")])
-(define_insn_and_split "*zero_extendqihi2_31"
- [(set (match_operand:HI 0 "register_operand" "=&d")
- (zero_extend:HI (match_operand:QI 1 "memory_operand" "T")))]
- "!TARGET_ZARCH"
- "#"
- "&& reload_completed"
- [(set (match_dup 0) (const_int 0))
- (set (strict_low_part (match_dup 2)) (match_dup 1))]
- "operands[2] = gen_lowpart (QImode, operands[0]);")
-
;
; fixuns_trunc(dd|td|sf|df|tf)(si|di)2 expander
;
; This is the only entry point for fixuns_trunc. It multiplexes the
; expansion to either the *_emu expanders below for pre z196 machines
; or emits the default pattern otherwise.
-(define_expand "fixuns_trunc<FP:mode><GPR:mode>2<FP:tf_fpr>"
+(define_expand "fixuns_trunc<FP:mode><DSI:mode>2<FP:tf_fpr>"
[(parallel
- [(set (match_operand:GPR 0 "register_operand" "")
- (unsigned_fix:GPR (match_operand:FP 1 "register_operand" "")))
- (unspec:GPR [(match_dup 2)] UNSPEC_ROUND)
+ [(set (match_operand:DSI 0 "register_operand" "")
+ (unsigned_fix:DSI (match_operand:FP 1 "register_operand" "")))
+ (unspec:DSI [(match_dup 2)] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))])]
"TARGET_HARD_FLOAT"
{
{
/* We don't provide emulation for TD|DD->SI. */
if (GET_MODE_CLASS (<FP:MODE>mode) == MODE_DECIMAL_FLOAT
- && <GPR:MODE>mode == SImode)
+ && <DSI:MODE>mode == SImode)
FAIL;
- emit_insn (gen_fixuns_trunc<FP:mode><GPR:mode>2_emu (operands[0],
+ emit_insn (gen_fixuns_trunc<FP:mode><DSI:mode>2_emu (operands[0],
operands[1]));
DONE;
}
; Emulate the unsigned conversion with the signed version for pre z196
; machines.
-(define_expand "fixuns_trunc<BFP:mode><GPR:mode>2_emu"
+(define_expand "fixuns_trunc<BFP:mode><DSI:mode>2_emu"
[(parallel
- [(set (match_operand:GPR 0 "register_operand" "")
- (unsigned_fix:GPR (match_operand:BFP 1 "register_operand" "")))
- (unspec:GPR [(const_int BFP_RND_TOWARD_0)] UNSPEC_ROUND)
+ [(set (match_operand:DSI 0 "register_operand" "")
+ (unsigned_fix:DSI (match_operand:BFP 1 "register_operand" "")))
+ (unspec:DSI [(const_int BFP_RND_TOWARD_0)] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))])]
"!TARGET_Z196 && TARGET_HARD_FLOAT"
{
REAL_VALUE_TYPE cmp, sub;
operands[1] = force_reg (<BFP:MODE>mode, operands[1]);
- real_2expN (&cmp, <GPR:bitsize> - 1, <BFP:MODE>mode);
- real_2expN (&sub, <GPR:bitsize>, <BFP:MODE>mode);
+ real_2expN (&cmp, <DSI:bitsize> - 1, <BFP:MODE>mode);
+ real_2expN (&sub, <DSI:bitsize>, <BFP:MODE>mode);
emit_cmp_and_jump_insns (operands[1],
const_double_from_real_value (cmp, <BFP:MODE>mode),
LT, NULL_RTX, VOIDmode, 0, label1);
emit_insn (gen_sub<BFP:mode>3 (temp, operands[1],
const_double_from_real_value (sub, <BFP:MODE>mode)));
- emit_insn (gen_fix_trunc<BFP:mode><GPR:mode>2_bfp (operands[0], temp,
+ emit_insn (gen_fix_trunc<BFP:mode><DSI:mode>2_bfp (operands[0], temp,
GEN_INT (BFP_RND_TOWARD_MINF)));
emit_jump (label2);
emit_label (label1);
- emit_insn (gen_fix_trunc<BFP:mode><GPR:mode>2_bfp (operands[0],
+ emit_insn (gen_fix_trunc<BFP:mode><DSI:mode>2_bfp (operands[0],
operands[1],
GEN_INT (BFP_RND_TOWARD_0)));
emit_label (label2);
; (dd|td|sf|df|tf)->unsigned (di|si)
; clfebr, clfdbr, clfxbr, clgebr, clgdbr, clgxbr
; clfdtr, clfxtr, clgdtr, clgxtr
-(define_insn "*fixuns_trunc<FP:mode><GPR:mode>2_z196"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (unsigned_fix:GPR (match_operand:FP 1 "register_operand" "f")))
- (unspec:GPR [(match_operand:GPR 2 "immediate_operand" "K")] UNSPEC_ROUND)
+(define_insn "*fixuns_trunc<FP:mode><DSI:mode>2_z196"
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (unsigned_fix:DSI (match_operand:FP 1 "register_operand" "f")))
+ (unspec:DSI [(match_operand:DSI 2 "immediate_operand" "K")] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z196 && TARGET_HARD_FLOAT
- && (!TARGET_VX || <GPR:MODE>mode != DImode || <FP:MODE>mode != DFmode)"
- "cl<GPR:gf><FP:xde><FP:bt>r\t%0,%h2,%1,0"
+ && (!TARGET_VX || <DSI:MODE>mode != DImode || <FP:MODE>mode != DFmode)"
+ "cl<DSI:gf><FP:xde><FP:bt>r\t%0,%h2,%1,0"
[(set_attr "op_type" "RRF")
(set_attr "type" "ftoi")])
-(define_expand "fix_trunc<DSF:mode><GPR:mode>2"
- [(set (match_operand:GPR 0 "register_operand" "")
- (fix:GPR (match_operand:DSF 1 "register_operand" "")))]
+(define_expand "fix_trunc<DSF:mode><DSI:mode>2"
+ [(set (match_operand:DSI 0 "register_operand" "")
+ (fix:DSI (match_operand:DSF 1 "register_operand" "")))]
"TARGET_HARD_FLOAT"
{
- emit_insn (gen_fix_trunc<DSF:mode><GPR:mode>2_bfp (operands[0], operands[1],
+ emit_insn (gen_fix_trunc<DSF:mode><DSI:mode>2_bfp (operands[0], operands[1],
GEN_INT (BFP_RND_TOWARD_0)));
DONE;
})
(set_attr "type" "ftoi")])
; cgxbr, cgdbr, cgebr, cfxbr, cfdbr, cfebr
-(define_insn "*fix_trunc<BFP:mode><GPR:mode>2_bfp"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (fix:GPR (match_operand:BFP 1 "register_operand" "f")))
- (unspec:GPR [(match_operand:GPR 2 "immediate_operand" "K")] UNSPEC_ROUND)
+(define_insn "*fix_trunc<BFP:mode><DSI:mode>2_bfp"
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (fix:DSI (match_operand:BFP 1 "register_operand" "f")))
+ (unspec:DSI [(match_operand:DSI 2 "immediate_operand" "K")] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT
- && (!TARGET_VX || <GPR:MODE>mode != DImode || <BFP:MODE>mode != DFmode)"
- "c<GPR:gf><BFP:xde>br\t%0,%h2,%1"
+ && (!TARGET_VX || <DSI:MODE>mode != DImode || <BFP:MODE>mode != DFmode)"
+ "c<DSI:gf><BFP:xde>br\t%0,%h2,%1"
[(set_attr "op_type" "RRE")
(set_attr "type" "ftoi")])
-(define_expand "fix_trunc<BFP:mode><GPR:mode>2_bfp"
+(define_expand "fix_trunc<BFP:mode><DSI:mode>2_bfp"
[(parallel
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (fix:GPR (match_operand:BFP 1 "register_operand" "f")))
- (unspec:GPR [(match_operand:GPR 2 "immediate_operand" "K")] UNSPEC_ROUND)
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (fix:DSI (match_operand:BFP 1 "register_operand" "f")))
+ (unspec:DSI [(match_operand:DSI 2 "immediate_operand" "K")] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))])]
"TARGET_HARD_FLOAT")
;
(define_expand "fix_trunc<mode>di2"
[(set (match_operand:DI 0 "register_operand" "")
(fix:DI (match_operand:DFP 1 "nonimmediate_operand" "")))]
- "TARGET_ZARCH && TARGET_HARD_DFP"
+ "TARGET_HARD_DFP"
{
operands[1] = force_reg (<MODE>mode, operands[1]);
emit_insn (gen_fix_trunc<mode>di2_dfp (operands[0], operands[1],
(fix:DI (match_operand:DFP 1 "register_operand" "f")))
(unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH && TARGET_HARD_DFP"
+ "TARGET_HARD_DFP"
"cg<DFP:xde>tr\t%0,%h2,%1"
[(set_attr "op_type" "RRF")
(set_attr "type" "ftoidfp")])
;
(define_expand "fix_trunctf<mode>2_fpr"
- [(parallel [(set (match_operand:GPR 0 "register_operand" "")
- (fix:GPR (match_operand:TF 1 "register_operand" "")))
- (unspec:GPR [(const_int BFP_RND_TOWARD_0)] UNSPEC_ROUND)
+ [(parallel [(set (match_operand:DSI 0 "register_operand" "")
+ (fix:DSI (match_operand:TF 1 "register_operand" "")))
+ (unspec:DSI [(const_int BFP_RND_TOWARD_0)] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))])]
"TARGET_HARD_FLOAT && !TARGET_VXE"
"")
(define_insn "floatdi<mode>2<tf_fpr>"
[(set (match_operand:FP 0 "register_operand" "=f,v")
(float:FP (match_operand:DI 1 "register_operand" "d,v")))]
- "TARGET_ZARCH && TARGET_HARD_FLOAT"
+ "TARGET_HARD_FLOAT"
"@
c<xde>g<bt>r\t%0,%1
wcdgb\t%v0,%v1,0,0"
; cxlgbr, cdlgbr, celgbr, cxlgtr, cdlgtr
; cxlfbr, cdlfbr, celfbr, cxlftr, cdlftr
-(define_insn "*floatuns<GPR:mode><FP:mode>2"
+(define_insn "*floatuns<DSI:mode><FP:mode>2"
[(set (match_operand:FP 0 "register_operand" "=f")
- (unsigned_float:FP (match_operand:GPR 1 "register_operand" "d")))]
+ (unsigned_float:FP (match_operand:DSI 1 "register_operand" "d")))]
"TARGET_Z196 && TARGET_HARD_FLOAT
- && (!TARGET_VX || <FP:MODE>mode != DFmode || <GPR:MODE>mode != DImode)"
- "c<FP:xde>l<GPR:gf><FP:bt>r\t%0,0,%1,0"
+ && (!TARGET_VX || <FP:MODE>mode != DFmode || <DSI:MODE>mode != DImode)"
+ "c<FP:xde>l<DSI:gf><FP:bt>r\t%0,0,%1,0"
[(set_attr "op_type" "RRE")
(set_attr "type" "itof<FP:type>")])
-(define_expand "floatuns<GPR:mode><FP:mode>2<tf_fpr>"
+(define_expand "floatuns<DSI:mode><FP:mode>2<tf_fpr>"
[(set (match_operand:FP 0 "register_operand" "")
- (unsigned_float:FP (match_operand:GPR 1 "register_operand" "")))]
+ (unsigned_float:FP (match_operand:DSI 1 "register_operand" "")))]
"TARGET_Z196 && TARGET_HARD_FLOAT")
;
(plus:TI (match_operand:TI 1 "nonimmediate_operand" "")
(match_operand:TI 2 "general_operand" "") ) )
(clobber (reg:CC CC_REGNUM))])]
- "TARGET_ZARCH"
+ ""
{
/* For z13 we have vaq which doesn't set CC. */
if (TARGET_VX)
(plus:TI (match_operand:TI 1 "nonimmediate_operand" "%0")
(match_operand:TI 2 "general_operand" "do") ) )
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
"#"
"&& reload_completed"
[(parallel
(plus:DI (sign_extend:DI (match_operand:SI 2 "general_operand" "d,T"))
(match_operand:DI 1 "register_operand" "0,0")))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
"@
agfr\t%0,%2
agf\t%0,%2"
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=d,d")
(plus:DI (zero_extend:DI (match_dup 2)) (match_dup 1)))]
- "s390_match_ccmode (insn, CCLmode) && TARGET_ZARCH"
+ "s390_match_ccmode (insn, CCLmode)"
"@
algfr\t%0,%2
algf\t%0,%2"
(match_operand:DI 1 "register_operand" "0,0"))
(const_int 0)))
(clobber (match_scratch:DI 0 "=d,d"))]
- "s390_match_ccmode (insn, CCLmode) && TARGET_ZARCH"
+ "s390_match_ccmode (insn, CCLmode)"
"@
algfr\t%0,%2
algf\t%0,%2"
(plus:DI (zero_extend:DI (match_operand:SI 2 "general_operand" "d,T"))
(match_operand:DI 1 "register_operand" "0,0")))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
"@
algfr\t%0,%2
algf\t%0,%2"
[(set_attr "op_type" "RRE,RXY")
(set_attr "z10prop" "z10_super_E1,z10_super_E1")])
-(define_insn_and_split "*adddi3_31z"
- [(set (match_operand:DI 0 "nonimmediate_operand" "=&d")
- (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0")
- (match_operand:DI 2 "general_operand" "do") ) )
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH"
- "#"
- "&& reload_completed"
- [(parallel
- [(set (reg:CCL1 CC_REGNUM)
- (compare:CCL1 (plus:SI (match_dup 7) (match_dup 8))
- (match_dup 7)))
- (set (match_dup 6) (plus:SI (match_dup 7) (match_dup 8)))])
- (parallel
- [(set (match_dup 3) (plus:SI
- (plus:SI (ltu:SI (reg:CCL1 CC_REGNUM) (const_int 0))
- (match_dup 4)) (match_dup 5)))
- (clobber (reg:CC CC_REGNUM))])]
- "operands[3] = operand_subword (operands[0], 0, 0, DImode);
- operands[4] = operand_subword (operands[1], 0, 0, DImode);
- operands[5] = operand_subword (operands[2], 0, 0, DImode);
- operands[6] = operand_subword (operands[0], 1, 0, DImode);
- operands[7] = operand_subword (operands[1], 1, 0, DImode);
- operands[8] = operand_subword (operands[2], 1, 0, DImode);")
-
;
; addsi3 instruction pattern(s).
;
; ark, agrk, ar, ahi, ahik, aghik, alfi, slfi, a, ay, agr, aghi, algfi, slgfi, ag, asi, agsi
(define_insn "*add<mode>3"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "=d,d,d,d, d, d,d,d,S")
- (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,d,0,d, 0, 0,0,0,0")
- (match_operand:GPR 2 "general_operand" " d,d,K,K,Op,On,R,T,C") ) )
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d,d,d,d, d, d,d,d,S")
+ (plus:DSI (match_operand:DSI 1 "nonimmediate_operand" "%0,d,0,d, 0, 0,0,0,0")
+ (match_operand:DSI 2 "general_operand" " d,d,K,K,Op,On,R,T,C") ) )
(clobber (reg:CC CC_REGNUM))]
""
"@
; alr, alfi, slfi, al, aly, alrk, alhsik, algr, algfi, slgfi, alg, alsi, algsi, algrk, alghsik
(define_insn "add<mode>3_carry1_cc"
[(set (reg:CCL1 CC_REGNUM)
- (compare:CCL1 (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,d, 0, 0,d,0,0,0")
- (match_operand:GPR 2 "general_operand" " d,d,Op,On,K,R,T,C"))
+ (compare:CCL1 (plus:DSI (match_operand:DSI 1 "nonimmediate_operand" "%0,d, 0, 0,d,0,0,0")
+ (match_operand:DSI 2 "general_operand" " d,d,Op,On,K,R,T,C"))
(match_dup 1)))
- (set (match_operand:GPR 0 "nonimmediate_operand" "=d,d, d, d,d,d,d,d")
- (plus:GPR (match_dup 1) (match_dup 2)))]
+ (set (match_operand:DSI 0 "nonimmediate_operand" "=d,d, d, d,d,d,d,d")
+ (plus:DSI (match_dup 1) (match_dup 2)))]
""
"@
al<g>r\t%0,%2
; alr, al, aly, algr, alg, alrk, algrk
(define_insn "*add<mode>3_carry1_cconly"
[(set (reg CC_REGNUM)
- (compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,d,0,0")
- (match_operand:GPR 2 "general_operand" "d,d,R,T"))
+ (compare (plus:DSI (match_operand:DSI 1 "nonimmediate_operand" "%0,d,0,0")
+ (match_operand:DSI 2 "general_operand" "d,d,R,T"))
(match_dup 1)))
- (clobber (match_scratch:GPR 0 "=d,d,d,d"))]
+ (clobber (match_scratch:DSI 0 "=d,d,d,d"))]
"s390_match_ccmode (insn, CCL1mode)"
"@
al<g>r\t%0,%2
; alr, alfi, slfi, al, aly, algr, algfi, slgfi, alg, alsi, algsi, alrk, algrk, alhsik, alghsik
(define_insn "*add<mode>3_carry2_cc"
[(set (reg CC_REGNUM)
- (compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,d, 0, 0,d,0,0,0")
- (match_operand:GPR 2 "general_operand" " d,d,Op,On,K,R,T,C"))
+ (compare (plus:DSI (match_operand:DSI 1 "nonimmediate_operand" "%0,d, 0, 0,d,0,0,0")
+ (match_operand:DSI 2 "general_operand" " d,d,Op,On,K,R,T,C"))
(match_dup 2)))
- (set (match_operand:GPR 0 "nonimmediate_operand" "=d,d, d, d,d,d,d,S")
- (plus:GPR (match_dup 1) (match_dup 2)))]
+ (set (match_operand:DSI 0 "nonimmediate_operand" "=d,d, d, d,d,d,d,S")
+ (plus:DSI (match_dup 1) (match_dup 2)))]
"s390_match_ccmode (insn, CCL1mode)"
"@
al<g>r\t%0,%2
; alr, al, aly, algr, alg, alrk, algrk
(define_insn "*add<mode>3_carry2_cconly"
[(set (reg CC_REGNUM)
- (compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,d,0,0")
- (match_operand:GPR 2 "general_operand" "d,d,R,T"))
+ (compare (plus:DSI (match_operand:DSI 1 "nonimmediate_operand" "%0,d,0,0")
+ (match_operand:DSI 2 "general_operand" "d,d,R,T"))
(match_dup 2)))
- (clobber (match_scratch:GPR 0 "=d,d,d,d"))]
+ (clobber (match_scratch:DSI 0 "=d,d,d,d"))]
"s390_match_ccmode (insn, CCL1mode)"
"@
al<g>r\t%0,%2
; alr, alfi, slfi, al, aly, algr, algfi, slgfi, alg, alsi, algsi, alrk, algrk, alhsik, alghsik
(define_insn "*add<mode>3_cc"
[(set (reg CC_REGNUM)
- (compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,d, 0, 0,d,0,0,0")
- (match_operand:GPR 2 "general_operand" " d,d,Op,On,K,R,T,C"))
+ (compare (plus:DSI (match_operand:DSI 1 "nonimmediate_operand" "%0,d, 0, 0,d,0,0,0")
+ (match_operand:DSI 2 "general_operand" " d,d,Op,On,K,R,T,C"))
(const_int 0)))
- (set (match_operand:GPR 0 "nonimmediate_operand" "=d,d, d, d,d,d,d,S")
- (plus:GPR (match_dup 1) (match_dup 2)))]
+ (set (match_operand:DSI 0 "nonimmediate_operand" "=d,d, d, d,d,d,d,S")
+ (plus:DSI (match_dup 1) (match_dup 2)))]
"s390_match_ccmode (insn, CCLmode)"
"@
al<g>r\t%0,%2
; alr, al, aly, algr, alg, alrk, algrk
(define_insn "*add<mode>3_cconly"
[(set (reg CC_REGNUM)
- (compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,d,0,0")
- (match_operand:GPR 2 "general_operand" "d,d,R,T"))
+ (compare (plus:DSI (match_operand:DSI 1 "nonimmediate_operand" "%0,d,0,0")
+ (match_operand:DSI 2 "general_operand" "d,d,R,T"))
(const_int 0)))
- (clobber (match_scratch:GPR 0 "=d,d,d,d"))]
+ (clobber (match_scratch:DSI 0 "=d,d,d,d"))]
"s390_match_ccmode (insn, CCLmode)"
"@
al<g>r\t%0,%2
; alr, al, aly, algr, alg, alrk, algrk
(define_insn "*add<mode>3_cconly2"
[(set (reg CC_REGNUM)
- (compare (match_operand:GPR 1 "nonimmediate_operand" "%0,d,0,0")
- (neg:GPR (match_operand:GPR 2 "general_operand" "d,d,R,T"))))
- (clobber (match_scratch:GPR 0 "=d,d,d,d"))]
+ (compare (match_operand:DSI 1 "nonimmediate_operand" "%0,d,0,0")
+ (neg:DSI (match_operand:DSI 2 "general_operand" "d,d,R,T"))))
+ (clobber (match_scratch:DSI 0 "=d,d,d,d"))]
"s390_match_ccmode(insn, CCLmode)"
"@
al<g>r\t%0,%2
; ahi, afi, aghi, agfi, asi, agsi
(define_insn "*add<mode>3_imm_cc"
[(set (reg CC_REGNUM)
- (compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" " 0, d,0, 0")
- (match_operand:GPR 2 "const_int_operand" " K, K,Os,C"))
+ (compare (plus:DSI (match_operand:DSI 1 "nonimmediate_operand" " 0, d,0, 0")
+ (match_operand:DSI 2 "const_int_operand" " K, K,Os,C"))
(const_int 0)))
- (set (match_operand:GPR 0 "nonimmediate_operand" "=d, d,d, S")
- (plus:GPR (match_dup 1) (match_dup 2)))]
+ (set (match_operand:DSI 0 "nonimmediate_operand" "=d, d,d, S")
+ (plus:DSI (match_dup 1) (match_dup 2)))]
"s390_match_ccmode (insn, CCAmode)
&& (CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'K', \"K\")
|| (CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'O', \"Os\")
- /* Avoid INT32_MIN on 32 bit. */
- && (!TARGET_ZARCH || INTVAL (operands[2]) != -0x7fffffff - 1)))"
+ && INTVAL (operands[2]) != -0x7fffffff - 1))"
"@
a<g>hi\t%0,%h2
a<g>hik\t%0,%1,%h2
[(parallel
[(set (reg:CCO CC_REGNUM)
(compare:CCO (plus:<DBL>
- (sign_extend:<DBL> (match_operand:GPR 1 "nonimmediate_operand"))
+ (sign_extend:<DBL> (match_operand:DSI 1 "nonimmediate_operand"))
(match_dup 4))
- (sign_extend:<DBL> (plus:GPR (match_dup 1)
- (match_operand:GPR 2 "general_operand")))))
- (set (match_operand:GPR 0 "nonimmediate_operand")
- (plus:GPR (match_dup 1) (match_dup 2)))])
+ (sign_extend:<DBL> (plus:DSI (match_dup 1)
+ (match_operand:DSI 2 "general_operand")))))
+ (set (match_operand:DSI 0 "nonimmediate_operand")
+ (plus:DSI (match_dup 1) (match_dup 2)))])
(set (pc)
(if_then_else (ne (reg:CCO CC_REGNUM) (const_int 0))
(label_ref (match_operand 3))
{
if (CONSTANT_P (operands[2])
&& !addv_const_operand (operands[2], GET_MODE (operands[2])))
- operands[2] = force_reg (<GPR:MODE>mode, operands[2]);
+ operands[2] = force_reg (<DSI:MODE>mode, operands[2]);
if (GET_MODE (operands[2]) != VOIDmode)
operands[4] = gen_rtx_SIGN_EXTEND (<DBL>mode, operands[2]);
else
/* This is what CSE does when propagating a constant into the pattern. */
- operands[4] = simplify_unary_operation (SIGN_EXTEND, <GPR:DBL>mode, operands[2], <GPR:MODE>mode);
+ operands[4] = simplify_unary_operation (SIGN_EXTEND, <DSI:DBL>mode, operands[2], <DSI:MODE>mode);
})
; ark, agrk, ar, ahi, ahik, aghik, a, ay, agr, aghi, ag, asi, agsi
(define_insn "*addv<mode>3_ccoverflow"
[(set (reg CC_REGNUM)
(compare (plus:<DBL>
- (sign_extend:<DBL> (match_operand:GPR 1 "nonimmediate_operand" "%0,d,0,d,0,0,0"))
- (sign_extend:<DBL> (match_operand:GPR 2 "general_operand" " d,d,K,K,R,T,C")))
- (sign_extend:<DBL> (plus:GPR (match_dup 1) (match_dup 2)))))
- (set (match_operand:GPR 0 "nonimmediate_operand" "=d,d,d,d,d,d,S")
- (plus:GPR (match_dup 1) (match_dup 2)))]
+ (sign_extend:<DBL> (match_operand:DSI 1 "nonimmediate_operand" "%0,d,0,d,0,0,0"))
+ (sign_extend:<DBL> (match_operand:DSI 2 "general_operand" " d,d,K,K,R,T,C")))
+ (sign_extend:<DBL> (plus:DSI (match_dup 1) (match_dup 2)))))
+ (set (match_operand:DSI 0 "nonimmediate_operand" "=d,d,d,d,d,d,S")
+ (plus:DSI (match_dup 1) (match_dup 2)))]
"s390_match_ccmode (insn, CCOmode)"
"@
a<g>r\t%0,%2
(define_insn "*addv<mode>3_ccoverflow_const"
[(set (reg CC_REGNUM)
(compare (plus:<DBL>
- (sign_extend:<DBL> (match_operand:GPR 1 "nonimmediate_operand" "%0,d,0"))
+ (sign_extend:<DBL> (match_operand:DSI 1 "nonimmediate_operand" "%0,d,0"))
(match_operand:<DBL> 2 "addv_const_operand" "K,K,C"))
- (sign_extend:<DBL> (plus:GPR (match_dup 1) (match_dup 2)))))
- (set (match_operand:GPR 0 "nonimmediate_operand" "=d,d,S")
- (plus:GPR (match_dup 1) (match_dup 2)))]
+ (sign_extend:<DBL> (plus:DSI (match_dup 1) (match_dup 2)))))
+ (set (match_operand:DSI 0 "nonimmediate_operand" "=d,d,S")
+ (plus:DSI (match_dup 1) (match_dup 2)))]
"s390_match_ccmode (insn, CCOmode)"
"@
a<g>hi\t%0,%h2
[(set (match_operand:DI 0 "register_operand" "")
(plus:DI (match_operand:DI 1 "register_operand" "")
(match_operand:DI 2 "nonmemory_operand" "")))]
- "TARGET_64BIT"
+ ""
{
if (GET_CODE (operands[2]) == CONST_INT)
{
}
})
-; For 31 bit we have to prevent the generated pattern from matching
-; normal ADDs since la only does a 31 bit add. This is supposed to
-; match "force_la_31".
-(define_expand "addptrsi3"
- [(parallel
- [(set (match_operand:SI 0 "register_operand" "")
- (plus:SI (match_operand:SI 1 "register_operand" "")
- (match_operand:SI 2 "nonmemory_operand" "")))
- (use (const_int 0))])]
- "!TARGET_64BIT"
-{
- if (GET_CODE (operands[2]) == CONST_INT)
- {
- HOST_WIDE_INT c = INTVAL (operands[2]);
-
- if (!CONST_OK_FOR_CONSTRAINT_P (c, 'K', "K")
- && !CONST_OK_FOR_CONSTRAINT_P (c, 'O', "Os"))
- {
- operands[2] = force_const_mem (SImode, operands[2]);
- operands[2] = force_reg (SImode, operands[2]);
- }
- else if (!DISP_IN_RANGE (INTVAL (operands[2])))
- operands[2] = force_reg (SImode, operands[2]);
- }
-})
-
;;
;;- Subtract instructions.
;;
(minus:TI (match_operand:TI 1 "register_operand" "")
(match_operand:TI 2 "general_operand" "") ) )
(clobber (reg:CC CC_REGNUM))])]
- "TARGET_ZARCH"
+ ""
{
/* For z13 we have vsq which doesn't set CC. */
if (TARGET_VX)
(minus:TI (match_operand:TI 1 "register_operand" "0")
(match_operand:TI 2 "general_operand" "do") ) )
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
"#"
"&& reload_completed"
[(parallel
(minus:DI (match_operand:DI 1 "register_operand" "0,0")
(sign_extend:DI (match_operand:SI 2 "general_operand" "d,T"))))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
"@
sgfr\t%0,%2
sgf\t%0,%2"
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=d,d")
(minus:DI (match_dup 1) (zero_extend:DI (match_dup 2))))]
- "s390_match_ccmode (insn, CCLmode) && TARGET_ZARCH"
+ "s390_match_ccmode (insn, CCLmode)"
"@
slgfr\t%0,%2
slgf\t%0,%2"
(zero_extend:DI (match_operand:SI 2 "general_operand" "d,T")))
(const_int 0)))
(clobber (match_scratch:DI 0 "=d,d"))]
- "s390_match_ccmode (insn, CCLmode) && TARGET_ZARCH"
+ "s390_match_ccmode (insn, CCLmode)"
"@
slgfr\t%0,%2
slgf\t%0,%2"
(minus:DI (match_operand:DI 1 "register_operand" "0,0")
(zero_extend:DI (match_operand:SI 2 "general_operand" "d,T"))))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
"@
slgfr\t%0,%2
slgf\t%0,%2"
[(set_attr "op_type" "RRE,RXY")
(set_attr "z10prop" "z10_super_c_E1,z10_super_E1")])
-(define_insn_and_split "*subdi3_31z"
- [(set (match_operand:DI 0 "register_operand" "=&d")
- (minus:DI (match_operand:DI 1 "register_operand" "0")
- (match_operand:DI 2 "general_operand" "do") ) )
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH"
- "#"
- "&& reload_completed"
- [(parallel
- [(set (reg:CCL2 CC_REGNUM)
- (compare:CCL2 (minus:SI (match_dup 7) (match_dup 8))
- (match_dup 7)))
- (set (match_dup 6) (minus:SI (match_dup 7) (match_dup 8)))])
- (parallel
- [(set (match_dup 3) (minus:SI (minus:SI (match_dup 4) (match_dup 5))
- (gtu:SI (reg:CCL2 CC_REGNUM) (const_int 0))))
- (clobber (reg:CC CC_REGNUM))])]
- "operands[3] = operand_subword (operands[0], 0, 0, DImode);
- operands[4] = operand_subword (operands[1], 0, 0, DImode);
- operands[5] = operand_subword (operands[2], 0, 0, DImode);
- operands[6] = operand_subword (operands[0], 1, 0, DImode);
- operands[7] = operand_subword (operands[1], 1, 0, DImode);
- operands[8] = operand_subword (operands[2], 1, 0, DImode);")
-
;
; subsi3 instruction pattern(s).
;
; sr, s, sy, sgr, sg, srk, sgrk
(define_insn "*sub<mode>3"
- [(set (match_operand:GPR 0 "register_operand" "=d,d,d,d")
- (minus:GPR (match_operand:GPR 1 "register_operand" "0,d,0,0")
- (match_operand:GPR 2 "general_operand" "d,d,R,T") ) )
+ [(set (match_operand:DSI 0 "register_operand" "=d,d,d,d")
+ (minus:DSI (match_operand:DSI 1 "register_operand" "0,d,0,0")
+ (match_operand:DSI 2 "general_operand" "d,d,R,T") ) )
(clobber (reg:CC CC_REGNUM))]
""
"@
; slr, sl, sly, slgr, slg, slrk, slgrk
(define_insn "sub<mode>3_borrow_cc"
[(set (reg:CCL2 CC_REGNUM)
- (compare:CCL2 (minus:GPR (match_operand:GPR 1 "register_operand" "0,d,0,0")
- (match_operand:GPR 2 "general_operand" "d,d,R,T"))
+ (compare:CCL2 (minus:DSI (match_operand:DSI 1 "register_operand" "0,d,0,0")
+ (match_operand:DSI 2 "general_operand" "d,d,R,T"))
(match_dup 1)))
- (set (match_operand:GPR 0 "register_operand" "=d,d,d,d")
- (minus:GPR (match_dup 1) (match_dup 2)))]
+ (set (match_operand:DSI 0 "register_operand" "=d,d,d,d")
+ (minus:DSI (match_dup 1) (match_dup 2)))]
""
"@
sl<g>r\t%0,%2
; slr, sl, sly, slgr, slg, slrk, slgrk
(define_insn "*sub<mode>3_borrow_cconly"
[(set (reg CC_REGNUM)
- (compare (minus:GPR (match_operand:GPR 1 "register_operand" "0,d,0,0")
- (match_operand:GPR 2 "general_operand" "d,d,R,T"))
+ (compare (minus:DSI (match_operand:DSI 1 "register_operand" "0,d,0,0")
+ (match_operand:DSI 2 "general_operand" "d,d,R,T"))
(match_dup 1)))
- (clobber (match_scratch:GPR 0 "=d,d,d,d"))]
+ (clobber (match_scratch:DSI 0 "=d,d,d,d"))]
"s390_match_ccmode (insn, CCL2mode)"
"@
sl<g>r\t%0,%2
; slr, sl, sly, slgr, slg, slrk, slgrk
(define_insn "*sub<mode>3_cc"
[(set (reg CC_REGNUM)
- (compare (minus:GPR (match_operand:GPR 1 "register_operand" "0,d,0,0")
- (match_operand:GPR 2 "general_operand" "d,d,R,T"))
+ (compare (minus:DSI (match_operand:DSI 1 "register_operand" "0,d,0,0")
+ (match_operand:DSI 2 "general_operand" "d,d,R,T"))
(const_int 0)))
- (set (match_operand:GPR 0 "register_operand" "=d,d,d,d")
- (minus:GPR (match_dup 1) (match_dup 2)))]
+ (set (match_operand:DSI 0 "register_operand" "=d,d,d,d")
+ (minus:DSI (match_dup 1) (match_dup 2)))]
"s390_match_ccmode (insn, CCLmode)"
"@
sl<g>r\t%0,%2
; slr, sl, sly, slgr, slg, slrk, slgrk
(define_insn "*sub<mode>3_cc2"
[(set (reg CC_REGNUM)
- (compare (match_operand:GPR 1 "register_operand" "0,d,0,0")
- (match_operand:GPR 2 "general_operand" "d,d,R,T")))
- (set (match_operand:GPR 0 "register_operand" "=d,d,d,d")
- (minus:GPR (match_dup 1) (match_dup 2)))]
+ (compare (match_operand:DSI 1 "register_operand" "0,d,0,0")
+ (match_operand:DSI 2 "general_operand" "d,d,R,T")))
+ (set (match_operand:DSI 0 "register_operand" "=d,d,d,d")
+ (minus:DSI (match_dup 1) (match_dup 2)))]
"s390_match_ccmode (insn, CCL3mode)"
"@
sl<g>r\t%0,%2
; slr, sl, sly, slgr, slg, slrk, slgrk
(define_insn "*sub<mode>3_cconly"
[(set (reg CC_REGNUM)
- (compare (minus:GPR (match_operand:GPR 1 "register_operand" "0,d,0,0")
- (match_operand:GPR 2 "general_operand" "d,d,R,T"))
+ (compare (minus:DSI (match_operand:DSI 1 "register_operand" "0,d,0,0")
+ (match_operand:DSI 2 "general_operand" "d,d,R,T"))
(const_int 0)))
- (clobber (match_scratch:GPR 0 "=d,d,d,d"))]
+ (clobber (match_scratch:DSI 0 "=d,d,d,d"))]
"s390_match_ccmode (insn, CCLmode)"
"@
sl<g>r\t%0,%2
; slr, sl, sly, slgr, slg, slrk, slgrk
(define_insn "*sub<mode>3_cconly2"
[(set (reg CC_REGNUM)
- (compare (match_operand:GPR 1 "register_operand" "0,d,0,0")
- (match_operand:GPR 2 "general_operand" "d,d,R,T")))
- (clobber (match_scratch:GPR 0 "=d,d,d,d"))]
+ (compare (match_operand:DSI 1 "register_operand" "0,d,0,0")
+ (match_operand:DSI 2 "general_operand" "d,d,R,T")))
+ (clobber (match_scratch:DSI 0 "=d,d,d,d"))]
"s390_match_ccmode (insn, CCL3mode)"
"@
sl<g>r\t%0,%2
[(parallel
[(set (reg:CCO CC_REGNUM)
(compare:CCO (minus:<DBL>
- (sign_extend:<DBL> (match_operand:GPR 1 "nonimmediate_operand"))
- (sign_extend:<DBL> (match_operand:GPR 2 "nonimmediate_operand")))
- (sign_extend:<DBL> (minus:GPR (match_dup 1) (match_dup 2)))))
- (set (match_operand:GPR 0 "nonimmediate_operand")
- (minus:GPR (match_dup 1) (match_dup 2)))])
+ (sign_extend:<DBL> (match_operand:DSI 1 "nonimmediate_operand"))
+ (sign_extend:<DBL> (match_operand:DSI 2 "nonimmediate_operand")))
+ (sign_extend:<DBL> (minus:DSI (match_dup 1) (match_dup 2)))))
+ (set (match_operand:DSI 0 "nonimmediate_operand")
+ (minus:DSI (match_dup 1) (match_dup 2)))])
(set (pc)
(if_then_else (ne (reg:CCO CC_REGNUM) (const_int 0))
(label_ref (match_operand 3))
(define_insn "*subv<mode>3_ccoverflow"
[(set (reg CC_REGNUM)
(compare (minus:<DBL>
- (sign_extend:<DBL> (match_operand:GPR 1 "nonimmediate_operand" "0,d,0,0"))
- (sign_extend:<DBL> (match_operand:GPR 2 "nonimmediate_operand" "d,d,R,T")))
- (sign_extend:<DBL> (minus:GPR (match_dup 1) (match_dup 2)))))
- (set (match_operand:GPR 0 "register_operand" "=d,d,d,d")
- (minus:GPR (match_dup 1) (match_dup 2)))]
+ (sign_extend:<DBL> (match_operand:DSI 1 "nonimmediate_operand" "0,d,0,0"))
+ (sign_extend:<DBL> (match_operand:DSI 2 "nonimmediate_operand" "d,d,R,T")))
+ (sign_extend:<DBL> (minus:DSI (match_dup 1) (match_dup 2)))))
+ (set (match_operand:DSI 0 "register_operand" "=d,d,d,d")
+ (minus:DSI (match_dup 1) (match_dup 2)))]
"s390_match_ccmode (insn, CCOmode)"
"@
s<g>r\t%0,%2
;
(define_expand "uaddc<mode>5"
- [(match_operand:GPR 0 "register_operand")
- (match_operand:GPR 1 "nonimmediate_operand")
- (match_operand:GPR 2 "nonimmediate_operand")
- (match_operand:GPR 3 "nonimmediate_operand")
- (match_operand:GPR 4 "general_operand")]
+ [(match_operand:DSI 0 "register_operand")
+ (match_operand:DSI 1 "nonimmediate_operand")
+ (match_operand:DSI 2 "nonimmediate_operand")
+ (match_operand:DSI 3 "nonimmediate_operand")
+ (match_operand:DSI 4 "general_operand")]
"TARGET_Z196"
{
if (operands[4] == const0_rtx)
(define_insn "add<mode>3_alc_carry1_cc"
[(set (reg:CCL1 CC_REGNUM)
(compare:CCL1
- (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "")
- (match_operand:GPR 1 "nonimmediate_operand" "%0,0"))
- (match_operand:GPR 2 "general_operand" "d,T"))
+ (plus:DSI (plus:DSI (match_operand:DSI 3 "s390_alc_comparison" "")
+ (match_operand:DSI 1 "nonimmediate_operand" "%0,0"))
+ (match_operand:DSI 2 "general_operand" "d,T"))
(match_dup 1)))
- (set (match_operand:GPR 0 "register_operand" "=d,d")
- (plus:GPR (plus:GPR (match_dup 3) (match_dup 1)) (match_dup 2)))]
+ (set (match_operand:DSI 0 "register_operand" "=d,d")
+ (plus:DSI (plus:DSI (match_dup 3) (match_dup 1)) (match_dup 2)))]
""
"@
alc<g>r\t%0,%2
(define_insn "*add<mode>3_alc_carry1_cconly"
[(set (reg CC_REGNUM)
(compare
- (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "")
- (match_operand:GPR 1 "nonimmediate_operand" "%0,0"))
- (match_operand:GPR 2 "general_operand" "d,T"))
+ (plus:DSI (plus:DSI (match_operand:DSI 3 "s390_alc_comparison" "")
+ (match_operand:DSI 1 "nonimmediate_operand" "%0,0"))
+ (match_operand:DSI 2 "general_operand" "d,T"))
(match_dup 1)))
- (clobber (match_scratch:GPR 0 "=d,d"))]
+ (clobber (match_scratch:DSI 0 "=d,d"))]
"s390_match_ccmode (insn, CCL1mode)"
"@
alc<g>r\t%0,%2
(define_insn "*add<mode>3_alc_carry2_cc"
[(set (reg CC_REGNUM)
(compare
- (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "")
- (match_operand:GPR 1 "nonimmediate_operand" "%0,0"))
- (match_operand:GPR 2 "general_operand" "d,T"))
+ (plus:DSI (plus:DSI (match_operand:DSI 3 "s390_alc_comparison" "")
+ (match_operand:DSI 1 "nonimmediate_operand" "%0,0"))
+ (match_operand:DSI 2 "general_operand" "d,T"))
(match_dup 2)))
- (set (match_operand:GPR 0 "register_operand" "=d,d")
- (plus:GPR (plus:GPR (match_dup 3) (match_dup 1)) (match_dup 2)))]
+ (set (match_operand:DSI 0 "register_operand" "=d,d")
+ (plus:DSI (plus:DSI (match_dup 3) (match_dup 1)) (match_dup 2)))]
"s390_match_ccmode (insn, CCL1mode)"
"@
alc<g>r\t%0,%2
(define_insn "*add<mode>3_alc_carry2_cconly"
[(set (reg CC_REGNUM)
(compare
- (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "")
- (match_operand:GPR 1 "nonimmediate_operand" "%0,0"))
- (match_operand:GPR 2 "general_operand" "d,T"))
+ (plus:DSI (plus:DSI (match_operand:DSI 3 "s390_alc_comparison" "")
+ (match_operand:DSI 1 "nonimmediate_operand" "%0,0"))
+ (match_operand:DSI 2 "general_operand" "d,T"))
(match_dup 2)))
- (clobber (match_scratch:GPR 0 "=d,d"))]
+ (clobber (match_scratch:DSI 0 "=d,d"))]
"s390_match_ccmode (insn, CCL1mode)"
"@
alc<g>r\t%0,%2
(define_insn "*add<mode>3_alc_cc"
[(set (reg CC_REGNUM)
(compare
- (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "")
- (match_operand:GPR 1 "nonimmediate_operand" "%0,0"))
- (match_operand:GPR 2 "general_operand" "d,T"))
+ (plus:DSI (plus:DSI (match_operand:DSI 3 "s390_alc_comparison" "")
+ (match_operand:DSI 1 "nonimmediate_operand" "%0,0"))
+ (match_operand:DSI 2 "general_operand" "d,T"))
(const_int 0)))
- (set (match_operand:GPR 0 "register_operand" "=d,d")
- (plus:GPR (plus:GPR (match_dup 3) (match_dup 1)) (match_dup 2)))]
+ (set (match_operand:DSI 0 "register_operand" "=d,d")
+ (plus:DSI (plus:DSI (match_dup 3) (match_dup 1)) (match_dup 2)))]
"s390_match_ccmode (insn, CCLmode)"
"@
alc<g>r\t%0,%2
; alcr, alc, alcgr, alcg
(define_insn "*add<mode>3_alc"
- [(set (match_operand:GPR 0 "register_operand" "=d,d")
- (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "")
- (match_operand:GPR 1 "nonimmediate_operand" "%0,0"))
- (match_operand:GPR 2 "general_operand" "d,T")))
+ [(set (match_operand:DSI 0 "register_operand" "=d,d")
+ (plus:DSI (plus:DSI (match_operand:DSI 3 "s390_alc_comparison" "")
+ (match_operand:DSI 1 "nonimmediate_operand" "%0,0"))
+ (match_operand:DSI 2 "general_operand" "d,T")))
(clobber (reg:CC CC_REGNUM))]
""
"@
[(set_attr "op_type" "RRE,RXY")])
(define_expand "usubc<mode>5"
- [(match_operand:GPR 0 "register_operand")
- (match_operand:GPR 1 "nonimmediate_operand")
- (match_operand:GPR 2 "nonimmediate_operand")
- (match_operand:GPR 3 "nonimmediate_operand")
- (match_operand:GPR 4 "general_operand")]
+ [(match_operand:DSI 0 "register_operand")
+ (match_operand:DSI 1 "nonimmediate_operand")
+ (match_operand:DSI 2 "nonimmediate_operand")
+ (match_operand:DSI 3 "nonimmediate_operand")
+ (match_operand:DSI 4 "general_operand")]
"TARGET_Z196"
{
if (operands[4] == const0_rtx)
(define_insn "*sub<mode>3_slb_cc"
[(set (reg CC_REGNUM)
(compare
- (minus:GPR (minus:GPR (match_operand:GPR 1 "nonimmediate_operand" "0,0")
- (match_operand:GPR 2 "general_operand" "d,T"))
- (match_operand:GPR 3 "s390_slb_comparison" ""))
+ (minus:DSI (minus:DSI (match_operand:DSI 1 "nonimmediate_operand" "0,0")
+ (match_operand:DSI 2 "general_operand" "d,T"))
+ (match_operand:DSI 3 "s390_slb_comparison" ""))
(const_int 0)))
- (set (match_operand:GPR 0 "register_operand" "=d,d")
- (minus:GPR (minus:GPR (match_dup 1) (match_dup 2)) (match_dup 3)))]
+ (set (match_operand:DSI 0 "register_operand" "=d,d")
+ (minus:DSI (minus:DSI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"s390_match_ccmode (insn, CCLmode)"
"@
slb<g>r\t%0,%2
; slbr, slb, slbgr, slbg
(define_insn "*sub<mode>3_slb"
- [(set (match_operand:GPR 0 "register_operand" "=d,d")
- (minus:GPR (minus:GPR (match_operand:GPR 1 "nonimmediate_operand" "0,0")
- (match_operand:GPR 2 "general_operand" "d,T"))
- (match_operand:GPR 3 "s390_slb_comparison" "")))
+ [(set (match_operand:DSI 0 "register_operand" "=d,d")
+ (minus:DSI (minus:DSI (match_operand:DSI 1 "nonimmediate_operand" "0,0")
+ (match_operand:DSI 2 "general_operand" "d,T"))
+ (match_operand:DSI 3 "s390_slb_comparison" "")))
(clobber (reg:CC CC_REGNUM))]
""
"@
(define_insn "sub<mode>3_slb_borrow1_cc"
[(set (reg:CCL2 CC_REGNUM)
(compare:CCL2
- (minus:GPR (minus:GPR (match_operand:GPR 1 "nonimmediate_operand" "0,0")
- (match_operand:GPR 2 "general_operand" "d,T"))
- (match_operand:GPR 3 "s390_slb_comparison" ""))
+ (minus:DSI (minus:DSI (match_operand:DSI 1 "nonimmediate_operand" "0,0")
+ (match_operand:DSI 2 "general_operand" "d,T"))
+ (match_operand:DSI 3 "s390_slb_comparison" ""))
(match_dup 1)))
- (set (match_operand:GPR 0 "register_operand" "=d,d")
- (minus:GPR (minus:GPR (match_dup 1) (match_dup 2)) (match_dup 3)))]
+ (set (match_operand:DSI 0 "register_operand" "=d,d")
+ (minus:DSI (minus:DSI (match_dup 1) (match_dup 2)) (match_dup 3)))]
""
"@
slb<g>r\t%0,%2
(set_attr "z10prop" "z10_c,*")])
(define_expand "add<mode>cc"
- [(match_operand:GPR 0 "register_operand" "")
+ [(match_operand:DSI 0 "register_operand" "")
(match_operand 1 "comparison_operator" "")
- (match_operand:GPR 2 "register_operand" "")
- (match_operand:GPR 3 "const_int_operand" "")]
+ (match_operand:DSI 2 "register_operand" "")
+ (match_operand:DSI 3 "const_int_operand" "")]
""
"if (!s390_expand_addcc (GET_CODE (operands[1]),
XEXP (operands[1], 0), XEXP (operands[1], 1),
;
(define_insn_and_split "*scond<mode>"
- [(set (match_operand:GPR 0 "register_operand" "=&d")
- (match_operand:GPR 1 "s390_alc_comparison" ""))
+ [(set (match_operand:DSI 0 "register_operand" "=&d")
+ (match_operand:DSI 1 "s390_alc_comparison" ""))
(clobber (reg:CC CC_REGNUM))]
""
"#"
"&& reload_completed"
[(set (match_dup 0) (const_int 0))
(parallel
- [(set (match_dup 0) (plus:GPR (plus:GPR (match_dup 1) (match_dup 0))
+ [(set (match_dup 0) (plus:DSI (plus:DSI (match_dup 1) (match_dup 0))
(match_dup 0)))
(clobber (reg:CC CC_REGNUM))])]
"")
(define_insn_and_split "*scond<mode>_neg"
- [(set (match_operand:GPR 0 "register_operand" "=&d")
- (match_operand:GPR 1 "s390_slb_comparison" ""))
+ [(set (match_operand:DSI 0 "register_operand" "=&d")
+ (match_operand:DSI 1 "s390_slb_comparison" ""))
(clobber (reg:CC CC_REGNUM))]
""
"#"
"&& reload_completed"
[(set (match_dup 0) (const_int 0))
(parallel
- [(set (match_dup 0) (minus:GPR (minus:GPR (match_dup 0) (match_dup 0))
+ [(set (match_dup 0) (minus:DSI (minus:DSI (match_dup 0) (match_dup 0))
(match_dup 1)))
(clobber (reg:CC CC_REGNUM))])
(parallel
- [(set (match_dup 0) (neg:GPR (match_dup 0)))
+ [(set (match_dup 0) (neg:DSI (match_dup 0)))
(clobber (reg:CC CC_REGNUM))])]
"")
(define_expand "cstore<mode>4"
[(set (match_operand:SI 0 "register_operand" "")
(match_operator:SI 1 "s390_scond_operator"
- [(match_operand:GPR 2 "register_operand" "")
- (match_operand:GPR 3 "general_operand" "")]))]
+ [(match_operand:DSI 2 "register_operand" "")
+ (match_operand:DSI 3 "general_operand" "")]))]
""
"if (!s390_expand_addcc (GET_CODE (operands[1]), operands[2], operands[3],
operands[0], const0_rtx, const1_rtx)) FAIL; DONE;")
; Such patterns get directly emitted by noce_emit_store_flag.
(define_insn_and_split "*cstorecc<mode>_z13"
- [(set (match_operand:GPR 0 "register_operand" "=&d")
- (match_operator:GPR 1 "s390_comparison"
+ [(set (match_operand:DSI 0 "register_operand" "=&d")
+ (match_operator:DSI 1 "s390_comparison"
[(match_operand 2 "cc_reg_operand" "c")
(match_operand 3 "const_int_operand" "")]))]
"TARGET_Z13"
"reload_completed"
[(set (match_dup 0) (const_int 0))
(set (match_dup 0)
- (if_then_else:GPR
+ (if_then_else:DSI
(match_op_dup 1 [(match_dup 2) (match_dup 3)])
(const_int 1)
(match_dup 0)))])
;;
(define_expand "mov<mode>cc"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "")
- (if_then_else:GPR (match_operand 1 "comparison_operator" "")
- (match_operand:GPR 2 "loc_operand" "")
- (match_operand:GPR 3 "loc_operand" "")))]
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "")
+ (if_then_else:DSI (match_operand 1 "comparison_operator" "")
+ (match_operand:DSI 2 "loc_operand" "")
+ (match_operand:DSI 3 "loc_operand" "")))]
"TARGET_Z196"
{
if (!TARGET_Z13 && CONSTANT_P (operands[2]))
; locr, loc, stoc, locgr, locg, stocg, lochi, locghi, selr, selgr
(define_insn "*mov<mode>cc"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "=d,d,d,d,d,d,d,S,S")
- (if_then_else:GPR
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d,d,d,d,d,d,d,S,S")
+ (if_then_else:DSI
(match_operator 1 "s390_comparison"
[(match_operand 2 "cc_reg_operand" " c,c,c,c,c,c,c,c,c")
(match_operand 5 "const_int_operand" "")])
- (match_operand:GPR 3 "loc_operand" " d,0,d,S,0,K,0,d,0")
- (match_operand:GPR 4 "loc_operand" " 0,d,d,0,S,0,K,0,d")))]
+ (match_operand:DSI 3 "loc_operand" " d,0,d,S,0,K,0,d,0")
+ (match_operand:DSI 4 "loc_operand" " 0,d,d,0,S,0,K,0,d")))]
"TARGET_Z196"
"@
loc<g>r%C1\t%0,%3
(mult:DI (match_operand:DI 1 "nonimmediate_operand")
(match_operand:DI 2 "general_operand")))
(clobber (reg:CC CC_REGNUM))])]
- "TARGET_ZARCH")
+ "")
(define_insn "*muldi3_sign"
[(set (match_operand:DI 0 "register_operand" "=d,d")
(mult:DI (sign_extend:DI (match_operand:SI 2 "general_operand" "d,T"))
(match_operand:DI 1 "register_operand" "0,0")))]
- "TARGET_ZARCH"
+ ""
"@
msgfr\t%0,%2
msgf\t%0,%2"
(mult:DI (match_operand:DI 1 "nonimmediate_operand" "%0,d,0,0,0")
(match_operand:DI 2 "general_operand" "d,d,K,T,Os")))
(clobber (match_scratch:CC 3 "=X,c,X,X,X"))]
- "TARGET_ZARCH"
+ ""
"@
msgr\t%0,%2
msgrkc\t%0,%1,%2
; mulsidi3 instruction pattern(s).
;
-(define_insn "mulsidi3"
- [(set (match_operand:DI 0 "register_operand" "=d,d,d")
- (mult:DI (sign_extend:DI
- (match_operand:SI 1 "register_operand" "%0,0,0"))
- (sign_extend:DI
- (match_operand:SI 2 "nonimmediate_operand" "d,R,T"))))]
- "!TARGET_ZARCH"
- "@
- mr\t%0,%2
- m\t%0,%2
- mfy\t%0,%2"
- [(set_attr "op_type" "RR,RX,RXY")
- (set_attr "type" "imulsi")
- (set_attr "cpu_facility" "*,*,z10")])
-
; Jump to label OP3 if OP1 * OP2 results in a signed overflow
(define_expand "mulv<mode>4"
[(parallel
[(set (reg:CCO CC_REGNUM)
(compare:CCO (mult:<DBL>
- (sign_extend:<DBL> (match_operand:GPR 1 "register_operand"))
- (sign_extend:<DBL> (match_operand:GPR 2 "nonimmediate_operand")))
- (sign_extend:<DBL> (mult:GPR (match_dup 1) (match_dup 2)))))
- (set (match_operand:GPR 0 "register_operand")
- (mult:GPR (match_dup 1) (match_dup 2)))])
+ (sign_extend:<DBL> (match_operand:DSI 1 "register_operand"))
+ (sign_extend:<DBL> (match_operand:DSI 2 "nonimmediate_operand")))
+ (sign_extend:<DBL> (mult:DSI (match_dup 1) (match_dup 2)))))
+ (set (match_operand:DSI 0 "register_operand")
+ (mult:DSI (match_dup 1) (match_dup 2)))])
(set (pc)
(if_then_else (ne (reg:CCO CC_REGNUM) (const_int 0))
(label_ref (match_operand 3))
(define_insn "*mulv<mode>3_ccoverflow"
[(set (reg CC_REGNUM)
(compare (mult:<DBL>
- (sign_extend:<DBL> (match_operand:GPR 1 "register_operand" "%d,0"))
- (sign_extend:<DBL> (match_operand:GPR 2 "nonimmediate_operand" " d,T")))
- (sign_extend:<DBL> (mult:GPR (match_dup 1) (match_dup 2)))))
- (set (match_operand:GPR 0 "register_operand" "=d,d")
- (mult:GPR (match_dup 1) (match_dup 2)))]
+ (sign_extend:<DBL> (match_operand:DSI 1 "register_operand" "%d,0"))
+ (sign_extend:<DBL> (match_operand:DSI 2 "nonimmediate_operand" " d,T")))
+ (sign_extend:<DBL> (mult:DSI (match_dup 1) (match_dup 2)))))
+ (set (match_operand:DSI 0 "register_operand" "=d,d")
+ (mult:DSI (match_dup 1) (match_dup 2)))]
"s390_match_ccmode (insn, CCOmode) && TARGET_Z14"
"@
ms<g>rkc\t%0,%1,%2
;
; mlr, ml, mlgr, mlg
-(define_insn "umul<dwh><mode>3"
- [(set (match_operand:DW 0 "register_operand" "=d,d")
- (mult:DW (zero_extend:DW
- (match_operand:<DWH> 1 "register_operand" "%0,0"))
- (zero_extend:DW
- (match_operand:<DWH> 2 "nonimmediate_operand" " d,T"))))]
+(define_insn "umulditi3"
+ [(set (match_operand:TI 0 "register_operand" "=d,d")
+ (mult:TI (zero_extend:TI
+ (match_operand:DI 1 "register_operand" "%0,0"))
+ (zero_extend:TI
+ (match_operand:DI 2 "nonimmediate_operand" " d,T"))))]
""
"@
- ml<tg>r\t%0,%2
- ml<tg>\t%0,%2"
+ mlgr\t%0,%2
+ mlg\t%0,%2"
[(set_attr "op_type" "RRE,RXY")
- (set_attr "type" "imul<dwh>")])
+ (set_attr "type" "imuldi")])
;
; mul(tf|df|sf|td|dd)3 instruction pattern(s).
(set (match_operand:DI 3 "general_operand" "")
(mod:DI (match_dup 1) (match_dup 2)))])
(clobber (match_dup 4))]
- "TARGET_ZARCH"
+ ""
{
rtx div_equal, mod_equal;
rtx_insn *insn;
(match_operand:DI 2 "general_operand" "d,T")))
(const_int 64))
(zero_extend:TI (div:DI (match_dup 1) (match_dup 2)))))]
- "TARGET_ZARCH"
+ ""
"@
dsgr\t%0,%2
dsg\t%0,%2"
(sign_extend:DI
(match_operand:SI 2 "nonimmediate_operand" "d,T"))))
(const_int 64))
- (zero_extend:TI
- (div:DI (match_dup 1) (sign_extend:DI (match_dup 2))))))]
- "TARGET_ZARCH"
- "@
- dsgfr\t%0,%2
- dsgf\t%0,%2"
- [(set_attr "op_type" "RRE,RXY")
- (set_attr "type" "idiv")])
-
-;
-; udivmoddi4 instruction pattern(s).
-;
-
-(define_expand "udivmoddi4"
- [(parallel [(set (match_operand:DI 0 "general_operand" "")
- (udiv:DI (match_operand:DI 1 "general_operand" "")
- (match_operand:DI 2 "nonimmediate_operand" "")))
- (set (match_operand:DI 3 "general_operand" "")
- (umod:DI (match_dup 1) (match_dup 2)))])
- (clobber (match_dup 4))]
- "TARGET_ZARCH"
-{
- rtx div_equal, mod_equal, equal;
- rtx_insn *insn;
-
- div_equal = gen_rtx_UDIV (DImode, operands[1], operands[2]);
- mod_equal = gen_rtx_UMOD (DImode, operands[1], operands[2]);
- equal = gen_rtx_IOR (TImode,
- gen_rtx_ASHIFT (TImode,
- gen_rtx_ZERO_EXTEND (TImode, mod_equal),
- GEN_INT (64)),
- gen_rtx_ZERO_EXTEND (TImode, div_equal));
-
- operands[4] = gen_reg_rtx(TImode);
- emit_clobber (operands[4]);
- emit_move_insn (gen_lowpart (DImode, operands[4]), operands[1]);
- emit_move_insn (gen_highpart (DImode, operands[4]), const0_rtx);
-
- insn = emit_insn (gen_udivmodtidi3 (operands[4], operands[4], operands[2]));
- set_unique_reg_note (insn, REG_EQUAL, equal);
-
- insn = emit_move_insn (operands[0], gen_lowpart (DImode, operands[4]));
- set_unique_reg_note (insn, REG_EQUAL, div_equal);
-
- insn = emit_move_insn (operands[3], gen_highpart (DImode, operands[4]));
- set_unique_reg_note (insn, REG_EQUAL, mod_equal);
-
- DONE;
-})
-
-(define_insn "udivmodtidi3"
- [(set (match_operand:TI 0 "register_operand" "=d,d")
- (ior:TI
- (ashift:TI
- (zero_extend:TI
- (truncate:DI
- (umod:TI (match_operand:TI 1 "register_operand" "0,0")
- (zero_extend:TI
- (match_operand:DI 2 "nonimmediate_operand" "d,T")))))
- (const_int 64))
- (zero_extend:TI
- (truncate:DI
- (udiv:TI (match_dup 1) (zero_extend:TI (match_dup 2)))))))]
- "TARGET_ZARCH"
- "@
- dlgr\t%0,%2
- dlg\t%0,%2"
- [(set_attr "op_type" "RRE,RXY")
- (set_attr "type" "idiv")])
-
-;
-; divmodsi4 instruction pattern(s).
-;
-
-(define_expand "divmodsi4"
- [(parallel [(set (match_operand:SI 0 "general_operand" "")
- (div:SI (match_operand:SI 1 "general_operand" "")
- (match_operand:SI 2 "nonimmediate_operand" "")))
- (set (match_operand:SI 3 "general_operand" "")
- (mod:SI (match_dup 1) (match_dup 2)))])
- (clobber (match_dup 4))]
- "!TARGET_ZARCH"
-{
- rtx div_equal, mod_equal, equal;
- rtx_insn *insn;
-
- div_equal = gen_rtx_DIV (SImode, operands[1], operands[2]);
- mod_equal = gen_rtx_MOD (SImode, operands[1], operands[2]);
- equal = gen_rtx_IOR (DImode,
- gen_rtx_ASHIFT (DImode,
- gen_rtx_ZERO_EXTEND (DImode, mod_equal),
- GEN_INT (32)),
- gen_rtx_ZERO_EXTEND (DImode, div_equal));
-
- operands[4] = gen_reg_rtx(DImode);
- emit_insn (gen_extendsidi2 (operands[4], operands[1]));
-
- insn = emit_insn (gen_divmoddisi3 (operands[4], operands[4], operands[2]));
- set_unique_reg_note (insn, REG_EQUAL, equal);
-
- insn = emit_move_insn (operands[0], gen_lowpart (SImode, operands[4]));
- set_unique_reg_note (insn, REG_EQUAL, div_equal);
-
- insn = emit_move_insn (operands[3], gen_highpart (SImode, operands[4]));
- set_unique_reg_note (insn, REG_EQUAL, mod_equal);
-
- DONE;
-})
-
-(define_insn "divmoddisi3"
- [(set (match_operand:DI 0 "register_operand" "=d,d")
- (ior:DI
- (ashift:DI
- (zero_extend:DI
- (truncate:SI
- (mod:DI (match_operand:DI 1 "register_operand" "0,0")
- (sign_extend:DI
- (match_operand:SI 2 "nonimmediate_operand" "d,R")))))
- (const_int 32))
- (zero_extend:DI
- (truncate:SI
- (div:DI (match_dup 1) (sign_extend:DI (match_dup 2)))))))]
- "!TARGET_ZARCH"
- "@
- dr\t%0,%2
- d\t%0,%2"
- [(set_attr "op_type" "RR,RX")
+ (zero_extend:TI
+ (div:DI (match_dup 1) (sign_extend:DI (match_dup 2))))))]
+ ""
+ "@
+ dsgfr\t%0,%2
+ dsgf\t%0,%2"
+ [(set_attr "op_type" "RRE,RXY")
(set_attr "type" "idiv")])
;
-; udivsi3 and umodsi3 instruction pattern(s).
+; udivmoddi4 instruction pattern(s).
;
-(define_expand "udivmodsi4"
- [(parallel [(set (match_operand:SI 0 "general_operand" "")
- (udiv:SI (match_operand:SI 1 "general_operand" "")
- (match_operand:SI 2 "nonimmediate_operand" "")))
- (set (match_operand:SI 3 "general_operand" "")
- (umod:SI (match_dup 1) (match_dup 2)))])
+(define_expand "udivmoddi4"
+ [(parallel [(set (match_operand:DI 0 "general_operand" "")
+ (udiv:DI (match_operand:DI 1 "general_operand" "")
+ (match_operand:DI 2 "nonimmediate_operand" "")))
+ (set (match_operand:DI 3 "general_operand" "")
+ (umod:DI (match_dup 1) (match_dup 2)))])
(clobber (match_dup 4))]
- "!TARGET_ZARCH"
+ ""
{
rtx div_equal, mod_equal, equal;
rtx_insn *insn;
- div_equal = gen_rtx_UDIV (SImode, operands[1], operands[2]);
- mod_equal = gen_rtx_UMOD (SImode, operands[1], operands[2]);
- equal = gen_rtx_IOR (DImode,
- gen_rtx_ASHIFT (DImode,
- gen_rtx_ZERO_EXTEND (DImode, mod_equal),
- GEN_INT (32)),
- gen_rtx_ZERO_EXTEND (DImode, div_equal));
+ div_equal = gen_rtx_UDIV (DImode, operands[1], operands[2]);
+ mod_equal = gen_rtx_UMOD (DImode, operands[1], operands[2]);
+ equal = gen_rtx_IOR (TImode,
+ gen_rtx_ASHIFT (TImode,
+ gen_rtx_ZERO_EXTEND (TImode, mod_equal),
+ GEN_INT (64)),
+ gen_rtx_ZERO_EXTEND (TImode, div_equal));
- operands[4] = gen_reg_rtx(DImode);
+ operands[4] = gen_reg_rtx(TImode);
emit_clobber (operands[4]);
- emit_move_insn (gen_lowpart (SImode, operands[4]), operands[1]);
- emit_move_insn (gen_highpart (SImode, operands[4]), const0_rtx);
+ emit_move_insn (gen_lowpart (DImode, operands[4]), operands[1]);
+ emit_move_insn (gen_highpart (DImode, operands[4]), const0_rtx);
- insn = emit_insn (gen_udivmoddisi3 (operands[4], operands[4], operands[2]));
+ insn = emit_insn (gen_udivmodtidi3 (operands[4], operands[4], operands[2]));
set_unique_reg_note (insn, REG_EQUAL, equal);
- insn = emit_move_insn (operands[0], gen_lowpart (SImode, operands[4]));
+ insn = emit_move_insn (operands[0], gen_lowpart (DImode, operands[4]));
set_unique_reg_note (insn, REG_EQUAL, div_equal);
- insn = emit_move_insn (operands[3], gen_highpart (SImode, operands[4]));
+ insn = emit_move_insn (operands[3], gen_highpart (DImode, operands[4]));
set_unique_reg_note (insn, REG_EQUAL, mod_equal);
DONE;
})
-(define_insn "udivmoddisi3"
- [(set (match_operand:DI 0 "register_operand" "=d,d")
- (ior:DI
- (ashift:DI
- (zero_extend:DI
- (truncate:SI
- (umod:DI (match_operand:DI 1 "register_operand" "0,0")
- (zero_extend:DI
- (match_operand:SI 2 "nonimmediate_operand" "d,T")))))
- (const_int 32))
- (zero_extend:DI
- (truncate:SI
- (udiv:DI (match_dup 1) (zero_extend:DI (match_dup 2)))))))]
- "!TARGET_ZARCH"
- "@
- dlr\t%0,%2
- dl\t%0,%2"
+(define_insn "udivmodtidi3"
+ [(set (match_operand:TI 0 "register_operand" "=d,d")
+ (ior:TI
+ (ashift:TI
+ (zero_extend:TI
+ (truncate:DI
+ (umod:TI (match_operand:TI 1 "register_operand" "0,0")
+ (zero_extend:TI
+ (match_operand:DI 2 "nonimmediate_operand" "d,T")))))
+ (const_int 64))
+ (zero_extend:TI
+ (truncate:DI
+ (udiv:TI (match_dup 1) (zero_extend:TI (match_dup 2)))))))]
+ ""
+ "@
+ dlgr\t%0,%2
+ dlg\t%0,%2"
[(set_attr "op_type" "RRE,RXY")
(set_attr "type" "idiv")])
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=d,d,d, d")
(and:DI (match_dup 1) (match_dup 2)))]
- "TARGET_ZARCH && s390_match_ccmode(insn, CCTmode)"
+ "s390_match_ccmode(insn, CCTmode)"
"@
ngr\t%0,%2
ngrk\t%0,%1,%2
(match_operand:DI 2 "general_operand" " d,d,T,NxxDw"))
(const_int 0)))
(clobber (match_scratch:DI 0 "=d,d,d, d"))]
- "TARGET_ZARCH
- && s390_match_ccmode(insn, CCTmode)
+ "s390_match_ccmode(insn, CCTmode)
/* Do not steal TM patterns. */
&& s390_single_part (operands[2], DImode, HImode, 0) < 0"
"@
(match_operand:DI 2 "general_operand"
"M, M,N0HDF,N1HDF,N2HDF,N3HDF,N0SDF,N1SDF,d,d,T,NxxDw,NxQDF,Q")))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
+ "s390_logical_operator_ok_p (operands)"
"@
#
#
;; These two are what combine generates for (ashift (zero_extract)).
(define_insn "*extzv_<mode>_srl<clobbercc_or_nocc>"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (and:GPR (lshiftrt:GPR
- (match_operand:GPR 1 "register_operand" "d")
- (match_operand:GPR 2 "nonzero_shift_count_operand" ""))
- (match_operand:GPR 3 "contiguous_bitmask_nowrap_operand" "")))]
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (and:DSI (lshiftrt:DSI
+ (match_operand:DSI 1 "register_operand" "d")
+ (match_operand:DSI 2 "nonzero_shift_count_operand" ""))
+ (match_operand:DSI 3 "contiguous_bitmask_nowrap_operand" "")))]
"<z10_or_zEC12_cond>
/* Note that even for the SImode pattern, the rotate is always DImode. */
&& s390_extzv_shift_ok (<bitsize>, -INTVAL (operands[2]),
(set_attr "mnemonic" "<risbg_n>")])
(define_insn "*extzv_<mode>_sll<clobbercc_or_nocc>"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (and:GPR (ashift:GPR
- (match_operand:GPR 1 "register_operand" "d")
- (match_operand:GPR 2 "nonzero_shift_count_operand" ""))
- (match_operand:GPR 3 "contiguous_bitmask_nowrap_operand" "")))]
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (and:DSI (ashift:DSI
+ (match_operand:DSI 1 "register_operand" "d")
+ (match_operand:DSI 2 "nonzero_shift_count_operand" ""))
+ (match_operand:DSI 3 "contiguous_bitmask_nowrap_operand" "")))]
"<z10_or_zEC12_cond>
&& s390_extzv_shift_ok (<bitsize>, INTVAL (operands[2]),
INTVAL (operands[3]))
(set_attr "z10prop" "z10_super_E1,z10_super_E1,*,
z10_super_E1,z10_super_E1,z10_super_E1")])
-(define_insn "*andsi3_zarch"
+(define_insn "*andsi3"
[(set (match_operand:SI 0 "nonimmediate_operand"
"=d,d, d, d, d,d,d,d,d, d, AQ,Q")
(and:SI (match_operand:SI 1 "nonimmediate_operand"
(match_operand:SI 2 "general_operand"
" M,M,N0HSF,N1HSF,Os,d,d,R,T,NxxSw,NxQSF,Q")))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
+ "s390_logical_operator_ok_p (operands)"
"@
#
#
*,
*")])
-(define_insn "*andsi3_esa"
- [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d, AQ,Q")
- (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0, 0,0")
- (match_operand:SI 2 "general_operand" " d,R,NxQSF,Q")))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
- "@
- nr\t%0,%2
- n\t%0,%2
- #
- #"
- [(set_attr "op_type" "RR,RX,SI,SS")
- (set_attr "z10prop" "z10_super_E1,z10_super_E1,*,*")])
-
-
(define_split
[(set (match_operand:SI 0 "s_operand" "")
(and:SI (match_dup 0) (match_operand:SI 1 "immediate_operand" "")))
; andhi3 instruction pattern(s).
;
-(define_insn "*andhi3_zarch"
+(define_insn "*andhi3"
[(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d, AQ,Q")
(and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,d,0, 0,0")
(match_operand:HI 2 "general_operand" " d,d,n,NxQHF,Q")))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
+ "s390_logical_operator_ok_p (operands)"
"@
nr\t%0,%2
nrk\t%0,%1,%2
(set_attr "z10prop" "z10_super_E1,*,z10_super_E1,*,*")
])
-(define_insn "*andhi3_esa"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=d,AQ,Q")
- (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0")
- (match_operand:HI 2 "general_operand" "d,NxQHF,Q")))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
- "@
- nr\t%0,%2
- #
- #"
- [(set_attr "op_type" "RR,SI,SS")
- (set_attr "z10prop" "z10_super_E1,*,*")
-])
-
(define_split
[(set (match_operand:HI 0 "s_operand" "")
(and:HI (match_dup 0) (match_operand:HI 1 "immediate_operand" "")))
; andqi3 instruction pattern(s).
;
-(define_insn "*andqi3_zarch"
+(define_insn "*andqi3"
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,Q,S,Q")
(and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,d,0,0,0,0")
(match_operand:QI 2 "general_operand" " d,d,n,n,n,Q")))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
+ "s390_logical_operator_ok_p (operands)"
"@
nr\t%0,%2
nrk\t%0,%1,%2
(set_attr "cpu_facility" "*,z196,*,*,longdisp,*")
(set_attr "z10prop" "z10_super_E1,*,z10_super_E1,z10_super,z10_super,*")])
-(define_insn "*andqi3_esa"
- [(set (match_operand:QI 0 "nonimmediate_operand" "=d,Q,Q")
- (and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
- (match_operand:QI 2 "general_operand" "d,n,Q")))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
- "@
- nr\t%0,%2
- ni\t%S0,%b2
- #"
- [(set_attr "op_type" "RR,SI,SS")
- (set_attr "z10prop" "z10_super_E1,z10_super,*")])
-
;
; And with complement
;
; c = ~b & a = (b & a) ^ a
(define_insn_and_split "*andc_split_<mode>"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "")
- (and:GPR (not:GPR (match_operand:GPR 1 "nonimmediate_operand" ""))
- (match_operand:GPR 2 "general_operand" "")))
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "")
+ (and:DSI (not:DSI (match_operand:DSI 1 "nonimmediate_operand" ""))
+ (match_operand:DSI 2 "general_operand" "")))
(clobber (reg:CC CC_REGNUM))]
"!TARGET_Z15
&& ! reload_completed
"&& 1"
[
(parallel
- [(set (match_dup 3) (and:GPR (match_dup 1) (match_dup 2)))
+ [(set (match_dup 3) (and:DSI (match_dup 1) (match_dup 2)))
(clobber (reg:CC CC_REGNUM))])
(parallel
- [(set (match_dup 0) (xor:GPR (match_dup 3) (match_dup 2)))
+ [(set (match_dup 0) (xor:DSI (match_dup 3) (match_dup 2)))
(clobber (reg:CC CC_REGNUM))])]
{
if (reg_overlap_mentioned_p (operands[0], operands[2]))
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=d,d,d")
(ior:DI (match_dup 1) (match_dup 2)))]
- "s390_match_ccmode(insn, CCTmode) && TARGET_ZARCH"
+ "s390_match_ccmode(insn, CCTmode)"
"@
ogr\t%0,%2
ogrk\t%0,%1,%2
(match_operand:DI 2 "general_operand" " d,d,T"))
(const_int 0)))
(clobber (match_scratch:DI 0 "=d,d,d"))]
- "s390_match_ccmode(insn, CCTmode) && TARGET_ZARCH"
+ "s390_match_ccmode(insn, CCTmode)"
"@
ogr\t%0,%2
ogrk\t%0,%1,%2
(match_operand:DI 2 "general_operand"
"N0HD0,N1HD0,N2HD0,N3HD0,N0SD0,N1SD0,d,d,T,NxQD0,Q")))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
+ "s390_logical_operator_ok_p (operands)"
"@
oihh\t%0,%i2
oihl\t%0,%i2
(set_attr "cpu_facility" "*,*,z196,*,longdisp")
(set_attr "z10prop" "z10_super_E1,z10_super_E1,*,z10_super_E1,z10_super_E1")])
-(define_insn "*iorsi3_zarch"
+(define_insn "*iorsi3"
[(set (match_operand:SI 0 "nonimmediate_operand" "=d, d, d,d,d,d,d, AQ,Q")
(ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0, 0, 0,0,d,0,0, 0,0")
(match_operand:SI 2 "general_operand" "N0HS0,N1HS0,Os,d,d,R,T,NxQS0,Q")))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
+ "s390_logical_operator_ok_p (operands)"
"@
oilh\t%0,%i2
oill\t%0,%i2
*,
*")])
-(define_insn "*iorsi3_esa"
- [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,AQ,Q")
- (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0")
- (match_operand:SI 2 "general_operand" "d,R,NxQS0,Q")))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
- "@
- or\t%0,%2
- o\t%0,%2
- #
- #"
- [(set_attr "op_type" "RR,RX,SI,SS")
- (set_attr "z10prop" "z10_super_E1,z10_super_E1,*,*")])
-
(define_split
[(set (match_operand:SI 0 "s_operand" "")
(ior:SI (match_dup 0) (match_operand:SI 1 "immediate_operand" "")))
; iorhi3 instruction pattern(s).
;
-(define_insn "*iorhi3_zarch"
+(define_insn "*iorhi3"
[(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d, AQ,Q")
(ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,d,0, 0,0")
(match_operand:HI 2 "general_operand" " d,d,n,NxQH0,Q")))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
+ "s390_logical_operator_ok_p (operands)"
"@
or\t%0,%2
ork\t%0,%1,%2
(set_attr "cpu_facility" "*,z196,*,*,*")
(set_attr "z10prop" "z10_super_E1,*,z10_super_E1,*,*")])
-(define_insn "*iorhi3_esa"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=d,AQ,Q")
- (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0")
- (match_operand:HI 2 "general_operand" "d,NxQH0,Q")))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
- "@
- or\t%0,%2
- #
- #"
- [(set_attr "op_type" "RR,SI,SS")
- (set_attr "z10prop" "z10_super_E1,*,*")])
-
(define_split
[(set (match_operand:HI 0 "s_operand" "")
(ior:HI (match_dup 0) (match_operand:HI 1 "immediate_operand" "")))
; iorqi3 instruction pattern(s).
;
-(define_insn "*iorqi3_zarch"
+(define_insn "*iorqi3"
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,Q,S,Q")
(ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,d,0,0,0,0")
(match_operand:QI 2 "general_operand" " d,d,n,n,n,Q")))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
+ "s390_logical_operator_ok_p (operands)"
"@
or\t%0,%2
ork\t%0,%1,%2
(set_attr "z10prop" "z10_super_E1,*,z10_super_E1,
z10_super,z10_super,*")])
-(define_insn "*iorqi3_esa"
- [(set (match_operand:QI 0 "nonimmediate_operand" "=d,Q,Q")
- (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
- (match_operand:QI 2 "general_operand" "d,n,Q")))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
- "@
- or\t%0,%2
- oi\t%S0,%b2
- #"
- [(set_attr "op_type" "RR,SI,SS")
- (set_attr "z10prop" "z10_super_E1,z10_super,*")])
-
;
; And/Or with complement
;
; ncrk, ncgrk, ocrk, ocgrk
-(define_insn "*<ANDOR:bitops_name>c<GPR:mode>_cc"
+(define_insn "*<ANDOR:bitops_name>c<DSI:mode>_cc"
[(set (reg CC_REGNUM)
(compare
- (ANDOR:GPR (not:GPR (match_operand:GPR 1 "register_operand" "d"))
- (match_operand:GPR 2 "register_operand" "d"))
+ (ANDOR:DSI (not:DSI (match_operand:DSI 1 "register_operand" "d"))
+ (match_operand:DSI 2 "register_operand" "d"))
(const_int 0)))
- (set (match_operand:GPR 0 "register_operand" "=d")
- (ANDOR:GPR (not:GPR (match_dup 1))
+ (set (match_operand:DSI 0 "register_operand" "=d")
+ (ANDOR:DSI (not:DSI (match_dup 1))
(match_dup 2)))]
"TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
- "<ANDOR:noxa>c<GPR:g>rk\t%0,%2,%1"
+ "<ANDOR:noxa>c<DSI:g>rk\t%0,%2,%1"
[(set_attr "op_type" "RRF")])
; ncrk, ncgrk, ocrk, ocgrk
-(define_insn "*<ANDOR:bitops_name>c<GPR:mode>_cconly"
+(define_insn "*<ANDOR:bitops_name>c<DSI:mode>_cconly"
[(set (reg CC_REGNUM)
(compare
- (ANDOR:GPR (not:GPR (match_operand:GPR 1 "register_operand" "d"))
- (match_operand:GPR 2 "register_operand" "d"))
+ (ANDOR:DSI (not:DSI (match_operand:DSI 1 "register_operand" "d"))
+ (match_operand:DSI 2 "register_operand" "d"))
(const_int 0)))
- (clobber (match_scratch:GPR 0 "=d"))]
+ (clobber (match_scratch:DSI 0 "=d"))]
"TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
- "<ANDOR:noxa>c<GPR:g>rk\t%0,%2,%1"
+ "<ANDOR:noxa>c<DSI:g>rk\t%0,%2,%1"
[(set_attr "op_type" "RRF")])
; ncrk, ncgrk, ocrk, ocgrk
-(define_insn "*<ANDOR:bitops_name>c<GPR:mode>"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (ANDOR:GPR (not:GPR (match_operand:GPR 1 "register_operand" "d"))
- (match_operand:GPR 2 "register_operand" "d")))
+(define_insn "*<ANDOR:bitops_name>c<DSI:mode>"
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (ANDOR:DSI (not:DSI (match_operand:DSI 1 "register_operand" "d"))
+ (match_operand:DSI 2 "register_operand" "d")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z15"
- "<ANDOR:noxa>c<GPR:g>rk\t%0,%2,%1"
+ "<ANDOR:noxa>c<DSI:g>rk\t%0,%2,%1"
[(set_attr "op_type" "RRF")])
;
;
; nnrk, nngrk, nork, nogrk
-(define_insn "*n<ANDOR:inv_bitops_name><GPR:mode>_cc"
+(define_insn "*n<ANDOR:inv_bitops_name><DSI:mode>_cc"
[(set (reg CC_REGNUM)
(compare
- (ANDOR:GPR (not:GPR (match_operand:GPR 1 "register_operand" "d"))
- (not:GPR (match_operand:GPR 2 "register_operand" "d")))
+ (ANDOR:DSI (not:DSI (match_operand:DSI 1 "register_operand" "d"))
+ (not:DSI (match_operand:DSI 2 "register_operand" "d")))
(const_int 0)))
- (set (match_operand:GPR 0 "register_operand" "=d")
- (ANDOR:GPR (not:GPR (match_dup 1))
- (not:GPR (match_dup 2))))]
+ (set (match_operand:DSI 0 "register_operand" "=d")
+ (ANDOR:DSI (not:DSI (match_dup 1))
+ (not:DSI (match_dup 2))))]
"TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
- "n<ANDOR:inv_no><GPR:g>rk\t%0,%1,%2"
+ "n<ANDOR:inv_no><DSI:g>rk\t%0,%1,%2"
[(set_attr "op_type" "RRF")])
; nnrk, nngrk, nork, nogrk
(define_insn "*n<ANDOR:inv_bitops_name><mode>_cconly"
[(set (reg CC_REGNUM)
(compare
- (ANDOR:GPR (not:GPR (match_operand:GPR 1 "register_operand" "d"))
- (not:GPR (match_operand:GPR 2 "register_operand" "d")))
+ (ANDOR:DSI (not:DSI (match_operand:DSI 1 "register_operand" "d"))
+ (not:DSI (match_operand:DSI 2 "register_operand" "d")))
(const_int 0)))
- (clobber (match_scratch:GPR 0 "=d"))]
+ (clobber (match_scratch:DSI 0 "=d"))]
"TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
- "n<ANDOR:inv_no><GPR:g>rk\t%0,%1,%2"
+ "n<ANDOR:inv_no><DSI:g>rk\t%0,%1,%2"
[(set_attr "op_type" "RRF")])
; nnrk, nngrk, nork, nogrk
(define_insn "*n<ANDOR:inv_bitops_name><mode>"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (ANDOR:GPR (not:GPR (match_operand:GPR 1 "register_operand" "d"))
- (not:GPR (match_operand:GPR 2 "register_operand" "d"))))
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (ANDOR:DSI (not:DSI (match_operand:DSI 1 "register_operand" "d"))
+ (not:DSI (match_operand:DSI 2 "register_operand" "d"))))
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z15"
- "n<ANDOR:inv_no><GPR:g>rk\t%0,%1,%2"
+ "n<ANDOR:inv_no><DSI:g>rk\t%0,%1,%2"
[(set_attr "op_type" "RRF")])
; Use NAND for bit inversion
(define_insn "*not<mode>"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (not:GPR (match_operand:GPR 1 "register_operand" "d")))
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (not:DSI (match_operand:DSI 1 "register_operand" "d")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z15"
- "nn<GPR:g>rk\t%0,%1,%1"
+ "nn<DSI:g>rk\t%0,%1,%1"
[(set_attr "op_type" "RRF")])
;
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=d,d,d")
(xor:DI (match_dup 1) (match_dup 2)))]
- "s390_match_ccmode(insn, CCTmode) && TARGET_ZARCH"
+ "s390_match_ccmode(insn, CCTmode)"
"@
xgr\t%0,%2
xgrk\t%0,%1,%2
(match_operand:DI 2 "general_operand" " d,d,T"))
(const_int 0)))
(clobber (match_scratch:DI 0 "=d,d,d"))]
- "s390_match_ccmode(insn, CCTmode) && TARGET_ZARCH"
+ "s390_match_ccmode(insn, CCTmode)"
"@
xgr\t%0,%2
xgrk\t%0,%1,%2
(xor:DI (match_operand:DI 1 "nonimmediate_operand" "%0, 0,0,d,0, 0,0")
(match_operand:DI 2 "general_operand" "N0SD0,N1SD0,d,d,T,NxQD0,Q")))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
+ "s390_logical_operator_ok_p (operands)"
"@
xihf\t%0,%k2
xilf\t%0,%k2
;
; nxrk, nxgrk
-(define_insn "*nxor<GPR:mode>_cc"
+(define_insn "*nxor<DSI:mode>_cc"
[(set (reg CC_REGNUM)
(compare
- (not:GPR (xor:GPR (match_operand:GPR 1 "register_operand" "d")
- (match_operand:GPR 2 "register_operand" "d")))
+ (not:DSI (xor:DSI (match_operand:DSI 1 "register_operand" "d")
+ (match_operand:DSI 2 "register_operand" "d")))
(const_int 0)))
- (set (match_operand:GPR 0 "register_operand" "=d")
- (xor:GPR (not:GPR (match_dup 1))
+ (set (match_operand:DSI 0 "register_operand" "=d")
+ (xor:DSI (not:DSI (match_dup 1))
(match_dup 2)))]
"TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
- "nx<GPR:g>rk\t%0,%1,%2"
+ "nx<DSI:g>rk\t%0,%1,%2"
[(set_attr "op_type" "RRF")])
; nxrk, nxgrk
(define_insn "*nxor<mode>_cconly"
[(set (reg CC_REGNUM)
(compare
- (not:GPR (xor:GPR (match_operand:GPR 1 "register_operand" "d")
- (match_operand:GPR 2 "register_operand" "d")))
+ (not:DSI (xor:DSI (match_operand:DSI 1 "register_operand" "d")
+ (match_operand:DSI 2 "register_operand" "d")))
(const_int 0)))
- (clobber (match_scratch:GPR 0 "=d"))]
+ (clobber (match_scratch:DSI 0 "=d"))]
"TARGET_Z15 && s390_match_ccmode(insn, CCTmode)"
- "nx<GPR:g>rk\t%0,%1,%2"
+ "nx<DSI:g>rk\t%0,%1,%2"
[(set_attr "op_type" "RRF")])
; nxrk, nxgrk
(define_insn "*nxor<mode>"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (not:GPR (xor:GPR (match_operand:GPR 1 "register_operand" "d")
- (match_operand:GPR 2 "register_operand" "d"))))
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (not:DSI (xor:DSI (match_operand:DSI 1 "register_operand" "d")
+ (match_operand:DSI 2 "register_operand" "d"))))
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z15"
- "nx<GPR:g>rk\t%0,%1,%2"
+ "nx<DSI:g>rk\t%0,%1,%2"
[(set_attr "op_type" "RRF")])
;;
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=d")
(neg:DI (sign_extend:DI (match_dup 1))))]
- "TARGET_ZARCH && s390_match_ccmode (insn, CCAmode)"
+ "s390_match_ccmode (insn, CCAmode)"
"lcgfr\t%0,%1"
[(set_attr "op_type" "RRE")
(set_attr "z10prop" "z10_c")])
[(set (match_operand:DI 0 "register_operand" "=d")
(neg:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "d"))))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
"lcgfr\t%0,%1"
[(set_attr "op_type" "RRE")
(set_attr "z10prop" "z10_c")])
; lcr, lcgr
(define_insn "*neg<mode>2_cc"
[(set (reg CC_REGNUM)
- (compare (neg:GPR (match_operand:GPR 1 "register_operand" "d"))
+ (compare (neg:DSI (match_operand:DSI 1 "register_operand" "d"))
(const_int 0)))
- (set (match_operand:GPR 0 "register_operand" "=d")
- (neg:GPR (match_dup 1)))]
+ (set (match_operand:DSI 0 "register_operand" "=d")
+ (neg:DSI (match_dup 1)))]
"s390_match_ccmode (insn, CCAmode)"
"lc<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")
; lcr, lcgr
(define_insn "*neg<mode>2_cconly"
[(set (reg CC_REGNUM)
- (compare (neg:GPR (match_operand:GPR 1 "register_operand" "d"))
+ (compare (neg:DSI (match_operand:DSI 1 "register_operand" "d"))
(const_int 0)))
- (clobber (match_scratch:GPR 0 "=d"))]
+ (clobber (match_scratch:DSI 0 "=d"))]
"s390_match_ccmode (insn, CCAmode)"
"lc<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")
; lcr, lcgr
(define_insn "*neg<mode>2"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (neg:GPR (match_operand:GPR 1 "register_operand" "d")))
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (neg:DSI (match_operand:DSI 1 "register_operand" "d")))
(clobber (reg:CC CC_REGNUM))]
""
"lc<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")
(set_attr "z10prop" "z10_super_c_E1")])
-(define_insn "*negdi2_31"
- [(set (match_operand:DI 0 "register_operand" "=d")
- (neg:DI (match_operand:DI 1 "register_operand" "d")))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH"
- "#")
-
-; Split a DImode NEG on 31bit into 2 SImode NEGs
-
-; Doing the twos complement separately on the SImode parts does an
-; unwanted +1 on the high part which needs to be subtracted afterwards
-; ... unless the +1 on the low part created an overflow.
-
-(define_split
- [(set (match_operand:DI 0 "register_operand" "")
- (neg:DI (match_operand:DI 1 "register_operand" "")))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH
- && reload_completed
- && ((REG_P (operands[0]) && REG_P (operands[1])
- && REGNO (operands[0]) == REGNO (operands[1]))
- || s390_split_ok_p (operands[0], operands[1], DImode, 0))"
- [(parallel
- [(set (match_dup 2) (neg:SI (match_dup 3)))
- (clobber (reg:CC CC_REGNUM))])
- (parallel
- [(set (reg:CCAP CC_REGNUM)
- (compare:CCAP (neg:SI (match_dup 5)) (const_int 0)))
- (set (match_dup 4) (neg:SI (match_dup 5)))])
- (set (pc)
- (if_then_else (ne (reg:CCAP CC_REGNUM) (const_int 0))
- (pc)
- (label_ref (match_dup 6))))
- (parallel
- [(set (match_dup 2) (plus:SI (match_dup 2) (const_int -1)))
- (clobber (reg:CC CC_REGNUM))])
- (match_dup 6)]
- "operands[2] = operand_subword (operands[0], 0, 0, DImode);
- operands[3] = operand_subword (operands[1], 0, 0, DImode);
- operands[4] = operand_subword (operands[0], 1, 0, DImode);
- operands[5] = operand_subword (operands[1], 1, 0, DImode);
- operands[6] = gen_label_rtx ();")
-
-; Like above but first make a copy of the low part of the src operand
-; since it might overlap with the high part of the destination.
-
-(define_split
- [(set (match_operand:DI 0 "register_operand" "")
- (neg:DI (match_operand:DI 1 "register_operand" "")))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH
- && s390_split_ok_p (operands[0], operands[1], DImode, 1)
- && reload_completed"
- [; Make a backup of op5 first
- (set (match_dup 4) (match_dup 5))
- ; Setting op2 here might clobber op5
- (parallel
- [(set (match_dup 2) (neg:SI (match_dup 3)))
- (clobber (reg:CC CC_REGNUM))])
- (parallel
- [(set (reg:CCAP CC_REGNUM)
- (compare:CCAP (neg:SI (match_dup 4)) (const_int 0)))
- (set (match_dup 4) (neg:SI (match_dup 4)))])
- (set (pc)
- (if_then_else (ne (reg:CCAP CC_REGNUM) (const_int 0))
- (pc)
- (label_ref (match_dup 6))))
- (parallel
- [(set (match_dup 2) (plus:SI (match_dup 2) (const_int -1)))
- (clobber (reg:CC CC_REGNUM))])
- (match_dup 6)]
- "operands[2] = operand_subword (operands[0], 0, 0, DImode);
- operands[3] = operand_subword (operands[1], 0, 0, DImode);
- operands[4] = operand_subword (operands[0], 1, 0, DImode);
- operands[5] = operand_subword (operands[1], 1, 0, DImode);
- operands[6] = gen_label_rtx ();")
-
;
; neg(tf|df|sf)2 instruction pattern(s).
;
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=d")
(abs:DI (sign_extend:DI (match_dup 1))))]
- "TARGET_ZARCH && s390_match_ccmode (insn, CCAmode)"
+ "s390_match_ccmode (insn, CCAmode)"
"lpgfr\t%0,%1"
[(set_attr "op_type" "RRE")
(set_attr "z10prop" "z10_c")])
[(set (match_operand:DI 0 "register_operand" "=d")
(abs:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "d"))))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
"lpgfr\t%0,%1"
[(set_attr "op_type" "RRE")
(set_attr "z10prop" "z10_c")])
; lpr, lpgr
(define_insn "*abs<mode>2_cc"
[(set (reg CC_REGNUM)
- (compare (abs:GPR (match_operand:DI 1 "register_operand" "d"))
+ (compare (abs:DSI (match_operand:DI 1 "register_operand" "d"))
(const_int 0)))
- (set (match_operand:GPR 0 "register_operand" "=d")
- (abs:GPR (match_dup 1)))]
+ (set (match_operand:DSI 0 "register_operand" "=d")
+ (abs:DSI (match_dup 1)))]
"s390_match_ccmode (insn, CCAmode)"
"lp<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")
; lpr, lpgr
(define_insn "*abs<mode>2_cconly"
[(set (reg CC_REGNUM)
- (compare (abs:GPR (match_operand:GPR 1 "register_operand" "d"))
+ (compare (abs:DSI (match_operand:DSI 1 "register_operand" "d"))
(const_int 0)))
- (clobber (match_scratch:GPR 0 "=d"))]
+ (clobber (match_scratch:DSI 0 "=d"))]
"s390_match_ccmode (insn, CCAmode)"
"lp<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")
; lpr, lpgr
(define_insn "abs<mode>2"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (abs:GPR (match_operand:GPR 1 "register_operand" "d")))
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (abs:DSI (match_operand:DSI 1 "register_operand" "d")))
(clobber (reg:CC CC_REGNUM))]
""
"lp<g>r\t%0,%1"
(define_expand "<minmaxname><mode>3"
[(set (reg:<minmaxcc> CC_REGNUM)
- (compare:<minmaxcc> (match_operand:GPR 1 "loc_operand")
- (match_operand:GPR 2 "loc_operand")))
- (set (match_operand:GPR 0 "nonimmediate_operand")
- (if_then_else:GPR (MINMAXOP (reg:<minmaxcc> CC_REGNUM) (const_int 0))
+ (compare:<minmaxcc> (match_operand:DSI 1 "loc_operand")
+ (match_operand:DSI 2 "loc_operand")))
+ (set (match_operand:DSI 0 "nonimmediate_operand")
+ (if_then_else:DSI (MINMAXOP (reg:<minmaxcc> CC_REGNUM) (const_int 0))
(match_dup 1)
(match_dup 2)))]
"TARGET_Z196")
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=d")
(neg:DI (abs:DI (sign_extend:DI (match_dup 1)))))]
- "TARGET_ZARCH && s390_match_ccmode (insn, CCAmode)"
+ "s390_match_ccmode (insn, CCAmode)"
"lngfr\t%0,%1"
[(set_attr "op_type" "RRE")
(set_attr "z10prop" "z10_c")])
(neg:DI (abs:DI (sign_extend:DI
(match_operand:SI 1 "register_operand" "d")))))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
"lngfr\t%0,%1"
[(set_attr "op_type" "RRE")
(set_attr "z10prop" "z10_c")])
; lnr, lngr
(define_insn "*negabs<mode>2_cc"
[(set (reg CC_REGNUM)
- (compare (neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d")))
+ (compare (neg:DSI (abs:DSI (match_operand:DSI 1 "register_operand" "d")))
(const_int 0)))
- (set (match_operand:GPR 0 "register_operand" "=d")
- (neg:GPR (abs:GPR (match_dup 1))))]
+ (set (match_operand:DSI 0 "register_operand" "=d")
+ (neg:DSI (abs:DSI (match_dup 1))))]
"s390_match_ccmode (insn, CCAmode)"
"ln<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")
; lnr, lngr
(define_insn "*negabs<mode>2_cconly"
[(set (reg CC_REGNUM)
- (compare (neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d")))
+ (compare (neg:DSI (abs:DSI (match_operand:DSI 1 "register_operand" "d")))
(const_int 0)))
- (clobber (match_scratch:GPR 0 "=d"))]
+ (clobber (match_scratch:DSI 0 "=d"))]
"s390_match_ccmode (insn, CCAmode)"
"ln<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")
; lnr, lngr
(define_insn "*negabs<mode>2"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d"))))
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (neg:DSI (abs:DSI (match_operand:DSI 1 "register_operand" "d"))))
(clobber (reg:CC CC_REGNUM))]
""
"ln<g>r\t%0,%1"
(define_expand "clzdi2"
[(set (match_operand:DI 0 "register_operand" "=d")
(clz:DI (match_operand:DI 1 "register_operand" "d")))]
- "TARGET_EXTIMM && TARGET_ZARCH"
+ "TARGET_EXTIMM"
{
- if (!(TARGET_Z17 && TARGET_64BIT))
+ if (!TARGET_Z17)
{
rtx_insn *insn;
rtx clz_equal;
(define_insn "*clzg"
[(set (match_operand:DI 0 "register_operand" "=d")
(clz:DI (match_operand:DI 1 "register_operand" "d")))]
- "TARGET_Z17 && TARGET_64BIT"
+ "TARGET_Z17"
"clzg\t%0,%1"
[(set_attr "op_type" "RRE")])
(subreg:SI (clz:DI (match_dup 1)) 4))))))
(clobber (reg:CC CC_REGNUM))]
"UINTVAL (operands[2]) == HOST_WIDE_INT_1U << 63
- && TARGET_EXTIMM && TARGET_ZARCH"
+ && TARGET_EXTIMM"
"flogr\t%0,%1"
[(set_attr "op_type" "RRE")])
(define_expand "clzsi2"
[(match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "register_operand" "")]
- "TARGET_EXTIMM && TARGET_ZARCH"
+ "TARGET_EXTIMM"
{
rtx extreg = gen_reg_rtx (DImode);
rtx clzreg = gen_reg_rtx (DImode);
(define_insn "ctzdi2"
[(set (match_operand:DI 0 "register_operand" "=d")
(ctz:DI (match_operand:DI 1 "register_operand" "d")))]
- "TARGET_Z17 && TARGET_64BIT"
+ "TARGET_Z17"
"ctzg\t%0,%1"
[(set_attr "op_type" "RRE")])
(zero_extend:DI (match_operand:SI 1 "register_operand" "")))
(set (match_dup 3) (ctz:DI (match_dup 2)))
(set (match_operand:SI 0 "register_operand" "") (subreg:SI (match_dup 3) 4))]
- "TARGET_Z17 && TARGET_64BIT"
+ "TARGET_Z17"
{
operands[2] = gen_reg_rtx (DImode);
operands[3] = gen_reg_rtx (DImode);
;
(define_expand "rotl<mode>3"
- [(set (match_operand:GPR 0 "register_operand" "")
- (rotate:GPR (match_operand:GPR 1 "register_operand" "")
+ [(set (match_operand:DSI 0 "register_operand" "")
+ (rotate:DSI (match_operand:DSI 1 "register_operand" "")
(match_operand:QI 2 "shift_count_operand" "")))]
""
"")
; rll, rllg
(define_insn "*rotl<mode>3"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (rotate:GPR (match_operand:GPR 1 "register_operand" "d")
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (rotate:DSI (match_operand:DSI 1 "register_operand" "d")
(match_operand:QI 2 "shift_count_operand" "jsc")))]
""
"rll<g>\t%0,%1,%Y2"
""
"")
-; ESA 64 bit register pair shift with reg or imm shift count
-; sldl, srdl
-(define_insn "*<shift>di3_31"
- [(set (match_operand:DI 0 "register_operand" "=d")
- (SHIFT:DI (match_operand:DI 1 "register_operand" "0")
- (match_operand:QI 2 "shift_count_operand" "jsc")))]
- "!TARGET_ZARCH"
- "s<lr>dl\t%0,%Y2"
- [(set_attr "op_type" "RS")
- (set_attr "atype" "reg")
- (set_attr "z196prop" "z196_cracked")])
-
; 64 bit register shift with reg or imm shift count
; sll, srl, sllg, srlg, sllk, srlk
(define_insn "*<shift><mode>3"
- [(set (match_operand:GPR 0 "register_operand" "=d, d")
- (SHIFT:GPR (match_operand:GPR 1 "register_operand" "<d0>, d")
+ [(set (match_operand:DSI 0 "register_operand" "=d, d")
+ (SHIFT:DSI (match_operand:DSI 1 "register_operand" "<d0>, d")
(match_operand:QI 2 "shift_count_operand" "jsc,jsc")))]
""
"@
""
"")
-(define_insn "*ashrdi3_31<setcc><cconly>"
- [(set (match_operand:DI 0 "register_operand" "=d")
- (ashiftrt:DI (match_operand:DI 1 "register_operand" "0")
- (match_operand:QI 2 "shift_count_operand" "jsc")))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH"
- "srda\t%0,%Y2"
- [(set_attr "op_type" "RS")
- (set_attr "atype" "reg")])
-
; sra, srag
(define_insn "*ashr<mode>3<setcc><cconly>"
- [(set (match_operand:GPR 0 "register_operand" "=d, d")
- (ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>, d")
+ [(set (match_operand:DSI 0 "register_operand" "=d, d")
+ (ashiftrt:DSI (match_operand:DSI 1 "register_operand" "<d0>, d")
(match_operand:QI 2 "shift_count_operand" "jsc,jsc")))
(clobber (reg:CC CC_REGNUM))]
""
(define_expand "cbranch<mode>4"
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"
- [(match_operand:GPR 1 "register_operand" "")
- (match_operand:GPR 2 "general_operand" "")])
+ [(match_operand:DSI 1 "register_operand" "")
+ (match_operand:DSI 2 "general_operand" "")])
(label_ref (match_operand 3 "" ""))
(pc)))]
""
(define_expand "ctrap<mode>4"
[(trap_if (match_operator 0 "comparison_operator"
- [(match_operand:GPR 1 "register_operand" "")
- (match_operand:GPR 2 "general_operand" "")])
+ [(match_operand:DSI 1 "register_operand" "")
+ (match_operand:DSI 2 "general_operand" "")])
(match_operand 3 "const0_operand" ""))]
""
{
; crt, cgrt, cit, cgit
(define_insn "*cmp_and_trap_signed_int<mode>"
[(trap_if (match_operator 0 "s390_signed_integer_comparison"
- [(match_operand:GPR 1 "register_operand" "d,d")
- (match_operand:GPR 2 "nonmemory_operand" "d,K")])
+ [(match_operand:DSI 1 "register_operand" "d,d")
+ (match_operand:DSI 2 "nonmemory_operand" "d,K")])
(const_int 0))]
"TARGET_Z10"
"@
; clrt, clgrt, clfit, clgit, clt, clgt
(define_insn "*cmp_and_trap_unsigned_int<mode>"
[(trap_if (match_operator 0 "s390_unsigned_integer_comparison"
- [(match_operand:GPR 1 "register_operand" "d,d,d")
- (match_operand:GPR 2 "general_operand" "d,D,S")])
+ [(match_operand:DSI 1 "register_operand" "d,d,d")
+ (match_operand:DSI 2 "general_operand" "d,D,S")])
(const_int 0))]
"TARGET_Z10"
"@
; lat, lgat
(define_insn "*load_and_trap<mode>"
- [(trap_if (eq (match_operand:GPR 0 "memory_operand" "T")
+ [(trap_if (eq (match_operand:DSI 0 "memory_operand" "T")
(const_int 0))
(const_int 0))
- (set (match_operand:GPR 1 "register_operand" "=d")
+ (set (match_operand:DSI 1 "register_operand" "=d")
(match_dup 0))]
"TARGET_ZEC12"
"l<g>at\t%1,%0"
; necessary to load the compare and the increment values into a
; register pair as needed by brxle.
-(define_insn_and_split "*brx_stage1_<GPR:mode>"
+(define_insn_and_split "*brx_stage1_<DSI:mode>"
[(set (pc)
(if_then_else
(match_operator 6 "s390_brx_operator"
- [(plus:GPR (match_operand:GPR 1 "register_operand" "")
- (match_operand:GPR 2 "general_operand" ""))
- (match_operand:GPR 3 "register_operand" "")])
+ [(plus:DSI (match_operand:DSI 1 "register_operand" "")
+ (match_operand:DSI 2 "general_operand" ""))
+ (match_operand:DSI 3 "register_operand" "")])
(label_ref (match_operand 0 "" ""))
(pc)))
- (set (match_operand:GPR 4 "nonimmediate_operand" "")
- (plus:GPR (match_dup 1) (match_dup 2)))
+ (set (match_operand:DSI 4 "nonimmediate_operand" "")
+ (plus:DSI (match_dup 1) (match_dup 2)))
(clobber (reg:CC CC_REGNUM))
- (clobber (match_scratch:GPR 5 ""))]
+ (clobber (match_scratch:DSI 5 ""))]
""
"#"
"!reload_completed && !reload_in_progress"
(parallel [(set (pc)
(if_then_else
(match_op_dup 6
- [(plus:GPR (match_dup 1) (match_dup 7))
+ [(plus:DSI (match_dup 1) (match_dup 7))
(match_dup 8)])
(label_ref (match_dup 0))
(pc)))
(set (match_dup 4)
- (plus:GPR (match_dup 1) (match_dup 7)))
+ (plus:DSI (match_dup 1) (match_dup 7)))
(clobber (match_dup 5))
(clobber (reg:CC CC_REGNUM))])]
{
- rtx dreg = gen_reg_rtx (word_mode == DImode ? TImode : DImode);
- operands[7] = gen_lowpart (<GPR:MODE>mode,
- gen_highpart (word_mode, dreg));
- operands[8] = gen_lowpart (<GPR:MODE>mode,
- gen_lowpart (word_mode, dreg));
+ rtx dreg = gen_reg_rtx (TImode);
+ operands[7] = gen_lowpart (<DSI:MODE>mode,
+ gen_highpart (DImode, dreg));
+ operands[8] = gen_lowpart (<DSI:MODE>mode,
+ gen_lowpart (DImode, dreg));
})
; brxlg, brxhg
(subreg:DI (match_dup 2) 0)))
(clobber (match_scratch:DI 4 "=X,&1,&?d"))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
{
if (which_alternative != 0)
return "#";
(subreg:SI (match_dup 2) 4)))
(clobber (match_scratch:SI 4 "=X,&1,&?d"))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
{
if (which_alternative != 0)
return "#";
(if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 60000))
(const_int 6) (const_int 14)))])
-; brxle, brxh
-
-(define_insn_and_split "*brx_31bit"
- [(set (pc)
- (if_then_else
- (match_operator 5 "s390_brx_operator"
- [(plus:SI (match_operand:SI 1 "register_operand" "d,d,d")
- (subreg:SI (match_operand:DI 2 "register_operand" "d,d,d") 0))
- (subreg:SI (match_dup 2) 4)])
- (label_ref (match_operand 0 "" ""))
- (pc)))
- (set (match_operand:SI 3 "nonimmediate_operand" "=1,?X,?X")
- (plus:SI (match_dup 1)
- (subreg:SI (match_dup 2) 0)))
- (clobber (match_scratch:SI 4 "=X,&1,&?d"))
- (clobber (reg:CC CC_REGNUM))]
- "!TARGET_ZARCH"
-{
- if (which_alternative != 0)
- return "#";
- else if (get_attr_length (insn) == 6)
- return "brx%C5\t%1,%2,%l0";
- else
- return "ar\t%1,%2\;cr\t%1,%M2\;jg%C5\t%l0";
-}
- "&& reload_completed
- && (!REG_P (operands[3])
- || !rtx_equal_p (operands[1], operands[3]))"
- [(set (match_dup 4) (match_dup 1))
- (parallel [(set (match_dup 4) (plus:SI (match_dup 4) (subreg:SI (match_dup 2) 0)))
- (clobber (reg:CC CC_REGNUM))])
- (set (reg:CCS CC_REGNUM) (compare:CCS (match_dup 4) (subreg:SI (match_dup 2) 4)))
- (set (match_dup 3) (match_dup 4))
- (set (pc) (if_then_else (match_op_dup 5 [(reg:CCS CC_REGNUM) (const_int 0)])
- (label_ref (match_dup 0))
- (pc)))]
- ""
- [(set_attr "op_type" "RSI")
- (set_attr "type" "branch")
- (set (attr "length")
- (if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 60000))
- (const_int 6) (const_int 14)))])
-
;; branch on count
{
if (GET_MODE (operands[0]) == SImode)
emit_jump_insn (gen_doloop_si64 (operands[1], operands[0], operands[0]));
- else if (GET_MODE (operands[0]) == DImode && TARGET_ZARCH)
+ else if (GET_MODE (operands[0]) == DImode)
emit_jump_insn (gen_doloop_di (operands[1], operands[0], operands[0]));
else
FAIL;
(plus:DI (match_dup 1) (const_int -1)))
(clobber (match_scratch:DI 3 "=X,&1,&?d"))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_ZARCH"
+ ""
{
if (which_alternative != 0)
return "#";
{
operands[0] = force_reg (Pmode, operands[0]);
if (TARGET_CPU_Z10)
- {
- if (TARGET_64BIT)
- emit_jump_insn (gen_indirect_jump_via_thunkdi_z10 (operands[0]));
- else
- emit_jump_insn (gen_indirect_jump_via_thunksi_z10 (operands[0]));
- }
+ emit_jump_insn (gen_indirect_jump_via_thunkdi_z10 (operands[0]));
else
- {
- if (TARGET_64BIT)
- emit_jump_insn (gen_indirect_jump_via_thunkdi (operands[0]));
- else
- emit_jump_insn (gen_indirect_jump_via_thunksi (operands[0]));
- }
+ emit_jump_insn (gen_indirect_jump_via_thunkdi (operands[0]));
DONE;
}
operands[0] = force_reg (Pmode, operands[0]);
rtx label_ref = gen_rtx_LABEL_REF (VOIDmode, gen_label_rtx ());
if (TARGET_CPU_Z10)
- {
- if (TARGET_64BIT)
- emit_jump_insn (gen_indirect_jump_via_inlinethunkdi_z10 (operands[0],
- label_ref));
- else
- emit_jump_insn (gen_indirect_jump_via_inlinethunksi_z10 (operands[0],
- label_ref));
- }
+ emit_jump_insn (gen_indirect_jump_via_inlinethunkdi_z10 (operands[0],
+ label_ref));
else
- {
- if (TARGET_64BIT)
- emit_jump_insn (gen_indirect_jump_via_inlinethunkdi (operands[0],
- label_ref,
- force_reg (Pmode, label_ref)));
- else
- emit_jump_insn (gen_indirect_jump_via_inlinethunksi (operands[0],
- label_ref,
- force_reg (Pmode, label_ref)));
- }
+ emit_jump_insn (gen_indirect_jump_via_inlinethunkdi (operands[0],
+ label_ref,
+ force_reg (Pmode, label_ref)));
DONE;
}
})
(set_attr "type" "branch")
(set_attr "atype" "agen")])
-(define_insn "indirect_jump_via_thunk<mode>_z10"
+(define_insn "indirect_jump_via_thunkdi_z10"
[(set (pc)
- (match_operand:P 0 "register_operand" "a"))]
+ (match_operand:DI 0 "register_operand" "a"))]
"TARGET_INDIRECT_BRANCH_NOBP_JUMP_THUNK
&& TARGET_CPU_Z10"
{
(set_attr "type" "branch")
(set_attr "atype" "agen")])
-(define_insn "indirect_jump_via_thunk<mode>"
+(define_insn "indirect_jump_via_thunkdi"
[(set (pc)
- (match_operand:P 0 "register_operand" " a"))
- (clobber (reg:P INDIRECT_BRANCH_THUNK_REGNUM))]
+ (match_operand:DI 0 "register_operand" " a"))
+ (clobber (reg:DI INDIRECT_BRANCH_THUNK_REGNUM))]
"TARGET_INDIRECT_BRANCH_NOBP_JUMP_THUNK
&& !TARGET_CPU_Z10"
{
; The label_ref is wrapped into an if_then_else in order to hide it
; from mark_jump_label. Without this the label_ref would become the
; ONLY jump target of that jump breaking the control flow graph.
-(define_insn "indirect_jump_via_inlinethunk<mode>_z10"
- [(unspec [(if_then_else (match_operand:P 1 "larl_operand" "X")
+(define_insn "indirect_jump_via_inlinethunkdi_z10"
+ [(unspec [(if_then_else (match_operand:DI 1 "larl_operand" "X")
(const_int 0)
(const_int 0))
(const_int 0)] UNSPEC_EXECUTE_JUMP)
- (set (pc) (match_operand:P 0 "register_operand" "a"))]
+ (set (pc) (match_operand:DI 0 "register_operand" "a"))]
"TARGET_INDIRECT_BRANCH_NOBP_JUMP_INLINE_THUNK
&& TARGET_CPU_Z10"
{
(set_attr "type" "branch")
(set_attr "length" "10")])
-(define_insn "indirect_jump_via_inlinethunk<mode>"
- [(unspec [(if_then_else (match_operand:P 1 "larl_operand" "X")
+(define_insn "indirect_jump_via_inlinethunkdi"
+ [(unspec [(if_then_else (match_operand:DI 1 "larl_operand" "X")
(const_int 0)
(const_int 0))
- (match_operand:P 2 "register_operand" "a")] UNSPEC_EXECUTE_JUMP)
- (set (pc) (match_operand:P 0 "register_operand" "a"))]
+ (match_operand:DI 2 "register_operand" "a")] UNSPEC_EXECUTE_JUMP)
+ (set (pc) (match_operand:DI 0 "register_operand" "a"))]
"TARGET_INDIRECT_BRANCH_NOBP_JUMP_INLINE_THUNK
&& !TARGET_CPU_Z10"
{
operands[0] = force_reg (GET_MODE (operands[0]), operands[0]);
if (TARGET_CPU_Z10)
- {
- if (TARGET_64BIT)
- emit_jump_insn (gen_casesi_jump_via_thunkdi_z10 (operands[0],
- operands[1]));
- else
- emit_jump_insn (gen_casesi_jump_via_thunksi_z10 (operands[0],
- operands[1]));
- }
+ emit_jump_insn (gen_casesi_jump_via_thunkdi_z10 (operands[0], operands[1]));
else
- {
- if (TARGET_64BIT)
- emit_jump_insn (gen_casesi_jump_via_thunkdi (operands[0],
- operands[1]));
- else
- emit_jump_insn (gen_casesi_jump_via_thunksi (operands[0],
- operands[1]));
- }
+ emit_jump_insn (gen_casesi_jump_via_thunkdi (operands[0], operands[1]));
DONE;
}
operands[0] = force_reg (Pmode, operands[0]);
rtx label_ref = gen_rtx_LABEL_REF (VOIDmode, gen_label_rtx ());
if (TARGET_CPU_Z10)
- {
- if (TARGET_64BIT)
- emit_jump_insn (gen_casesi_jump_via_inlinethunkdi_z10 (operands[0],
- operands[1],
- label_ref));
- else
- emit_jump_insn (gen_casesi_jump_via_inlinethunksi_z10 (operands[0],
- operands[1],
- label_ref));
- }
- else
- {
- if (TARGET_64BIT)
- emit_jump_insn (gen_casesi_jump_via_inlinethunkdi (operands[0],
+ emit_jump_insn (gen_casesi_jump_via_inlinethunkdi_z10 (operands[0],
operands[1],
- label_ref,
- force_reg (Pmode, label_ref)));
- else
- emit_jump_insn (gen_casesi_jump_via_inlinethunksi (operands[0],
- operands[1],
- label_ref,
- force_reg (Pmode, label_ref)));
- }
+ label_ref));
+ else
+ emit_jump_insn (gen_casesi_jump_via_inlinethunkdi (operands[0],
+ operands[1],
+ label_ref,
+ force_reg (Pmode, label_ref)));
DONE;
}
})
(set_attr "type" "branch")
(set_attr "atype" "agen")])
-(define_insn "casesi_jump_via_thunk<mode>_z10"
- [(set (pc) (match_operand:P 0 "register_operand" "a"))
+(define_insn "casesi_jump_via_thunkdi_z10"
+ [(set (pc) (match_operand:DI 0 "register_operand" "a"))
(use (label_ref (match_operand 1 "" "")))]
"TARGET_INDIRECT_BRANCH_NOBP_JUMP_THUNK
&& TARGET_CPU_Z10"
(set_attr "type" "branch")
(set_attr "atype" "agen")])
-(define_insn "casesi_jump_via_thunk<mode>"
- [(set (pc) (match_operand:P 0 "register_operand" "a"))
+(define_insn "casesi_jump_via_thunkdi"
+ [(set (pc) (match_operand:DI 0 "register_operand" "a"))
(use (label_ref (match_operand 1 "" "")))
- (clobber (reg:P INDIRECT_BRANCH_THUNK_REGNUM))]
+ (clobber (reg:DI INDIRECT_BRANCH_THUNK_REGNUM))]
"TARGET_INDIRECT_BRANCH_NOBP_JUMP_THUNK
&& !TARGET_CPU_Z10"
{
; The label_ref is wrapped into an if_then_else in order to hide it
; from mark_jump_label. Without this the label_ref would become the
; ONLY jump target of that jump breaking the control flow graph.
-(define_insn "casesi_jump_via_inlinethunk<mode>_z10"
- [(unspec [(if_then_else (match_operand:P 2 "larl_operand" "X")
+(define_insn "casesi_jump_via_inlinethunkdi_z10"
+ [(unspec [(if_then_else (match_operand:DI 2 "larl_operand" "X")
(const_int 0)
(const_int 0))
(const_int 0)] UNSPEC_EXECUTE_JUMP)
- (set (pc) (match_operand:P 0 "register_operand" "a"))
+ (set (pc) (match_operand:DI 0 "register_operand" "a"))
(use (label_ref (match_operand 1 "" "")))]
"TARGET_INDIRECT_BRANCH_NOBP_JUMP_INLINE_THUNK
&& TARGET_CPU_Z10"
(set_attr "type" "cs")
(set_attr "length" "10")])
-(define_insn "casesi_jump_via_inlinethunk<mode>"
- [(unspec [(if_then_else (match_operand:P 2 "larl_operand" "X")
+(define_insn "casesi_jump_via_inlinethunkdi"
+ [(unspec [(if_then_else (match_operand:DI 2 "larl_operand" "X")
(const_int 0)
(const_int 0))
- (match_operand:P 3 "register_operand" "a")] UNSPEC_EXECUTE_JUMP)
- (set (pc) (match_operand:P 0 "register_operand" "a"))
+ (match_operand:DI 3 "register_operand" "a")] UNSPEC_EXECUTE_JUMP)
+ (set (pc) (match_operand:DI 0 "register_operand" "a"))
(use (label_ref (match_operand 1 "" "")))]
"TARGET_INDIRECT_BRANCH_NOBP_JUMP_INLINE_THUNK
&& !TARGET_CPU_Z10"
if (GET_CODE (index) != REG)
index = copy_to_mode_reg (Pmode, index);
- if (TARGET_64BIT)
- emit_insn (gen_ashldi3 (index, index, GEN_INT (3)));
- else
- emit_insn (gen_ashlsi3 (index, index, const2_rtx));
+ emit_insn (gen_ashldi3 (index, index, GEN_INT (3)));
emit_move_insn (base, gen_rtx_LABEL_REF (Pmode, operands[3]));
(set_attr "atype" "agen")
(set_attr "z196prop" "z196_cracked")])
-(define_insn "*basr_via_thunk<mode>_z10"
- [(call (mem:QI (match_operand:P 0 "register_operand" "a"))
+(define_insn "*basr_via_thunkdi_z10"
+ [(call (mem:QI (match_operand:DI 0 "register_operand" "a"))
(match_operand 1 "const_int_operand" "n"))
- (clobber (match_operand:P 2 "register_operand" "=&r"))]
+ (clobber (match_operand:DI 2 "register_operand" "=&r"))]
"TARGET_INDIRECT_BRANCH_NOBP_CALL
&& TARGET_CPU_Z10
&& !SIBLING_CALL_P (insn)"
(set_attr "atype" "agen")
(set_attr "z196prop" "z196_cracked")])
-(define_insn "*basr_via_thunk<mode>"
- [(call (mem:QI (match_operand:P 0 "register_operand" "a"))
+(define_insn "*basr_via_thunkdi"
+ [(call (mem:QI (match_operand:DI 0 "register_operand" "a"))
(match_operand 1 "const_int_operand" "n"))
- (clobber (match_operand:P 2 "register_operand" "=&r"))
- (clobber (reg:P INDIRECT_BRANCH_THUNK_REGNUM))]
+ (clobber (match_operand:DI 2 "register_operand" "=&r"))
+ (clobber (reg:DI INDIRECT_BRANCH_THUNK_REGNUM))]
"TARGET_INDIRECT_BRANCH_NOBP_CALL
&& !TARGET_CPU_Z10
&& !SIBLING_CALL_P (insn)"
(call (mem:QI (match_operand 1 "register_operand" "a"))
(match_operand 2 "const_int_operand" "n")))
(clobber (match_operand 3 "register_operand" "=&r"))
- (clobber (reg:P INDIRECT_BRANCH_THUNK_REGNUM))]
+ (clobber (reg:DI INDIRECT_BRANCH_THUNK_REGNUM))]
"TARGET_INDIRECT_BRANCH_NOBP_CALL
&& !TARGET_CPU_Z10
&& !SIBLING_CALL_P (insn)
;;- Thread-local storage support.
;;
-(define_expand "@get_thread_pointer<mode>"
- [(set (match_operand:P 0 "nonimmediate_operand" "")
- (unspec:P [(reg:P TP_REGNUM)] UNSPEC_GET_TP))]
+(define_expand "get_thread_pointerdi"
+ [(set (match_operand:DI 0 "nonimmediate_operand" "")
+ (unspec:DI [(reg:DI TP_REGNUM)] UNSPEC_GET_TP))]
""
"")
-(define_expand "set_thread_pointer<mode>"
- [(set (reg:P TP_REGNUM) (match_operand:P 0 "nonimmediate_operand" ""))
- (set (reg:P TP_REGNUM) (unspec_volatile:P [(reg:P TP_REGNUM)] UNSPECV_SET_TP))]
+(define_expand "set_thread_pointerdi"
+ [(set (reg:DI TP_REGNUM) (match_operand:DI 0 "nonimmediate_operand" ""))
+ (set (reg:DI TP_REGNUM) (unspec_volatile:DI [(reg:DI TP_REGNUM)] UNSPECV_SET_TP))]
""
"")
(unspec:DI [(match_operand:DI 1 "memory_operand" "T")
(match_operand:DI 2 "" "")]
UNSPEC_TLS_LOAD))]
- "TARGET_64BIT"
+ ""
"lg\t%0,%1%J2"
[(set_attr "op_type" "RXE")
(set_attr "z10prop" "z10_fwd_A3")])
-(define_insn "*tls_load_31"
- [(set (match_operand:SI 0 "register_operand" "=d,d")
- (unspec:SI [(match_operand:SI 1 "memory_operand" "R,T")
- (match_operand:SI 2 "" "")]
- UNSPEC_TLS_LOAD))]
- "!TARGET_64BIT"
- "@
- l\t%0,%1%J2
- ly\t%0,%1%J2"
- [(set_attr "op_type" "RX,RXY")
- (set_attr "type" "load")
- (set_attr "cpu_facility" "*,longdisp")
- (set_attr "z10prop" "z10_fwd_A3,z10_fwd_A3")])
-
(define_insn "*bras_tls"
[(set (match_operand 0 "" "")
(call (mem:QI (match_operand 1 "bras_sym_operand" "X"))
if (<MODE>mode == TImode)
emit_insn (gen_atomic_loadti_1 (operands[0], operands[1]));
- else if (<MODE>mode == DImode && !TARGET_ZARCH)
- emit_insn (gen_atomic_loaddi_1 (operands[0], operands[1]));
else
emit_move_insn (operands[0], operands[1]);
DONE;
})
-; Different from movdi_31 in that we want no splitters.
-(define_insn "atomic_loaddi_1"
- [(set (match_operand:DI 0 "register_operand" "=d,d,!*f,!*f")
- (unspec:DI [(match_operand:DI 1 "memory_operand" "Q,S,R,T")]
- UNSPEC_MOVA))]
- "!TARGET_ZARCH"
- "@
- lm\t%0,%M0,%S1
- lmy\t%0,%M0,%S1
- ld\t%0,%1
- ldy\t%0,%1"
- [(set_attr "op_type" "RS,RSY,RS,RSY")
- (set_attr "cpu_facility" "*,longdisp,*,longdisp")
- (set_attr "type" "lm,lm,floaddf,floaddf")])
-
(define_insn "atomic_loadti_1"
[(set (match_operand:TI 0 "register_operand" "=r")
(unspec:TI [(match_operand:TI 1 "memory_operand" "T")]
UNSPEC_MOVA))]
- "TARGET_ZARCH"
+ ""
"lpq\t%0,%1"
[(set_attr "op_type" "RXY")
(set_attr "type" "other")])
if (<MODE>mode == TImode)
emit_insn (gen_atomic_storeti_1 (operands[0], operands[1]));
- else if (<MODE>mode == DImode && !TARGET_ZARCH)
- emit_insn (gen_atomic_storedi_1 (operands[0], operands[1]));
else
emit_move_insn (operands[0], operands[1]);
if (is_mm_seq_cst (model))
DONE;
})
-; Different from movdi_31 in that we want no splitters.
-(define_insn "atomic_storedi_1"
- [(set (match_operand:DI 0 "memory_operand" "=Q,S,R,T")
- (unspec:DI [(match_operand:DI 1 "register_operand" "d,d,!*f,!*f")]
- UNSPEC_MOVA))]
- "!TARGET_ZARCH"
- "@
- stm\t%1,%N1,%S0
- stmy\t%1,%N1,%S0
- std %1,%0
- stdy %1,%0"
- [(set_attr "op_type" "RS,RSY,RS,RSY")
- (set_attr "cpu_facility" "*,longdisp,*,longdisp")
- (set_attr "type" "stm,stm,fstoredf,fstoredf")])
-
(define_insn "atomic_storeti_1"
[(set (match_operand:TI 0 "memory_operand" "=T")
(unspec:TI [(match_operand:TI 1 "register_operand" "r")]
UNSPEC_MOVA))]
- "TARGET_ZARCH"
+ ""
"stpq\t%1,%0"
[(set_attr "op_type" "RXY")
(set_attr "type" "other")])
(define_expand "atomic_compare_and_swap<mode>_internal"
[(parallel
- [(set (match_operand:DGPR 0 "register_operand")
- (match_operand:DGPR 1 "s_operand"))
+ [(set (match_operand:TDSI 0 "register_operand")
+ (match_operand:TDSI 1 "s_operand"))
(set (match_dup 1)
- (unspec_volatile:DGPR
+ (unspec_volatile:TDSI
[(match_dup 1)
- (match_operand:DGPR 2 "register_operand")
- (match_operand:DGPR 3 "register_operand")]
+ (match_operand:TDSI 2 "register_operand")
+ (match_operand:TDSI 3 "register_operand")]
UNSPECV_CAS))
(set (match_operand 4 "cc_reg_operand")
(match_dup 5))])]
UNSPECV_CAS))
(set (reg CC_REGNUM)
(compare (match_dup 1) (match_dup 2)))]
- "TARGET_ZARCH
- && s390_match_ccmode (insn, CCZ1mode)"
+ "s390_match_ccmode (insn, CCZ1mode)"
"c<td>sg\t%0,%3,%S1"
[(set_attr "op_type" "RSY")
(set_attr "type" "sem")])
-; cds, cdsy
-(define_insn "*atomic_compare_and_swapdi_2"
- [(set (match_operand:DI 0 "register_operand" "=r,r")
- (match_operand:DI 1 "nonsym_memory_operand" "+Q,S"))
- (set (match_dup 1)
- (unspec_volatile:DI
- [(match_dup 1)
- (match_operand:DI 2 "register_operand" "0,0")
- (match_operand:DI 3 "register_operand" "r,r")]
- UNSPECV_CAS))
- (set (reg CC_REGNUM)
- (compare (match_dup 1) (match_dup 2)))]
- "!TARGET_ZARCH
- && s390_match_ccmode (insn, CCZ1mode)"
- "@
- cds\t%0,%3,%S1
- cdsy\t%0,%3,%S1"
- [(set_attr "op_type" "RS,RSY")
- (set_attr "cpu_facility" "*,longdisp")
- (set_attr "type" "sem")])
-
; cs, csy
(define_insn "*atomic_compare_and_swapsi_3"
[(set (match_operand:SI 0 "register_operand" "=r,r")
; z196 load and add, xor, or and and instructions
(define_expand "atomic_fetch_<atomic><mode>"
- [(match_operand:GPR 0 "register_operand") ;; val out
- (ATOMIC_Z196:GPR
- (match_operand:GPR 1 "memory_operand") ;; memory
- (match_operand:GPR 2 "register_operand")) ;; val in
+ [(match_operand:DSI 0 "register_operand") ;; val out
+ (ATOMIC_Z196:DSI
+ (match_operand:DSI 1 "memory_operand") ;; memory
+ (match_operand:DSI 2 "register_operand")) ;; val in
(match_operand:SI 3 "const_int_operand")] ;; model
"TARGET_Z196"
{
; lan, lang, lao, laog, lax, laxg, laa, laag
(define_insn "atomic_fetch_<atomic><mode>_iaf"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (match_operand:GPR 1 "memory_operand" "+S"))
+ [(set (match_operand:DSI 0 "register_operand" "=d")
+ (match_operand:DSI 1 "memory_operand" "+S"))
(set (match_dup 1)
- (unspec_volatile:GPR
- [(ATOMIC_Z196:GPR (match_dup 1)
- (match_operand:GPR 2 "general_operand" "d"))]
+ (unspec_volatile:DSI
+ [(ATOMIC_Z196:DSI (match_dup 1)
+ (match_operand:DSI 2 "general_operand" "d"))]
UNSPECV_ATOMIC_OP))
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z196"
if (<MODE>mode == HImode || <MODE>mode == QImode)
s390_expand_atomic (<MODE>mode, SET, operands[0], operands[1], operands[2],
false);
- else if (<MODE>mode == SImode || TARGET_ZARCH)
- s390_expand_atomic_exchange_tdsi (operands[0], operands[1], operands[2]);
else
- FAIL;
+ s390_expand_atomic_exchange_tdsi (operands[0], operands[1], operands[2]);
DONE;
})
DONE;
})
-(define_expand "@probe_stack2<mode>"
+(define_expand "probe_stack2di"
[(set (reg:CCZ CC_REGNUM)
- (compare:CCZ (reg:W 0)
- (match_operand:W 0 "memory_operand")))
+ (compare:CCZ (reg:DI 0)
+ (match_operand:DI 0 "memory_operand")))
(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)]
"")
[(match_operand 0 "memory_operand")]
""
{
- emit_insn (gen_probe_stack2 (word_mode, operands[0]));
+ emit_insn (gen_probe_stack2di (operands[0]));
DONE;
})
if (!TARGET_CPU_Z10
&& TARGET_INDIRECT_BRANCH_NOBP_RET_OPTION)
{
- if (TARGET_64BIT)
- emit_jump_insn (gen_returndi_prez10 (operands[0]));
- else
- emit_jump_insn (gen_returnsi_prez10 (operands[0]));
+ emit_jump_insn (gen_returndi_prez10 (operands[0]));
DONE;
}
})
-(define_insn "*return<mode>"
+(define_insn "*returndi"
[(return)
- (use (match_operand:P 0 "register_operand" "a"))]
+ (use (match_operand:DI 0 "register_operand" "a"))]
"TARGET_CPU_Z10 || !TARGET_INDIRECT_BRANCH_NOBP_RET_OPTION"
{
if (TARGET_INDIRECT_BRANCH_NOBP_RET)
(set_attr "type" "jsr")
(set_attr "atype" "agen")])
-(define_insn "return<mode>_prez10"
+(define_insn "returndi_prez10"
[(return)
- (use (match_operand:P 0 "register_operand" "a"))
- (clobber (reg:P INDIRECT_BRANCH_THUNK_REGNUM))]
+ (use (match_operand:DI 0 "register_operand" "a"))
+ (clobber (reg:DI INDIRECT_BRANCH_THUNK_REGNUM))]
"!TARGET_CPU_Z10 && TARGET_INDIRECT_BRANCH_NOBP_RET_OPTION"
{
if (TARGET_INDIRECT_BRANCH_NOBP_RET)
(define_expand "ptr_extend"
[(set (match_operand:DI 0 "register_operand" "=r")
(match_operand:SI 1 "register_operand" "r"))]
- "TARGET_64BIT"
+ "TARGET_TPF"
{
emit_insn (gen_anddi3 (operands[0],
gen_lowpart (DImode, operands[1]),
; Stack Protector Patterns
;
-(define_insn "stack_protect_global_guard_addr<mode>"
- [(set (match_operand:P 0 "register_operand" "=d")
- (unspec_volatile:P [(const_int 0)] UNSPECV_SP_GLOBAL_GUARD_ADDR))]
+(define_insn "stack_protect_global_guard_addrdi"
+ [(set (match_operand:DI 0 "register_operand" "=d")
+ (unspec_volatile:DI [(const_int 0)] UNSPECV_SP_GLOBAL_GUARD_ADDR))]
""
{
if (flag_s390_stack_protector_guard_record)
if (flag_pic)
{
if (TARGET_Z10)
- output_asm_insn ("l<g>rl\t%0,__stack_chk_guard@GOTENT", operands);
+ output_asm_insn ("lgrl\t%0,__stack_chk_guard@GOTENT", operands);
else
{
output_asm_insn ("larl\t%0,__stack_chk_guard@GOTENT", operands);
- output_asm_insn ("l<g>\t%0,0(%0)", operands);
+ output_asm_insn ("lg\t%0,0(%0)", operands);
}
}
else
output_asm_insn ("larl\t%0,__stack_chk_guard", operands);
if (flag_s390_stack_protector_guard_record)
fprintf (asm_out_file, "\t.section __stack_protector_loc,\\"a\\",@progbits\n"
- "\t.%s 1b\n"
- "\t.previous\n", TARGET_64BIT ? "quad" : "long");
+ "\t.quad 1b\n"
+ "\t.previous\n");
return "";
}
[(set (attr "mnemonic")
- (cond [(match_test "flag_pic && TARGET_Z10") (const_string "l<g>rl")
+ (cond [(match_test "flag_pic && TARGET_Z10") (const_string "lgrl")
(match_test "flag_pic && !TARGET_Z10") (const_string "*")]
(const_string "larl")))])
-; Insns stack_protect_get_tp{si,di} are similar to *get_tp_{31,64} but still
-; distinct in the sense that they force recomputation of the thread pointer
-; instead of potentially reloading it from stack.
-
-(define_insn_and_split "stack_protect_get_tpsi"
- [(set (match_operand:SI 0 "register_operand" "=d")
- (unspec_volatile:SI [(const_int 0)] UNSPECV_SP_GET_TP))]
- ""
- "#"
- "&& reload_completed"
- [(set (match_dup 0) (reg:SI AR0_REGNUM))])
+; Insn stack_protect_get_tpdi is similar to *get_tp_64 but still distinct in
+; the sense that it forces recomputation of the thread pointer instead of
+; potentially reloading it from stack.
(define_insn_and_split "stack_protect_get_tpdi"
[(set (match_operand:DI 0 "register_operand" "=d")
if (TARGET_SP_GLOBAL_GUARD)
{
rtx addr = gen_reg_rtx (Pmode);
- if (TARGET_64BIT)
- emit_insn (gen_stack_protect_global_guard_addrdi (addr));
- else
- emit_insn (gen_stack_protect_global_guard_addrsi (addr));
+ emit_insn (gen_stack_protect_global_guard_addrdi (addr));
operands[1] = gen_rtx_MEM (Pmode, addr);
}
else
{
#ifdef TARGET_THREAD_SSP_OFFSET
rtx tp = gen_reg_rtx (Pmode);
- if (TARGET_64BIT)
- emit_insn (gen_stack_protect_get_tpdi (tp));
- else
- emit_insn (gen_stack_protect_get_tpsi (tp));
+ emit_insn (gen_stack_protect_get_tpdi (tp));
operands[1]
= gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, tp,
GEN_INT (TARGET_THREAD_SSP_OFFSET)));
#endif
}
- if (TARGET_64BIT)
- emit_insn (gen_stack_protect_setdi (operands[0], operands[1]));
- else
- emit_insn (gen_stack_protect_setsi (operands[0], operands[1]));
+ emit_insn (gen_stack_protect_setdi (operands[0], operands[1]));
DONE;
})
-(define_insn "stack_protect_set<mode>"
- [(set (match_operand:DSI 0 "memory_operand" "=Q")
- (unspec:DSI [(match_operand:DSI 1 "memory_operand" "Q")] UNSPEC_SP_SET))]
+(define_insn "stack_protect_setdi"
+ [(set (match_operand:DI 0 "memory_operand" "=Q")
+ (unspec:DI [(match_operand:DI 1 "memory_operand" "Q")] UNSPEC_SP_SET))]
""
"mvc\t%O0(%G0,%R0),%S1"
[(set_attr "op_type" "SS")])
if (TARGET_SP_GLOBAL_GUARD)
{
rtx addr = gen_reg_rtx (Pmode);
- if (TARGET_64BIT)
- emit_insn (gen_stack_protect_global_guard_addrdi (addr));
- else
- emit_insn (gen_stack_protect_global_guard_addrsi (addr));
+ emit_insn (gen_stack_protect_global_guard_addrdi (addr));
operands[1] = gen_rtx_MEM (Pmode, addr);
}
else
{
#ifdef TARGET_THREAD_SSP_OFFSET
rtx tp = gen_reg_rtx (Pmode);
- if (TARGET_64BIT)
- emit_insn (gen_stack_protect_get_tpdi (tp));
- else
- emit_insn (gen_stack_protect_get_tpsi (tp));
+ emit_insn (gen_stack_protect_get_tpdi (tp));
operands[1]
= gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, tp,
GEN_INT (TARGET_THREAD_SSP_OFFSET)));
#endif
}
- if (TARGET_64BIT)
- emit_insn (gen_stack_protect_testdi (operands[0], operands[1]));
- else
- emit_insn (gen_stack_protect_testsi (operands[0], operands[1]));
+ emit_insn (gen_stack_protect_testdi (operands[0], operands[1]));
cc_reg = gen_rtx_REG (CCZmode, CC_REGNUM);
test = gen_rtx_EQ (VOIDmode, cc_reg, const0_rtx);
DONE;
})
-(define_insn "stack_protect_test<mode>"
+(define_insn "stack_protect_testdi"
[(set (reg:CCZ CC_REGNUM)
- (unspec:CCZ [(match_operand:DSI 0 "memory_operand" "Q")
- (match_operand:DSI 1 "memory_operand" "Q")] UNSPEC_SP_TEST))]
+ (unspec:CCZ [(match_operand:DI 0 "memory_operand" "Q")
+ (match_operand:DI 1 "memory_operand" "Q")] UNSPEC_SP_TEST))]
""
"clc\t%O0(%G0,%R0),%S1"
[(set_attr "op_type" "SS")])
; This is used in s390_emit_prologue in order to prevent insns
; adjusting the stack pointer to be moved over insns writing stack
; slots using a copy of the stack pointer in a different register.
-(define_insn "@stack_tie<mode>"
+(define_insn "stack_tiedi"
[(set (match_operand:BLK 0 "memory_operand" "+m")
(unspec:BLK [(match_dup 0)
- (match_operand:P 1 "register_operand" "r")] UNSPEC_TIE))]
+ (match_operand:DI 1 "register_operand" "r")] UNSPEC_TIE))]
""
""
[(set_attr "length" "0")])
; may overlap.
; lrvr, lrv, strv, lrvgr, lrvg, strvg
(define_insn "bswap<mode>2"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "=d,d,T")
- (bswap:GPR (match_operand:GPR 1 "nonimmediate_operand" " d,T,d")))]
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d,d,T")
+ (bswap:DSI (match_operand:DSI 1 "nonimmediate_operand" " d,T,d")))]
""
"@
lrv<g>r\t%0,%1
""
{
/* Offset from thread pointer to __private_ss. */
- int psso = TARGET_64BIT ? 0x38 : 0x20;
+ int psso = 0x38;
rtx tp = s390_get_thread_pointer ();
rtx guard = gen_rtx_MEM (Pmode, plus_constant (Pmode, tp, psso));
rtx reg = gen_reg_rtx (Pmode);
rtx cc;
- if (TARGET_64BIT)
- emit_insn (gen_subdi3 (reg, stack_pointer_rtx, operands[0]));
- else
- emit_insn (gen_subsi3 (reg, stack_pointer_rtx, operands[0]));
+ emit_insn (gen_subdi3 (reg, stack_pointer_rtx, operands[0]));
cc = s390_emit_compare (VOIDmode, GT, reg, guard);
s390_emit_jump (operands[1], cc);
; allow the edge to the BB with the call done label to be
; redirected both need to make use of the same label_ref.
-(define_insn "@split_stack_call<mode>"
+(define_insn "split_stack_calldi"
[(set (pc) (label_ref (match_operand 2 "" ""))) ; call done label
- (set (reg:P 1) (unspec_volatile:P [(match_operand 0 "bras_sym_operand" "X")
- (reg:P 1)]
- UNSPECV_SPLIT_STACK_CALL))
+ (set (reg:DI 1) (unspec_volatile:DI [(match_operand 0 "bras_sym_operand" "X")
+ (reg:DI 1)]
+ UNSPECV_SPLIT_STACK_CALL))
(use (label_ref (match_operand 1 "" "X"))) ; parm block label
(use (match_operand 3 "const_int_operand" "X")) ; frame size
(use (match_operand 4 "const_int_operand" "X"))] ; arg size
; As above but with a conditional jump
-(define_insn "@split_stack_cond_call<mode>"
+(define_insn "split_stack_cond_calldi"
[(set (pc)
(if_then_else
(match_operand 5 "" "") ; condition
(label_ref (match_operand 2 "" "")) ; call done label
(pc)))
- (set (reg:P 1) (unspec_volatile:P [(match_operand 0 "bras_sym_operand" "X")
- (reg:P 1)]
+ (set (reg:DI 1) (unspec_volatile:DI [(match_operand 0 "bras_sym_operand" "X")
+ (reg:DI 1)]
UNSPECV_SPLIT_STACK_CALL))
(use (label_ref (match_operand 1 "" "X"))) ; parm block label
(use (match_operand 3 "const_int_operand" "X")) ; frame size
long s390_cost_pointer
m31
-Target RejectNegative Negative(m64) InverseMask(64BIT)
-31 bit ABI.
+Target Var(flag_m31) Undocumented
+; After removing -m31, -m64 is the only supported ABI.
+; Therefore, specifying -m64 doesn't have any additional effect.
+; However, keep it for backwards compatibility.
m64
-Target RejectNegative Negative(m31) Mask(64BIT)
+Target Ignore
64 bit ABI.
march=
Additional debug prints.
mesa
-Target RejectNegative Negative(mzarch) InverseMask(ZARCH)
+Target Var(flag_mesa) Undocumented
ESA/390 architecture.
mhard-dfp
Target RejectNegative Joined UInteger Var(s390_warn_framesize) Save
Warn if a single function's framesize exceeds the given framesize.
+; After removing ESA/390 support, z/Architecture is the only supported
+; cpu mode. Therefore, specifying -mzarch doesn't have any additional
+; effect. However, keep it for backwards compatibility.
mzarch
-Target RejectNegative Negative(mesa) Mask(ZARCH)
+Target Ignore
z/Architecture.
; This option was added to fix some testsuite failures.
; Autogenerated by regenerate-opt-urls.py from gcc/config/s390/s390.opt and generated HTML
-m31
-UrlSuffix(gcc/S_002f390-and-zSeries-Options.html#index-m31)
-
m64
UrlSuffix(gcc/S_002f390-and-zSeries-Options.html#index-m64-2)
mdebug
UrlSuffix(gcc/S_002f390-and-zSeries-Options.html#index-mdebug-1)
-mesa
-UrlSuffix(gcc/S_002f390-and-zSeries-Options.html#index-mesa)
-
mhard-dfp
UrlSuffix(gcc/S_002f390-and-zSeries-Options.html#index-mhard-dfp-1)
+++ /dev/null
-/* Definitions of target machine for IBM zSeries 64-bit
- Copyright (C) 2002-2026 Free Software Foundation, Inc.
- Contributed by Hartmut Penner (hpenner@de.ibm.com) and
- Ulrich Weigand (uweigand@de.ibm.com).
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
-version.
-
-GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#ifndef _S390X_H
-#define _S390X_H
-
-#define DEFAULT_TARGET_64BIT
-
-#endif
# are found in /lib32 and /usr/lib32, /lib64 and /usr/lib64 are symlinks to
# /lib and /usr/lib, while other distributions install libraries into /lib64
# and /usr/lib64. The LSB does not enforce the use of /lib64 and /usr/lib64,
-# it doesn't tell anything about the 32bit libraries on those systems. Set
-# MULTILIB_OSDIRNAMES according to what is found on the target.
+# it doesn't tell anything about the 32bit libraries on those systems.
-MULTILIB_OPTIONS = m64/m31
-MULTILIB_DIRNAMES = 64 32
+# After the removal of -m31 there is only one ABI left which means multilib
+# support is not needed anymore. Still maintain the directory structure for
+# 64-bit s390x which means library directories are named lib64.
+
+MULTILIB_OPTIONS = m64
+MULTILIB_DIRNAMES = 64
MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu)
-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu)
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE 32
+/* This is -1 for "pointer mode" extend. See ptr_extend in s390.md. */
+#define POINTERS_EXTEND_UNSIGNED -1
/* TPF OS specific stack-pointer offset. */
#undef STACK_POINTER_OFFSET
/* When building for TPF, set a generic default target that is 64 bits. Also
enable TPF profiling support and the standard backchain by default. */
#undef TARGET_DEFAULT
-#define TARGET_DEFAULT (MASK_TPF_PROFILING | MASK_64BIT | MASK_ZARCH \
- | MASK_HARD_DFP | MASK_BACKCHAIN)
+#define TARGET_DEFAULT (MASK_TPF_PROFILING | MASK_HARD_DFP | MASK_BACKCHAIN)
/* Exception handling. */
make it work with older binutils. */
#undef ASM_SPEC
#define ASM_SPEC \
- "%{m31&m64}%{mesa&mzarch}%{march=z*}" \
+ "%{march=z*}" \
"%{march=arch5:-march=z900}" \
"%{march=arch6:-march=z990}" \
"%{march=arch7:-march=z9-ec}" \
(define_split
[(set (match_operand:V_128 0 "register_operand" "")
(match_operand:V_128 1 "memory_operand" ""))]
- "TARGET_ZARCH && reload_completed
+ "reload_completed
&& !VECTOR_REG_P (operands[0])
&& !s_operand (operands[1], VOIDmode)"
[(set (match_dup 0) (match_dup 1))]
"=f,f,f,R,T,v,v,d,v,R, f, v, v, v, v, v, Q, Q, d, d,f,d,d,d,d,T,b")
(match_operand:V_64 1 "general_operand"
" f,R,T,f,f,v,d,v,R,v,j00,j00,jm1,jyy,jxx,jzz,j00,jm1,j00,jm1,d,f,b,d,T,d,d"))]
- "TARGET_ZARCH"
+ ""
"@
ldr\t%0,%1
ld\t%0,%1
; operand in a VR, therefore load it into a FPR pair first.
(define_expand "floatuns<mode>tf2_vr"
[(set (match_dup 2)
- (unsigned_float:FPRX2 (match_operand:GPR 1 "register_operand" "")))
+ (unsigned_float:FPRX2 (match_operand:DSI 1 "register_operand" "")))
(set (match_operand:TF 0 "register_operand" "")
(subreg:TF (match_dup 2) 0))]
"TARGET_VXE"
(define_expand "floatuns<mode>tf2"
[(match_operand:TF 0 "register_operand" "")
- (match_operand:GPR 1 "register_operand" "")]
+ (match_operand:DSI 1 "register_operand" "")]
"HAVE_TF (floatuns<mode>tf2)"
{ EXPAND_TF (floatuns<mode>tf2, 2); })
(define_expand "fix_trunctf<mode>2_vr"
[(set (match_dup 2)
(unspec:FPRX2 [(match_operand:TF 1 "register_operand")] UNSPEC_TF_TO_FPRX2))
- (parallel [(set (match_operand:GPR 0 "register_operand" "")
- (fix:GPR (match_dup 2)))
- (unspec:GPR [(const_int BFP_RND_TOWARD_0)] UNSPEC_ROUND)
+ (parallel [(set (match_operand:DSI 0 "register_operand" "")
+ (fix:DSI (match_dup 2)))
+ (unspec:DSI [(const_int BFP_RND_TOWARD_0)] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))])]
"TARGET_VXE"
{
})
(define_expand "fix_trunctf<mode>2"
- [(match_operand:GPR 0 "register_operand" "")
+ [(match_operand:DSI 0 "register_operand" "")
(match_operand:TF 1 "register_operand" "")]
"HAVE_TF (fix_trunctf<mode>2)"
{ EXPAND_TF (fix_trunctf<mode>2, 2); })
(define_expand "fixuns_trunctf<mode>2_vr"
[(set (match_dup 2)
(unspec:FPRX2 [(match_operand:TF 1 "register_operand")] UNSPEC_TF_TO_FPRX2))
- (parallel [(set (match_operand:GPR 0 "register_operand" "")
- (unsigned_fix:GPR (match_dup 2)))
- (unspec:GPR [(const_int BFP_RND_TOWARD_0)] UNSPEC_ROUND)
+ (parallel [(set (match_operand:DSI 0 "register_operand" "")
+ (unsigned_fix:DSI (match_dup 2)))
+ (unspec:DSI [(const_int BFP_RND_TOWARD_0)] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))])]
"TARGET_VXE"
{
})
(define_expand "fixuns_trunctf<mode>2"
- [(match_operand:GPR 0 "register_operand" "")
+ [(match_operand:DSI 0 "register_operand" "")
(match_operand:TF 1 "register_operand" "")]
"HAVE_TF (fixuns_trunctf<mode>2)"
{ EXPAND_TF (fixuns_trunctf<mode>2, 2); })
(match_operand:QI 3 "register_operand")
(match_operand:QI 4 "vll_bias_operand")
]
- "TARGET_VX && TARGET_64BIT"
+ "TARGET_VX"
{
rtx mem = adjust_address (operands[1], BLKmode, 0);
(match_operand:QI 2 "register_operand")
(match_operand:QI 3 "vll_bias_operand")
]
- "TARGET_VX && TARGET_64BIT"
+ "TARGET_VX"
{
rtx mem = adjust_address (operands[0], BLKmode, 0);
; Vector scatter element
; vscef, vsceg
-
-; A 64 bit target address generated from 32 bit elements
(define_insn "vec_scatter_element<V_HW_4:mode>_DI"
[(set (mem:<non_vec>
(plus:DI (zero_extend:DI
(vec_select:<non_vec>
(match_operand:V_HW_4 0 "register_operand" "v")
(parallel [(match_dup 3)])))]
- "TARGET_VX && TARGET_64BIT && UINTVAL (operands[3]) < 4"
+ "TARGET_VX && UINTVAL (operands[3]) < 4"
"vscef\t%v0,%O2(%v1,%R2),%3"
[(set_attr "op_type" "VRV")])
-; A 31 bit target address is generated from 64 bit elements
-; vsceg
-(define_insn "vec_scatter_element<V_HW_2:mode>_SI"
- [(set (mem:<non_vec>
- (plus:SI (subreg:SI
- (vec_select:<non_vec_int>
- (match_operand:<TOINTVEC> 1 "register_operand" "v")
- (parallel [(match_operand:QI 3 "const_mask_operand" "C")])) 4)
- (match_operand:SI 2 "address_operand" "ZQ")))
- (vec_select:<non_vec>
- (match_operand:V_HW_2 0 "register_operand" "v")
- (parallel [(match_dup 3)])))]
- "TARGET_VX && !TARGET_64BIT && UINTVAL (operands[3]) < GET_MODE_NUNITS (<V_HW_2:MODE>mode)"
- "vsce<V_HW_2:bhfgq>\t%v0,%O2(%v1,%R2),%3"
- [(set_attr "op_type" "VRV")])
-
-; Element size and target address size is the same
; vscef, vsceg
(define_insn "vec_scatter_element<mode>_<non_vec_int>"
[(set (mem:<non_vec>
"vsce<bhfgq>\t%v0,%O2(%v1,%R2),%3"
[(set_attr "op_type" "VRV")])
-; Depending on the address size we have to expand a different pattern.
-; This however cannot be represented in s390-builtins.def so we do the
-; multiplexing here in the expander.
-(define_expand "vec_scatter_element<V_HW_32_64:mode>"
- [(match_operand:V_HW_32_64 0 "register_operand" "")
- (match_operand:<TOINTVEC> 1 "register_operand" "")
- (match_operand 2 "address_operand" "")
- (match_operand:QI 3 "const_mask_operand" "")]
- "TARGET_VX"
-{
- if (TARGET_64BIT)
- {
- PUT_MODE (operands[2], DImode);
- emit_insn (
- gen_vec_scatter_element<V_HW_32_64:mode>_DI (operands[0], operands[1],
- operands[2], operands[3]));
- }
- else
- {
- PUT_MODE (operands[2], SImode);
- emit_insn (
- gen_vec_scatter_element<V_HW_32_64:mode>_SI (operands[0], operands[1],
- operands[2], operands[3]));
- }
- DONE;
-})
-
; Vector select
la.tls.gd a0,x
call __tls_get_addr'
;;
- s390-*-*)
- conftest_s='
- .section ".tdata","awT",@progbits
-foo: .long 25
- .text
- .long foo@TLSGD
- .long foo@TLSLDM
- .long foo@DTPOFF
- .long foo@NTPOFF
- .long foo@GOTNTPOFF
- .long foo@INDNTPOFF
- l %r1,foo@GOTNTPOFF(%r12)
- l %r1,0(%r1):tls_load:foo
- bas %r14,0(%r1,%r13):tls_gdcall:foo
- bas %r14,0(%r1,%r13):tls_ldcall:foo'
- tls_as_opt="-m31"
- ;;
s390x-*-*)
conftest_s='
.section ".tdata","awT",@progbits
fi
;;
- s390*-*-*)
+ s390x-*-*)
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .gnu_attribute support" >&5
$as_echo_n "checking assembler for .gnu_attribute support... " >&6; }
if ${gcc_cv_as_s390_gnu_attribute+:} false; then :
case "$target" in
powerpc*-*-linux* | \
sparc*-*-linux* | \
- s390*-*-linux* | \
+ s390x-*-linux* | \
alpha*-*-linux*)
# Check whether --with-long-double-128 was given.
else
case "$target" in
- s390*-*-linux-musl*)
+ s390x-*-linux-musl*)
gcc_cv_target_ldbl128=yes
;;
powerpc*-*-linux-musl*)
case $target in
- s390*-linux*)
+ s390x-linux*)
if test x"$enable_s390_excess_float_precision" = xauto; then
# Can we autodetect the behavior of the target libc?
if test "$target" = "$host" -a "$host" = "$build"; then
la.tls.gd a0,x
call __tls_get_addr'
;;
- s390-*-*)
- conftest_s='
- .section ".tdata","awT",@progbits
-foo: .long 25
- .text
- .long foo@TLSGD
- .long foo@TLSLDM
- .long foo@DTPOFF
- .long foo@NTPOFF
- .long foo@GOTNTPOFF
- .long foo@INDNTPOFF
- l %r1,foo@GOTNTPOFF(%r12)
- l %r1,0(%r1):tls_load:foo
- bas %r14,0(%r1,%r13):tls_gdcall:foo
- bas %r14,0(%r1,%r13):tls_ldcall:foo'
- tls_as_opt="-m31"
- ;;
s390x-*-*)
conftest_s='
.section ".tdata","awT",@progbits
[AC_DEFINE(HAVE_AS_16B_ATOMIC, 1,
[Define if your assembler supports LSX and SCQ for 16B atomic.])])
;;
- s390*-*-*)
+ s390x-*-*)
gcc_GAS_CHECK_FEATURE([.gnu_attribute support],
gcc_cv_as_s390_gnu_attribute,,
[.gnu_attribute 8,1],,
case "$target" in
powerpc*-*-linux* | \
sparc*-*-linux* | \
- s390*-*-linux* | \
+ s390x-*-linux* | \
alpha*-*-linux*)
AC_ARG_WITH(long-double-128,
[AS_HELP_STRING([--with-long-double-128],
[use 128-bit long double by default])],
gcc_cv_target_ldbl128="$with_long_double_128", [
case "$target" in
- s390*-*-linux-musl*)
+ s390x-*-linux-musl*)
gcc_cv_target_ldbl128=yes
;;
powerpc*-*-linux-musl*)
[],[enable_s390_excess_float_precision=auto])
case $target in
- s390*-linux*)
+ s390x-linux*)
if test x"$enable_s390_excess_float_precision" = xauto; then
# Can we autodetect the behavior of the target libc?
if test "$target" = "$host" -a "$host" = "$build"; then
mipsisa64r2el, mipsisa64sb1, mipsisa64sr71k, mipstx39, mmix, mn10300, moxie,
msp430, nds32be, nds32le, nvptx, or1k, pdp11, powerpc, powerpc64,
powerpc64le, powerpcle, pru, riscv32, riscv32be, riscv64, riscv64be, rl78, rx,
-s390, s390x, sh, shle, sparc, sparc64, tic6x, v850,
+s390x, sh, shle, sparc, sparc64, tic6x, v850,
v850e, v850e1, vax, visium, x86_64, xstormy16, xtensa
@end quotation
On mips-linux, this will build a tri-arch compiler (ABI o32/n32/64),
defaulted to o32.
Currently, this option only affects sparc-linux, powerpc-linux, x86-linux,
-mips-linux and s390-linux.
+and mips-linux.
@item --enable-default-pie
Turn on @option{-fPIE} and @option{-pie} by default.
@item --enable-s390-excess-float-precision
@itemx --disable-s390-excess-float-precision
-On s390(x) targets, enable treatment of float expressions with double precision
+On s390x targets, enable treatment of float expressions with double precision
when in standards-compliant mode (e.g., when @code{--std=c99} or
@code{-fexcess-precision=standard} are given).
-mlong-double-64 -mlong-double-128
-mbackchain -mpacked-stack
-msmall-exec -mmvcle
--m64 -m31 -mdebug -mesa -mzarch
+-m64 -mdebug -mzarch
-mhtm -mvx -mzvector
-mtpf-trace -mtpf-trace-skip -mmain
-mfused-madd -mno-fused-madd
which does not have this limitation.
@opindex m64
-@opindex m31
@item -m64
-@itemx -m31
-When @option{-m31} is specified, generate code compliant to the
-GNU/Linux for S/390 ABI@. When @option{-m64} is specified, generate
-code compliant to the GNU/Linux for zSeries ABI@. This allows GCC in
-particular to generate 64-bit instructions. For the @samp{s390}
-targets, the default is @option{-m31}, while the @samp{s390x}
-targets default to @option{-m64}. Note, @option{-m31} is deprecated and
-support will be removed.
+After the removal of @option{-m31}, option @option{-m64} has no counterpart
+anymore. For the sake of backwards compatibility, the option is still accepted
+but doesn't have any effect anymore. Therefore, generated code comprises
+64-bit instructions and follows the GNU/Linux for zSeries ABI by default.
+
@opindex mzarch
-@opindex mesa
@item -mzarch
-@itemx -mesa
-When @option{-mzarch} is specified, generate code using the
-instructions available on z/Architecture.
-When @option{-mesa} is specified, generate code using the
-instructions available on ESA/390. Note that @option{-mesa} is
-not possible with @option{-m64}.
-When generating code compliant to the GNU/Linux for S/390 ABI,
-the default is @option{-mesa}. When generating code compliant
-to the GNU/Linux for zSeries ABI, the default is @option{-mzarch}.
+After the removal of @option{-mesa}, option @option{-mzarch} has no counterpart
+anymore. For the sake of backwards compatibility, the option is still accepted
+but doesn't have any effect anymore. Therefore, generated code comprises
+instructions available on z/Architecture by default.
@opindex mhtm
@opindex mno-htm
-/* { dg-do compile { target arm*-*-* s390-*-* } } */
+/* { dg-do compile { target arm*-*-* } } */
/* { dg-options "-std=c99" } we need long long */
/* { dg-additional-options "-mcpu=unset -march=armv7-a+fp -marm" { target arm*-*-* } } */
#if defined (__arm__)
# define GPR1 "{r4}"
# define GPR2_RAW "r5"
-#elif defined (__s390__)
-# define GPR1 "{r4}"
-# define GPR2_RAW "r5"
#endif
#define GPR2 "{"GPR2_RAW"}"
/* { dg-do compile { target arm*-*-* alpha*-*-* i?86-*-* powerpc*-*-* rs6000-*-* x86_64-*-* s390*-*-* } } */
/* { dg-require-effective-target stdint_types } */
/* { dg-options "-O2 -fdump-rtl-combine" } */
-/* { dg-options "-O2 -fdump-rtl-combine -march=z900" { target s390-*-* } } */
#include <stdint.h>
/* { dg-additional-options "-mtune-ctrl=^one_if_conv_insn" { target { i?86-*-* x86_64-*-* } } } */
/* { dg-skip-if "Multiple set if-conversion not guaranteed on all subtargets" { "arm*-*-* avr-*-* cris-*-* hppa*64*-*-* visium-*-*" riscv*-*-* msp430-*-* pru-*-* loongarch32-*-* } } */
/* { dg-skip-if "" { { sparc*-*-* } && { ! sparc_v9 } } } */
-/* { dg-skip-if "" { "s390x-*-*" } { "-m31" } } */
typedef int word __attribute__((mode(word)));
/* { dg-require-effective-target bswap } */
/* { dg-require-effective-target stdint_types } */
/* { dg-options "-O2 -fdump-tree-bswap" } */
-/* { dg-additional-options "-march=z900" { target s390-*-* } } */
#include <stdint.h>
/* { dg-require-effective-target bswap } */
/* { dg-require-effective-target stdint_types } */
/* { dg-options "-O2 -fdump-tree-optimized" } */
-/* { dg-additional-options "-march=z900" { target s390-*-* } } */
typedef int SItype __attribute__ ((mode (SI)));
typedef int DItype __attribute__ ((mode (DI)));
/* { dg-do compile } */
/* { dg-require-effective-target bswap } */
/* { dg-options "-O2 -fdump-tree-bswap" } */
-/* { dg-additional-options "-march=z900" { target s390-*-* } } */
typedef unsigned char u8;
typedef unsigned int u32;
/* { dg-do compile } */
/* { dg-require-effective-target bswap } */
/* { dg-options "-O2 -fno-tree-vectorize -fdump-tree-optimized -fno-inline-functions" } */
-/* { dg-additional-options "-march=z900" { target s390-*-* } } */
struct L { unsigned int l[2]; };
union U { double a; struct L l; } u;
/* { dg-do compile } */
/* { dg-require-effective-target bswap } */
/* { dg-options "-O2 -fno-tree-vectorize -fdump-tree-store-merging" } */
-/* { dg-additional-options "-march=z900" { target s390-*-* } } */
typedef unsigned char u8;
typedef unsigned int u32;
/* { dg-do compile } */
/* { dg-require-effective-target bswap } */
/* { dg-options "-O2 -fno-tree-vectorize -fdump-tree-optimized" } */
-/* { dg-additional-options "-march=z900" { target s390-*-* } } */
static unsigned int
f1 (unsigned int x)
/* { dg-do compile { target fpic } } */
/* { dg-options "-O2 -fpic -g" } */
-/* { dg-additional-options "-m31" { target s390x-*-* } } */
typedef __SIZE_TYPE__ uintptr_t;
static __thread uintptr_t start_sp;
/* { dg-options "-O1 -ftree-loop-ivcanon -funroll-loops -fdump-tree-ivcanon-details -fdump-tree-cunroll-details -fdump-tree-optimized -mshort-calls" {target epiphany-*-*} } */
-/* On 31-bit S/390 the function address will be stored (once) in the literal pool,
- so scan-assembler-times "foo" will return 1 even if the loop is fully unrolled.
- -msmall-exec avoids this by enabling a call instruction with immediate operand. */
-/* { dg-options "-O1 -ftree-loop-ivcanon -funroll-loops -fdump-tree-ivcanon-details -fdump-tree-cunroll-details -fdump-tree-optimized -msmall-exec" { target s390-*-* } } */
-
/* On Darwin, we call extern functions via a stub in PIC mode which is default and
the stub is named after the function. To avoid this we use -static to go out
of PIC mode. */
if [ string match "*64*" $file_string ] {
set native_cflags "-xarch=amd64"
}
- }
- if [istarget "s390*-*-linux*"] {
- set file_string [exec file "linkage-x.o"]
- if [ string match "*32-bit*" $file_string ] {
- set native_cflags "-m31"
- }
- if [ string match "*64-bit*" $file_string ] {
- set native_cflags "-m64"
- }
} elseif {[istarget "i?86-*-linux*"] || [istarget "x86_64-*-linux*"]
|| [istarget "i?86-*-gnu*"] || [istarget "x86_64-*-gnu*"] } then {
set file_string [exec file "linkage-x.o"]
+++ /dev/null
-/* Make sure that LEGITIMIZE_ADDRESS is called to handle
- negative displacements. */
-
-/* { dg-do compile { target { s390-*-* } } } */
-/* { dg-options "-O2 -mesa" } */
-
-int test (int *addr)
-{
- return *(addr - 1);
-}
-
-/* { dg-final { scan-assembler "-4096" } } */
-/* { dg-final { scan-assembler-not "ahi" } } */
-
+++ /dev/null
-/* { dg-do compile { target { ! lp64 } } } */
-/* { dg-options "-O3 -mzarch" } */
-
-void
-foo ()
-{
- asm ("" ::: "%f4");
-}
-
-/* { dg-final { scan-assembler "ld" } } */
/* { dg-do run } */
-/* { dg-options "-O3 -march=z13 -mzarch --save-temps" } */
+/* { dg-options "-O3 -march=z13 --save-temps" } */
#include <stddef.h>
#include <limits.h>
/* { dg-final { scan-assembler-not "\tcgr" } } */
/* { dg-final { scan-assembler-not "\txgr" } } */
/* { dg-final { scan-assembler-not "\tngr" } } */
-/* On 31 bit the long long variants use risbgn to merge the 32 bit
- regs into a 64 bit reg. */
-/* { dg-final { scan-assembler-not "\trisbg" { target { lp64 } } } } */
+/* { dg-final { scan-assembler-not "\trisbg" } } */
/* Just one for the ret != 6 comparison. */
/* { dg-final { scan-assembler-times "ci" 1 } } */
-/* { dg-final { scan-assembler-times "\tlochio\t" 6 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "\tlocghio\t" 6 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "\tlocghio\t" 6 } } */
/* { dg-do run } */
-/* { dg-options "-O3 -march=z13 -mzarch --save-temps" } */
+/* { dg-options "-O3 -march=z13 --save-temps" } */
#include <stddef.h>
#include <limits.h>
/* { dg-final { scan-assembler-not "\tcgr" } } */
/* { dg-final { scan-assembler-not "\txgr" } } */
/* { dg-final { scan-assembler-not "\tngr" } } */
-/* On 31 bit the long long variants use risbgn to merge the 32 bit
- regs into a 64 bit reg. */
-/* { dg-final { scan-assembler-not "\trisbg" { target { lp64 } } } } */
+/* { dg-final { scan-assembler-not "\trisbg" } } */
/* Just one for the ret != 3 comparison. */
/* { dg-final { scan-assembler-times "ci" 1 } } */
-/* { dg-final { scan-assembler-times "\tlochio\t" 6 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "\tlocghio\t" 6 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "\tlocghio\t" 6 */
/* { dg-do compile } */
-/* { dg-final { scan-assembler {# 127 127 128 128 32767 32767 32768 32768 2147483647 2147483647 -2147483648 -2147483648} { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler {# 127 127 128 128 32767 32767 32768 32768 2147483647 2147483647 2147483648 2147483648 9223372036854775807 9223372036854775807 -9223372036854775808 -9223372036854775808} { target lp64 } } } */
+/* { dg-final { scan-assembler {# 127 127 128 128 32767 32767 32768 32768 2147483647 2147483647 2147483648 2147483648 9223372036854775807 9223372036854775807 -9223372036854775808 -9223372036854775808} } } */
void
test (void)
{
-#ifdef __s390x__
__asm__ __volatile__ ("# %0 %c0 %1 %c1 %2 %c2 %3 %c3 %4 %c4 %5 %c5 %6 %c6 %7 %c7" ::
"i" (0x7f),
"i" (0x80),
"i" (0x80000000L),
"i" (0x7fffffffffffffffL),
"i" (0x8000000000000000L));
-#else
- __asm__ __volatile__ ("# %0 %c0 %1 %c1 %2 %c2 %3 %c3 %4 %c4 %5 %c5" ::
- "i" (0x7f),
- "i" (0x80),
- "i" (0x7fff),
- "i" (0x8000),
- "i" (0x7fffffff),
- "i" (0x80000000L));
-#endif
}
/* { dg-do compile } */
-/* { dg-options "-O3 -march=z10 -mzarch -fPIC -mno-pic-data-is-text-relative" } */
+/* { dg-options "-O3 -march=z10 -fPIC -mno-pic-data-is-text-relative" } */
#include "call.h"
/* { dg-final { scan-assembler {brasl\t%r\d+,foo@PLT\n} } } */
-/* { dg-final { scan-assembler {lgrl\t%r2,foo@GOTENT\n} { target lp64 } } } */
-/* { dg-final { scan-assembler {lrl\t%r2,foo@GOTENT\n} { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler {lgrl\t%r2,foo@GOTENT\n} } } */
/* { dg-final { scan-assembler {brasl\t%r\d+,foostatic@PLT\n} } } */
/* { dg-final { scan-assembler {larl\t%r2,foostatic\n} } } */
/* { dg-final { scan-assembler {brasl\t%r\d+,fooweak@PLT\n} } } */
-/* { dg-final { scan-assembler {lgrl\t%r2,fooweak@GOTENT\n} { target lp64 } } } */
-/* { dg-final { scan-assembler {lrl\t%r2,fooweak@GOTENT\n} { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler {lgrl\t%r2,fooweak@GOTENT\n} } } */
-/* { dg-final { scan-assembler {foos:\n\t.quad\tfoo\n\t.quad\tfoostatic\n\t.quad\tfooweak\n} { target lp64 } } } */
-/* { dg-final { scan-assembler {foos:\n\t.long\tfoo\n\t.long\tfoostatic\n\t.long\tfooweak\n} { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler {foos:\n\t.quad\tfoo\n\t.quad\tfoostatic\n\t.quad\tfooweak\n} } } */
#include "call.h"
/* { dg-final { scan-assembler {brasl\t%r\d+,foo@PLT\n} } } */
-/* { dg-final { scan-assembler {lgrl\t%r2,foo@GOTENT\n} { target lp64 } } } */
-/* { dg-final { scan-assembler {lrl\t%r2,foo@GOTENT\n} { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler {lgrl\t%r2,foo@GOTENT\n} } } */
/* { dg-final { scan-assembler {brasl\t%r\d+,foostatic@PLT\n} } } */
/* { dg-final { scan-assembler {larl\t%r2,foostatic\n} } } */
/* { dg-final { scan-assembler {brasl\t%r\d+,fooweak@PLT\n} } } */
-/* { dg-final { scan-assembler {lgrl\t%r2,fooweak@GOTENT\n} { target lp64 } } } */
-/* { dg-final { scan-assembler {lrl\t%r2,fooweak@GOTENT\n} { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler {lgrl\t%r2,fooweak@GOTENT\n} } } */
-/* { dg-final { scan-assembler {foos:\n\t.quad\tfoo\n\t.quad\tfoostatic\n\t.quad\tfooweak\n} { target lp64 } } } */
-/* { dg-final { scan-assembler {foos:\n\t.long\tfoo\n\t.long\tfoostatic\n\t.long\tfooweak\n} { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler {foos:\n\t.quad\tfoo\n\t.quad\tfoostatic\n\t.quad\tfooweak\n} } } */
/* { dg-do compile } */
-/* { dg-options "-O3 -march=z10 -mzarch" } */
+/* { dg-options "-O3 -march=z10" } */
#include "call.h"
/* { dg-final { scan-assembler {brasl\t%r\d+,fooweak@PLT\n} } } */
/* { dg-final { scan-assembler {larl\t%r2,fooweak\n} } } */
-/* { dg-final { scan-assembler {foos:\n\t.quad\tfoo\n\t.quad\tfoostatic\n\t.quad\tfooweak\n} { target lp64 } } } */
-/* { dg-final { scan-assembler {foos:\n\t.long\tfoo\n\t.long\tfoostatic\n\t.long\tfooweak\n} { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler {foos:\n\t.quad\tfoo\n\t.quad\tfoostatic\n\t.quad\tfooweak\n} } } */
/* { dg-final { scan-assembler {brasl\t%r\d+,fooweak@PLT\n} } } */
/* { dg-final { scan-assembler {larl\t%r\d+,fooweak@GOTENT\n} } } */
-/* { dg-final { scan-assembler {foos:\n\t.quad\tfoo\n\t.quad\tfoostatic\n\t.quad\tfooweak\n} { target lp64 } } } */
-/* { dg-final { scan-assembler {foos:\n\t.long\tfoo\n\t.long\tfoostatic\n\t.long\tfooweak\n} { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler {foos:\n\t.quad\tfoo\n\t.quad\tfoostatic\n\t.quad\tfooweak\n} } } */
/* { dg-final { scan-assembler {brasl\t%r\d+,fooweak@PLT\n} } } */
/* { dg-final { scan-assembler {larl\t%r\d+,fooweak@GOTENT\n} } } */
-/* { dg-final { scan-assembler {foos:\n\t.quad\tfoo\n\t.quad\tfoostatic\n\t.quad\tfooweak\n} { target lp64 } } } */
-/* { dg-final { scan-assembler {foos:\n\t.long\tfoo\n\t.long\tfoostatic\n\t.long\tfooweak\n} { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler {foos:\n\t.quad\tfoo\n\t.quad\tfoostatic\n\t.quad\tfooweak\n} } } */
/* { dg-final { scan-assembler {brasl\t%r\d+,fooweak@PLT\n} } } */
/* { dg-final { scan-assembler {larl\t%r2,fooweak\n} } } */
-/* { dg-final { scan-assembler {foos:\n\t.quad\tfoo\n\t.quad\tfoostatic\n\t.quad\tfooweak\n} { target lp64 } } } */
-/* { dg-final { scan-assembler {foos:\n\t.long\tfoo\n\t.long\tfoostatic\n\t.long\tfooweak\n} { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler {foos:\n\t.quad\tfoo\n\t.quad\tfoostatic\n\t.quad\tfooweak\n} } } */
+++ /dev/null
-/* Make sure the dwarf reg size table doesn't change for 31 bit. */
-
-/* { dg-do compile { target { ! lp64 } } } */
-/* { dg-options "-mesa" } */
-
-#define DWARF_FRAME_REGISTERS 34
-
-static unsigned char dwarf_reg_size_table[DWARF_FRAME_REGISTERS + 1];
-static unsigned char ref_reg_size_table[DWARF_FRAME_REGISTERS + 1] =
- { 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 4, 4, 0 };
-
-int
-main ()
-{
- __builtin_init_dwarf_reg_size_table (dwarf_reg_size_table);
- if (__builtin_memcmp (ref_reg_size_table,
- dwarf_reg_size_table, DWARF_FRAME_REGISTERS + 1) != 0)
- __builtin_abort ();
- return 0;
-}
+++ /dev/null
-/* Make sure the dwarf reg size table doesn't change for 31 bit zarch. */
-
-/* { dg-do compile { target { ! lp64 } } } */
-/* { dg-options "-mzarch" } */
-
-#define DWARF_FRAME_REGISTERS 34
-
-static unsigned char dwarf_reg_size_table[DWARF_FRAME_REGISTERS + 1];
-static unsigned char ref_reg_size_table[DWARF_FRAME_REGISTERS + 1] =
- { 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 4, 4, 0 };
-
-int
-main ()
-{
- __builtin_init_dwarf_reg_size_table (dwarf_reg_size_table);
- if (__builtin_memcmp (ref_reg_size_table,
- dwarf_reg_size_table, DWARF_FRAME_REGISTERS + 1) != 0)
- __builtin_abort ();
- return 0;
-}
/* { dg-do compile } */
-/* { dg-options "-O3 -mzarch -fcall-saved-r4" } */
+/* { dg-options "-O3 -fcall-saved-r4" } */
void test(void) {
asm volatile("nop" ::: "r4");
}
-/* { dg-final { scan-assembler-times "\tstg\t" 1 { target { lp64 } } } } */
-/* { dg-final { scan-assembler-times "\tlg\t" 1 { target { lp64 } } } } */
-/* { dg-final { scan-assembler-times "\tst\t" 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "\tl\t" 1 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times "\tstg\t" 1 } } */
+/* { dg-final { scan-assembler-times "\tlg\t" 1 } } */
+++ /dev/null
-/* Test for the 32 bit fp to 64 bit int conversion routines.
-
- On S/390 32 bit we use our own implementations in order to be IEEE
- complaint as we are with our machine instructions. These missed to
- throw FE_INVALID exceptions in a bunch of cases. */
-
-/* { dg-do run { target s390-*-* } } */
-/* { dg-options "-O3 -mesa" } */
-/* { dg-require-effective-target fenv_exceptions } */
-
-#define _GNU_SOURCE
-#include <stdlib.h>
-#include <stdio.h>
-#include <fenv.h>
-
-#define INFINITYf (__builtin_inff())
-#define INFINITY (__builtin_inf())
-#define INFINITYl (__builtin_infl())
-#define NANf (__builtin_nanf (""))
-#define NAN (__builtin_nan (""))
-#define NANl (__builtin_nanl (""))
-
-#define TESTEXCEPT_FUNC(FUNC, TYPE_FROM, TYPE_TO) \
- TYPE_TO \
- __attribute__((noinline)) FUNC (TYPE_FROM a) \
- { \
- asm volatile ("" : : "f" (a)); \
- return (TYPE_TO)a; \
- }
-
-#define TESTEXCEPT(FUNC, EXCEPT, EXPECT, VALUE, TYPE_TO) \
- { \
- TYPE_TO b; \
- feclearexcept (FE_ALL_EXCEPT); \
- b = FUNC (VALUE); \
- if ((fetestexcept (EXCEPT) & (EXCEPT)) != EXPECT) \
- { \
- printf ("FAIL in line: %d\n", __LINE__); \
- abort (); \
- } \
- }
-
-#define TESTEXCEPT_FUNC_ALLFLOATS(FUNC, TYPE_TO) \
- TESTEXCEPT_FUNC (FUNC##_f, float, TYPE_TO); \
- TESTEXCEPT_FUNC (FUNC##_d, double, TYPE_TO); \
- TESTEXCEPT_FUNC (FUNC##_l, long double, TYPE_TO); \
-
-#define TESTEXCEPT_ALLFLOATS(FUNC, EXCEPT, EXPECT, VALUE, TYPE_TO) \
- TESTEXCEPT (FUNC##_f, EXCEPT, EXPECT, VALUE##f, TYPE_TO); \
- TESTEXCEPT (FUNC##_d, EXCEPT, EXPECT, VALUE, TYPE_TO); \
- TESTEXCEPT (FUNC##_l, EXCEPT, EXPECT, VALUE##l, TYPE_TO); \
-
-TESTEXCEPT_FUNC_ALLFLOATS (a, unsigned long long);
-TESTEXCEPT_FUNC_ALLFLOATS (u, long long);
-
-
-int
-main ()
-{
- /* Prevent getting signals. */
- fedisableexcept (FE_INVALID);
-
- /* To unsigned long long */
-
- TESTEXCEPT_ALLFLOATS (a, FE_INVALID, FE_INVALID, INFINITY, unsigned long long);
- TESTEXCEPT_ALLFLOATS (a, FE_INVALID, FE_INVALID, -INFINITY, unsigned long long);
- TESTEXCEPT_ALLFLOATS (a, FE_INVALID, FE_INVALID, NAN, unsigned long long);
- TESTEXCEPT_ALLFLOATS (a, FE_INVALID, FE_INVALID, -NAN, unsigned long long);
-
- /* Negative values >-1.0 must not cause FE_INVALID. */
- TESTEXCEPT_ALLFLOATS (a, FE_INVALID, 0, -0x0.ffffffp0, unsigned long long);
- /* -1.0 instead must. */
- TESTEXCEPT_ALLFLOATS (a, FE_INVALID, FE_INVALID, -0x1.0p+0, unsigned long long);
- TESTEXCEPT_ALLFLOATS (a, FE_INVALID, 0, 0x1.0p+63, unsigned long long);
- TESTEXCEPT_ALLFLOATS (a, FE_INVALID, FE_INVALID, 0x1.0p+64, unsigned long long);
-
- /* To signed long long */
-
- TESTEXCEPT_ALLFLOATS (u, FE_INVALID, FE_INVALID, INFINITY, long long);
- TESTEXCEPT_ALLFLOATS (u, FE_INVALID, FE_INVALID, -INFINITY, long long);
- TESTEXCEPT_ALLFLOATS (u, FE_INVALID, FE_INVALID, NAN, long long);
- TESTEXCEPT_ALLFLOATS (u, FE_INVALID, FE_INVALID, -NAN, long long);
-
- TESTEXCEPT_ALLFLOATS (u, FE_INVALID, 0, -0x1.0p+63, long long);
- TESTEXCEPT_ALLFLOATS (u, FE_INVALID, FE_INVALID, -0x1.1p+63, long long);
- TESTEXCEPT_ALLFLOATS (u, FE_INVALID, 0, 0x0.fffffp+63, long long);
- TESTEXCEPT_ALLFLOATS (u, FE_INVALID, FE_INVALID, 0x1.0p+63, long long);
-
- /* If there are additional bits which would not make it into the
- integer value no exception is supposed to occur. */
- TESTEXCEPT (u_l, FE_INVALID, 0, -0x1.000000000000000123p+63l, long long);
- TESTEXCEPT (u_l, FE_INVALID, FE_INVALID, -0x1.000000000000000223p+63l, long long);
-
- return 0;
-}
/* Test accesses to global array elements in PIC code. */
/* { dg-do compile } */
-/* { dg-options "-O1 -march=z10 -mzarch -fPIC" } */
+/* { dg-options "-O1 -march=z10 -fPIC" } */
extern char a[] __attribute__ ((aligned (2)));
extern char *b;
void c()
{
b = a + 4;
- /* { dg-final { scan-assembler "(?n)\n\tlgrl\t%r\\d+,a@GOTENT\n" { target lp64 } } } */
- /* { dg-final { scan-assembler "(?n)\n\tlrl\t%r\\d+,a@GOTENT\n" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "(?n)\n\tlgrl\t%r\\d+,a@GOTENT\n" } } */
/* { dg-final { scan-assembler-not "(?n)\n\tlarl\t%r\\d+,a\[^@\]" } } */
}
}
/* The functions foo3, foo4, foo3b, foo4b no longer use risbg but rosbg instead.
-
- On 64 bit, four risbg go away and four new ones appear in other functions
- { dg-final { scan-assembler-times "risbg" 6 { target { lp64 } } } }
-
- ... but not on 31 bit.
- { dg-final { scan-assembler-times "risbg" 2 { target { ! lp64 } } } }
-*/
+ { dg-final { scan-assembler-times "risbg" 6 } } */
#include "isfinite-isinf-isnormal-signbit.h"
-/* { dg-final { scan-assembler-times {tcxb\t%f[0-9]+,1365} 0 { target lp64 } } } SIGNBIT long double */
-/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,1365} 0 { target lp64 } } } SIGNBIT _Decimal128 */
-/* { dg-final { scan-assembler-times {tcxb\t%f[0-9]+,1365} 1 { target { ! lp64 } } } } SIGNBIT long double */
-/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,1365} 1 { target { ! lp64 } } } } SIGNBIT _Decimal128 */
+/* { dg-final { scan-assembler-times {tcxb\t%f[0-9]+,1365} 0 } } SIGNBIT long double */
+/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,1365} 0 } } SIGNBIT _Decimal128 */
/* { dg-final { scan-assembler-times {tcxb\t%f[0-9]+,4032} 1 } } ISFINITE long double */
/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,4032} 1 } } ISFINITE _Decimal128 */
/* { dg-final { scan-assembler-times {tcxb\t%f[0-9]+,48} 1 } } ISINF long double */
#include "isfinite-isinf-isnormal-signbit.h"
-/* { dg-final { scan-assembler-times {wftcixb\t%v[0-9]+,%v[0-9]+,1365} 0 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,1365} 0 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {wftcixb\t%v[0-9]+,%v[0-9]+,1365} 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,1365} 1 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times {wftcixb\t%v[0-9]+,%v[0-9]+,1365} 0 } } */
+/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,1365} 0 } } */
/* { dg-final { scan-assembler-times {wftcixb\t%v[0-9]+,%v[0-9]+,4032} 1 } } */
/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,4032} 1 } } */
/* { dg-final { scan-assembler-times {wftcixb\t%v[0-9]+,%v[0-9]+,48} 1 } } */
/* Check if load-address-relative instructions are created */
-/* { dg-do compile { target { s390*-*-* } } } */
+/* { dg-do compile } */
/* { dg-options "-O2 -march=z10 -mzarch -fno-section-anchors" } */
/* An explicitly misaligned symbol. This symbol is NOT aligned as
mandated by our ABI. However, the back-end needs to handle that in
order to make things like __attribute__((packed)) work. The symbol
address is expected to be loaded from literal pool. */
-/* { dg-final { scan-assembler "lgrl\t%r2," { target { lp64 } } } } */
-/* { dg-final { scan-assembler "lrl\t%r2," { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler "lgrl\t%r2," } } */
extern char align1 __attribute__((aligned(1)));
/* { dg-final { scan-assembler "larl\t%r2,align2" } } */
{
}
/* Make sure no stack frame is generated. */
-/* { dg-final { scan-assembler-not "ahi" { target s390-*-* } } } */
/* { dg-final { scan-assembler-not "aghi" { target s390x-*-* } } } */
/* Check if load-relative instructions are created */
-/* { dg-do compile { target { s390*-*-* } } } */
+/* { dg-do compile } */
/* { dg-options "-O2 -march=z10 -mzarch -fno-section-anchors" } */
-/* { dg-final { scan-assembler "lgfrl\t%r.?,b.4" { target { lp64 } } } } */
-/* { dg-final { scan-assembler "lgfrl\t%r.?,s.12" { target { lp64 } } } } */
-/* { dg-final { scan-assembler "lgrl\t%r.?,s" { target { lp64 } } } } */
-
-/* { dg-final { scan-assembler "lrl\t%r.?,b.4" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "lrl\t%r.?,s.8" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "lrl\t%r.?,s" { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler "lgfrl\t%r.?,b.4" } } */
+/* { dg-final { scan-assembler "lgfrl\t%r.?,s.12" } } */
+/* { dg-final { scan-assembler "lgrl\t%r.?,s" } } */
int b[20];
c(b);
}
-/* { dg-final { scan-assembler-times {\n\tear\t} 2 { target { lp64 } } } } */
-/* { dg-final { scan-assembler-times {\n\tear\t} 1 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times {\n\tear\t} 2 } } */
return (foo = __builtin_thread_pointer());
}
-/* { dg-final { scan-assembler-times {\n\tear\t} 2 { target { lp64 } } } } */
-/* { dg-final { scan-assembler-times {\n\tear\t} 1 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times {\n\tear\t} 2 } } */
rc = val;
return rc;
}
-/* { dg-final { scan-assembler "\tlocgrne\t%r2,%r4" { target { lp64 } } } } */
-/* { dg-final { scan-assembler "\tlocrne\t%r2,%r4" { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler "\tlocgrne\t%r2,%r4" } } */
long loc_hi (long rc, long cond)
{
rc = (long)-1;
return rc;
}
-/* { dg-final { scan-assembler "\tlocghine\t%r2,-1" { target { lp64 } } } } */
-/* { dg-final { scan-assembler "\tlochine\t%r2,-1" { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler "\tlocghine\t%r2,-1" } } */
__attribute__ ((noinline))
unsigned int andc_vv(unsigned int a, unsigned int b)
{ return ~b & a; }
-/* { dg-final { scan-assembler ":18:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
+/* { dg-final { scan-assembler ":18:.\* \{\\*andsi3\}" } } */
/* { dg-final { scan-assembler ":18:.\* \{\\*xorsi3\}" } } */
__attribute__ ((noinline))
unsigned int andc_pv(unsigned int *a, unsigned int b)
{ return ~b & *a; }
-/* { dg-final { scan-assembler ":24:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
+/* { dg-final { scan-assembler ":24:.\* \{\\*andsi3\}" } } */
/* { dg-final { scan-assembler ":24:.\* \{\\*xorsi3\}" } } */
__attribute__ ((noinline))
unsigned int andc_vp(unsigned int a, unsigned int *b)
{ return ~*b & a; }
-/* { dg-final { scan-assembler ":30:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
+/* { dg-final { scan-assembler ":30:.\* \{\\*andsi3\}" } } */
/* { dg-final { scan-assembler ":30:.\* \{\\*xorsi3\}" } } */
__attribute__ ((noinline))
unsigned int andc_pp(unsigned int *a, unsigned int *b)
{ return ~*b & *a; }
-/* { dg-final { scan-assembler ":36:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
+/* { dg-final { scan-assembler ":36:.\* \{\\*andsi3\}" } } */
/* { dg-final { scan-assembler ":36:.\* \{\\*xorsi3\}" } } */
/* { dg-final { scan-assembler-times "\tng\?r\?k\?\t" 4 } } */
+++ /dev/null
-/* { dg-do compile } */
-/* { dg-options "-m31 -mzarch -pg -mnop-mcount" } */
-
-void
-profileme (void)
-{
- /* { dg-final { scan-assembler "NOPs for -mnop-mcount \\(7 halfwords\\)\n.*brcl\t0,0\n.*brcl\t0,0\n.*bcr\t0,0" } } */
-}
profileme (void)
{
/* { dg-final { scan-assembler ".section __mcount_loc, \"a\",@progbits" } } */
- /* { dg-final { scan-assembler ".long 1b" { target { ! lp64 } } } } */
- /* { dg-final { scan-assembler ".quad 1b" { target { lp64 } } } } */
+ /* { dg-final { scan-assembler ".quad 1b" } } */
/* { dg-final { scan-assembler ".previous" } } */
}
/* { dg-final { scan-assembler-not "\tcgr" } } */
/* { dg-final { scan-assembler-not "\txgr" } } */
/* { dg-final { scan-assembler-not "\tngr" } } */
-/* On 31 bit the long long variants use risbgn to merge the 32 bit
- regs into a 64 bit reg. */
-/* { dg-final { scan-assembler-not "\trisbg" { target { lp64 } } } } */
+/* { dg-final { scan-assembler-not "\trisbg" } } */
/* Just one for the ret != 3 comparison. */
/* { dg-final { scan-assembler-times "ci" 1 } } */
-/* { dg-final { scan-assembler-times "\tlochio\t" 3 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "\tlocghio\t" 3 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "\tlocghio\t" 3 } } */
/* { dg-final { scan-assembler-not "\tngr" } } */
/* On 31 bit the long long variants use risbgn to merge the 32 bit
regs into a 64 bit reg. */
-/* { dg-final { scan-assembler-not "\trisbg" { target { lp64 } } } } */
+/* { dg-final { scan-assembler-not "\trisbg" } } */
/* Just one for the ret != 3 comparison. */
/* { dg-final { scan-assembler-times "ci" 1 } } */
-/* { dg-final { scan-assembler-times "\tlochio\t" 3 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "\tlocghio\t" 3 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "\tlocghio\t" 3 } } */
return ~a;
}
-/* { dg-final { scan-assembler-times "\tnngrk\t" 1 { target { lp64 } } } } */
-/* { dg-final { scan-assembler-times "\tnnrk\t" 1 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times "\tnngrk\t" 1 } } */
+++ /dev/null
-/* { dg-do compile } */
-/* { dg-options "-O2 -m31 -mesa" } */
-
-struct squashfs_reg_inode_header_1 read_inode_inode;
-
-int read_inode_val;
-
-struct squashfs_reg_inode_header_1
-{
- int file_size:32;
-} __attribute__((packed)) read_inode ();
-
-void foo (void)
-{
- read_inode_inode.file_size = read_inode_val;
-}
+++ /dev/null
-/* { dg-do compile { target { s390-*-* } } } */
-/* { dg-options "-foptimize-sibling-calls -mzarch" } */
-/* { dg-final { scan-assembler {brasl\t%r\d+,bar} } } */
-
-/* This tests function s390_call_saved_register_used where
- GET_CODE (parm_rtx) == PARALLEL holds. */
-
-#include "pr106355.h"
+++ /dev/null
-/* { dg-do compile { target { s390-*-* } } } */
-/* { dg-options "-foptimize-sibling-calls -mesa" } */
-/* { dg-final { scan-assembler {brasl\t%r\d+,bar} } } */
-
-/* This tests function s390_call_saved_register_used where
- REG_P (parm_rtx) and nregs == 2 holds. */
-
-#include "pr106355.h"
+++ /dev/null
-/* PR target/119873 */
-/* { dg-do compile } */
-/* { dg-options "-O2 -m31 -mzarch" } */
-
-extern void foo (int x, int y, int z, long long w, int v);
-
-void
-bar (int x, int y, int z, long long w, int v)
-{
- [[gnu::musttail]] return foo (x, y, z, w, v);
-}
/* { dg-do compile } */
/* { dg-options "-O0 -Wno-implicit-function-declaration" } */
+#ifdef __tpf__
+
typedef char* __char_ptr32 __attribute__ (( mode (SI) ));
typedef __char_ptr32 *__char_ptr_char_ptr32 __attribute__ ((mode (SI)));
}
+#endif
+++ /dev/null
-/* This testcase is extracted from s390_emit_prologue. The negation
- of a 64bit value got split incorrectly on 31 bit. */
-
-/* { dg-do run { target { ! lp64 } } } */
-/* { dg-options "-O2 -mesa" } */
-
-extern void abort (void);
-
-long long frame_size = 42;
-
-int __attribute__((noinline))
-foo (int a __attribute__((unused)), long long b)
-{
- return (int)b;
-}
-
-int
-main ()
-{
- if (frame_size > 0)
- {
- if (foo (0, -frame_size) != -42)
- abort ();
- }
- return 0;
-}
return a + c + (int)d + (int)e;
}
-/* { dg-final { scan-assembler "stmg\t%r2,%r4,\[0-9\]*\\(%r15\\)" { target lp64 } } } */
-/* { dg-final { scan-assembler "stm\t%r2,%r4,\[0-9\]*\\(%r15\\)" { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler "stmg\t%r2,%r4,\[0-9\]*\\(%r15\\)" } } */
/* { dg-final { scan-assembler "std\t%f0,\[0-9\]*\\(%r15\\)" } } */
/* { dg-final { scan-assembler "std\t%f2,\[0-9\]*\\(%r15\\)" } } */
return a + c + va_arg(argp, int) + va_arg(argp, int) + (int)va_arg(argp, double);
}
-/* { dg-final { scan-assembler "stmg\t%r2,%r15,\[0-9\]*\\(%r15\\)" { target lp64 } } } */
-/* { dg-final { scan-assembler "stm\t%r2,%r15,\[0-9\]*\\(%r15\\)" { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler "stmg\t%r2,%r15,\[0-9\]*\\(%r15\\)" } } */
/* { dg-final { scan-assembler "std\t%f0,\[0-9\]*\\(%r15\\)" } } */
/* { dg-final { scan-assembler "std\t%f2,\[0-9\]*\\(%r15\\)" } } */
// ...and again with i64.
i64 f2 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f2:\n\trisbg\t%r2,%r2,64-1,128\\\+63,53\\\+1" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f2:\n\trisbg\t%r3,%r3,64-1,128\\\+63,53\\\+1\n\tlhi\t%r2,0" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f2:\n\trisbg\t%r2,%r2,64-1,128\\\+63,53\\\+1" } } */
i64 v_shr = ((ui64)v_foo) >> 10;
i64 v_and = v_shr & 1;
return v_and;
// ...and again with i64.
i64 f4 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f4:\n\trisbg\t%r2,%r2,60,128\\\+61,64-22" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f4:\n\trisbg\t%r3,%r3,60,128\\\+61,64-22\n\tlhi\t%r2,0" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f4:\n\trisbg\t%r2,%r2,60,128\\\+61,64-22" } } */
i64 v_shr = ((ui64)v_foo) >> 22;
i64 v_and = v_shr & 12;
return v_and;
// ...and again with i64.
i64 f6 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f6:\n\trisbg\t%r2,%r2,2,128\\\+60,64-2" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f6:\n\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\trisbg\t%r2,%r3,2,128\\\+60,64-2" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f6:\n\trisbg\t%r2,%r2,2,128\\\+60,64-2" } } */
i64 v_shr = ((ui64)v_foo) >> 2;
i64 v_and = v_shr & -8;
return v_and;
/* Should be
{ dg-final { scan-assembler "f7:\n\tsrl\t%r2,2\n\tnill\t%r2,65529" { xfail { lp64 } } } }
but because a zeroextend is merged into the pattern it is actually
- { dg-final { scan-assembler "f7:\n\tsrl\t%r2,2\n\tlgfi\t%r1,1073741817\n\tngr\t%r2,%r1" { target { lp64 } } } }
- { dg-final { scan-assembler "f7:\n\tsrl\t%r2,2\n\tnill\t%r2,65529" { target { ! lp64 } } } } */
+ { dg-final { scan-assembler "f7:\n\tsrl\t%r2,2\n\tlgfi\t%r1,1073741817\n\tngr\t%r2,%r1" } } */
i32 v_shr = ((ui32)v_foo) >> 2;
i32 v_and = v_shr & -7;
return v_and;
// ...and again with i64.
i64 f8 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f8:\n\tsrlg\t%r2,%r2,2\n\tnill\t%r2,65529" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f8:\n\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\tsrlg\t%r2,%r3,2\n\tnill\t%r2,65529" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f8:\n\tsrlg\t%r2,%r2,2\n\tnill\t%r2,65529" } } */
i64 v_shr = ((ui64)v_foo) >> 2;
i64 v_and = v_shr & -7;
return v_and;
// ...and again with i64.
i64 f10 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f10:\n\trisbg\t%r2,%r2,56,128\\\+61,2" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f10:\n\trisbg\t%r3,%r3,56,128\\\+61,2\n\tlhi\t%r2,0" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f10:\n\trisbg\t%r2,%r2,56,128\\\+61,2" } } */
i64 v_shr = v_foo << 2;
i64 v_and = v_shr & 255;
return v_and;
// ...and again with i64.
i64 f12 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f12:\n\tsllg\t%r2,%r2,2\n\tnill\t%r2,65295" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f12:\n\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\tsllg\t%r2,%r3,2\n\tnill\t%r2,65295" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f12:\n\tsllg\t%r2,%r2,2\n\tnill\t%r2,65295" } } */
i64 v_shr = v_foo << 2;
i64 v_and = v_shr & -241;
return v_and;
// shl are not used.
i32 f13 (i32 v_foo)
{
- /* { dg-final { scan-assembler "f13:\n\trisbg\t%r2,%r2,56,128\\\+60,32\\\+14" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f13:\n\trll\t%r2,%r2,14\n\tnilf\t%r2,248" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f13:\n\trisbg\t%r2,%r2,56,128\\\+60,32\\\+14" } } */
i32 v_parta = v_foo << 14;
i32 v_partb = ((ui32)v_foo) >> 18;
i32 v_rotl = v_parta | v_partb;
// ...and again with i64.
i64 f14 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f14:\n\trisbg\t%r2,%r2,56,128\\\+60,14" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f14:\n\trisbg\t%r3,%r2,56,128\\\+60,46\n\tlhi\t%r2,0" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f14:\n\trisbg\t%r2,%r2,56,128\\\+60,14" } } */
i64 v_parta = v_foo << 14;
i64 v_partb = ((ui64)v_foo) >> 50;
i64 v_rotl = v_parta | v_partb;
// Try a case in which only the bits from the shl are used.
i32 f15 (i32 v_foo)
{
- /* { dg-final { scan-assembler "f15:\n\trisbg\t%r2,%r2,47,128\\\+49,14" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f15:\n\trll\t%r2,%r2,14\n\tnilf\t%r2,114688" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f15:\n\trisbg\t%r2,%r2,47,128\\\+49,14" } } */
i32 v_parta = v_foo << 14;
i32 v_partb = ((ui32)v_foo) >> 18;
i32 v_rotl = v_parta | v_partb;
// ...and again with i64.
i64 f16 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f16:\n\trisbg\t%r2,%r2,47,128\\\+49,14" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f16:\n\trisbg\t%r3,%r3,47,128\\\+49,14\n\tlhi\t%r2,0" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f16:\n\trisbg\t%r2,%r2,47,128\\\+49,14" } } */
i64 v_parta = v_foo << 14;
i64 v_partb = ((ui64)v_foo) >> 50;
i64 v_rotl = v_parta | v_partb;
/* Should be
{ dg-final { scan-assembler "f17:\n\trll\t%r2,%r2,4\n\tnilf\t%r2,126" { xfail { lp64 } } } }
but because a zeroextend is merged into the pattern it is actually
- { dg-final { scan-assembler "f17:\n\trll\t%r2,%r2,4\n\trisbg\t%r2,%r2,57,128\\\+62,0" { target { lp64 } } } }
- { dg-final { scan-assembler "f17:\n\trll\t%r2,%r2,4\n\tnilf\t%r2,126" { target { ! lp64 } } } } */
+ { dg-final { scan-assembler "f17:\n\trll\t%r2,%r2,4\n\trisbg\t%r2,%r2,57,128\\\+62,0" } } */
i32 v_parta = v_foo << 4;
i32 v_partb = ((ui32)v_foo) >> 28;
i32 v_rotl = v_parta | v_partb;
// ...and for i64, where RISBG should do the rotate too.
i64 f18 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f18:\n\trisbg\t%r2,%r2,57,128\\\+62,4" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f18:\n\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\tlhi\t%r2,0\n\trisbg\t%r3,%r3,57,128\\\+62,4" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f18:\n\trisbg\t%r2,%r2,57,128\\\+62,4" } } */
i64 v_parta = v_foo << 4;
i64 v_partb = ((ui64)v_foo) >> 60;
i64 v_rotl = v_parta | v_partb;
// This needs a separate shift and mask on 31 bit.
i32 f19 (i32 v_foo)
{
- /* { dg-final { scan-assembler "f19:\n\trisbg\t%r2,%r2,59,128\\+62,64-28" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f19:\n\tsra\t%r2,28\n\tnilf\t%r2,30" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f19:\n\trisbg\t%r2,%r2,59,128\\+62,64-28" } } */
i32 v_shr = v_foo >> 28;
i32 v_and = v_shr & 30;
return v_and;
// ...and again with i64. In this case RISBG is the best way of doing the AND.
i64 f20 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f20:\n\tsrag\t%r2,%r2,60\n\trisbg\t%r2,%r2,59,128\\\+62,0" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f20:\n\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\tlhi\t%r2,0\n\tsrag\t%r3,%r3,60\n\tnilf\t%r3,30" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f20:\n\tsrag\t%r2,%r2,60\n\trisbg\t%r2,%r2,59,128\\\+62,0" } } */
i64 v_shr = v_foo >> 60;
i64 v_and = v_shr & 30;
return v_and;
// ...and again with i64.
i64 f22 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f22:\n\trisbg\t%r2,%r2,60,128\\\+62,64-60" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f22:\n\trisbg\t%r3,%r2,60,128\\\+62,64-28\n\tlhi\t%r2,0" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f22:\n\trisbg\t%r2,%r2,60,128\\\+62,64-60" } } */
i64 v_shr = v_foo >> 60;
i64 v_and = v_shr & 14;
return v_and;
// natural zero extension.
i64 f23 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f23:\n\trisbg\t%r2,%r2,64-8,128\\\+63,54\\\+8" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f23:\n\trisbg\t%r3,%r3,64-8,128\\\+63,54\\\+8\n\tlhi\t%r2,0" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f23:\n\trisbg\t%r2,%r2,64-8,128\\\+63,54\\\+8" } } */
i64 v_shr = ((ui64)v_foo) >> 2;
i64 v_and = v_shr & 255;
return v_and;
// ...and again with i64, where a single RISBG is enough.
i64 f25 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f25:\n\trisbg\t%r2,%r2,57,128\\\+59,3" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f25:\n\trisbg\t%r3,%r3,57,128\\\+59,3\n\tlhi\t%r2,0" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f25:\n\trisbg\t%r2,%r2,57,128\\\+59,3" } } */
i64 v_and = v_foo & 14;
i64 v_parta = v_and << 3;
i64 v_partb = ((ui64)v_and) >> 61;
// ...and again with i64, where a single RISBG is OK.
i64 f27 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f27:\n\trisbg\t%r2,%r2,55,128\\\+52,5" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f27:\n\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\trisbg\t%r2,%r3,55,128\\\+52,5" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f27:\n\trisbg\t%r2,%r2,55,128\\\+52,5" } } */
i64 v_and = v_foo & -49;
i64 v_parta = v_and << 5;
i64 v_partb = ((ui64)v_and) >> 59;
// ...and again with i64.
i64 f29 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f29:\n\trisbg\t%r2,%r2,0,128\\\+13,49" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f29:\n\trisbg\t%r\[23\],%r3,0,128\\\+13,49\n\tlr\t%r\[23\],%r\[32\]\n\tsrlg\t%r2,%r2" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f29:\n\trisbg\t%r2,%r2,0,128\\\+13,49" } } */
i64 v_and = v_foo & 32766;
i64 v_shl = v_and << 49;
return v_shl;
// ...and again with i64.
i64 f31 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f31:\n\trisbg\t%r2,%r2,0,128\\\+12,50" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f31:\n\trisbg\t%r\[23\],%r3,0,128\\\+12,50\n\tlr\t%r\[23\],%r\[32\]\n\tsrlg\t%r2,%r2" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f31:\n\trisbg\t%r2,%r2,0,128\\\+12,50" } } */
i64 v_and = v_foo & 32766;
i64 v_shl = v_and << 50;
return v_shl;
// ...and again with i64.
i64 f33 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f33:\n\tsllg\t%r2,%r2,10\n\tnill\t%r2,58368" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f33:\n\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\tsllg\t%r2,%r3,10\n\tnill\t%r2,58368" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f33:\n\tsllg\t%r2,%r2,10\n\tnill\t%r2,58368" } } */
i64 v_and = v_foo & -7;
i64 v_shl = v_and << 10;
return v_shl;
// ...and again with i64.
i64 f35 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f35:\n\trisbg\t%r2,%r2,64-7,128\\\+63,48\\\+7" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f35:\n\trisbg\t%r3,%r3,64-7,128\\\+63,48\\\+7\n\tlhi\t%r2,0" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f35:\n\trisbg\t%r2,%r2,64-7,128\\\+63,48\\\+7" } } */
i64 v_and = v_foo & 65535;
i64 v_shl = ((ui64)v_and) >> 9;
return v_shl;
// We can't use RISBG for the shift in that case.
i32 f36 (i32 v_foo)
{
- /* { dg-final { scan-assembler "f36:\n\tsrl\t%r2,1\n\tlgfi\t%r1,2147483635\n\tngr\t%r2,%r1" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f36:\n\tsrl\t%r2,1\n\tnilf\t%r2,2147483635" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f36:\n\tsrl\t%r2,1\n\tlgfi\t%r1,2147483635\n\tngr\t%r2,%r1" } } */
i32 v_and = v_foo & -25;
i32 v_shl = ((ui32)v_and) >> 1;
return v_shl;
// ...and again with i64.
i64 f37 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f37:\n\(\t.*\n\)*\tsrlg\t%r2,%r2,1\n\tng\t%r2," { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f37:\n\(\t.*\n\)*\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\tsrlg\t%r2,%r3,1\n\tng\t%r2," { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f37:\n\(\t.*\n\)*\tsrlg\t%r2,%r2,1\n\tng\t%r2," } } */
i64 v_and = v_foo & -25;
i64 v_shl = ((ui64)v_and) >> 1;
return v_shl;
// use RISBG there.
i64 f38 (i64 v_foo)
{
- /* { dg-final { scan-assembler "f38:\n\tsrag\t%r2,%r2,32\n\tsllg\t%r2,%r2,5" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f38:\n\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\tsrag\t%r2,%r3,32\n\tsllg\t%r2,%r2,5" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f38:\n\tsrag\t%r2,%r2,32\n\tsllg\t%r2,%r2,5" } } */
i64 v_ashr = v_foo >> 32;
i64 v_shl = v_ashr << 5;
return v_shl;
// Try a similar thing in which no shifted sign bits are kept.
i64 f39 (i64 v_foo, i64 *v_dest)
{
- /* { dg-final { scan-assembler "f39:\n\tsrag\t%r2,%r2,35\n\(\t.*\n\)*\trisbg\t%r2,%r2,33,128\\\+61,2" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f39:\n\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\tlhi\t%r2,0\n\tsrag\t%r3,%r3,35\n\(\t.*\n\)*\trisbg\t%r3,%r3,33,128\\\+61,2" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f39:\n\tsrag\t%r2,%r2,35\n\(\t.*\n\)*\trisbg\t%r2,%r2,33,128\\\+61,2" } } */
i64 v_ashr = v_foo >> 35;
*v_dest = v_ashr;
i64 v_shl = v_ashr << 2;
// ...and again with the next highest shift value, where one sign bit is kept.
i64 f40 (i64 v_foo, i64 *v_dest)
{
- /* { dg-final { scan-assembler "f40:\n\tsrag\t%r2,%r2,36\n\(\t.*\n\)*\trisbg\t%r2,%r2,33,128\\\+61,2" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f40:\n\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\tlhi\t%r2,0\n\tsrag\t%r3,%r3,36\n\(\t.*\n\)*\trisbg\t%r3,%r3,33,128\\\+61,2" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f40:\n\tsrag\t%r2,%r2,36\n\(\t.*\n\)*\trisbg\t%r2,%r2,33,128\\\+61,2" } } */
i64 v_ashr = v_foo >> 36;
*v_dest = v_ashr;
i64 v_shl = v_ashr << 2;
// Check a case where the result is zero-extended.
i64 f41 (i32 v_a)
{
- /* { dg-final { scan-assembler "f41:\n\trisbg\t%r2,%r2,64-28,128\\\+63,34\\\+28" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f41:\n\trisbg\t%r3,%r2,64-28,128\\\+63,34\\\+28\n\tlhi\t%r2,0" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f41:\n\trisbg\t%r2,%r2,64-28,128\\\+63,34\\\+28" } } */
i32 v_shl = v_a << 2;
i32 v_shr = ((ui32)v_shl) >> 4;
i64 v_ext = (ui64)v_shr;
typedef struct { ui64 pad : 63; ui8 a : 1; } t42;
i64 f42 (t42 v_x)
{
- /* { dg-final { scan-assembler "f42:\n\tsllg\t%r2,%r2,63\n\tsrag\t%r2,%r2,63\n\tllgcr\t%r2,%r2" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f42:\n\tsllg\t%r3,%r3,63\n\tlhi\t%r2,0\n\tsrag\t%r3,%r3,63\n\tllcr\t%r3,%r3" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f42:\n\tsllg\t%r2,%r2,63\n\tsrag\t%r2,%r2,63\n\tllgcr\t%r2,%r2" } } */
ui8 a = v_x.a << 7;
i8 ext = ((i8)a) >> 7;
i64 ext2 = (ui64)(ui8)ext;
// Check that we get the case where a 64-bit shift is used by a 32-bit and.
i32 f43 (i64 v_x)
{
- /* { dg-final { scan-assembler "f43:\n\trisbg\t%r2,%r2,32,128\\+61,32\\+20\n\tlgfr\t%r2,%r2" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f43:\n\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\trisbg\t%r2,%r3,32,128\\\+61,64-12" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f43:\n\trisbg\t%r2,%r2,32,128\\+61,32\\+20\n\tlgfr\t%r2,%r2" } } */
i64 v_shr3 = ((ui64)v_x) >> 12;
i32 v_shr3_tr = (ui32)v_shr3;
i32 v_conv = v_shr3_tr & -4;
// Check that we don't get the case where the 32-bit and mask is not contiguous
i32 f44 (i64 v_x)
{
- /* { dg-final { scan-assembler "f44:\n\tsrlg\t%r2,%r2,12" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f44:\n\tsrlg\t%r2,%r3,12\n\tnilf\t%r2,10" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f44:\n\tsrlg\t%r2,%r2,12" } } */
i64 v_shr4 = ((ui64)v_x) >> 12;
i32 v_conv = (ui32)v_shr4;
i32 v_and = v_conv & 10;
// ...and again with i64.
i64 f2 (i64 v_a, i64 v_b)
{
- /* { dg-final { scan-assembler "f2:\n\trisbg\t%r2,%r3,60,62,0" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f2:\n\trisbg\t%r3,%r2,0,0\\\+32-1,64-0-32\n\(\t.*\n\)*\trisbg\t%r\[23\],%r5,60,62,0" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f2:\n\trisbg\t%r2,%r3,60,62,0" } } */
i64 v_anda = v_a & -15;
i64 v_andb = v_b & 14;
i64 v_or = v_anda | v_andb;
// ...and again with i64.
i64 f4 (i64 v_a, i64 v_b)
{
- /* { dg-final { scan-assembler "f4:\n\trisbg\t%r2,%r3,64-4,63,\\(64-64\\)\\+4\\+52" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f4:\n\(\t.*\n\)*\trisbg\t%r5,%r5,64-4,128\\+63,\\(64-64\\)\\+52\\+4" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f4:\n\trisbg\t%r2,%r3,64-4,63,\\(64-64\\)\\+4\\+52" } } */
i64 v_anda = v_a & -16;
i64 v_shr = ((ui64)v_b) >> 8;
i64 v_andb = v_shr & 15;
// ...and again with i64.
i64 f6 (i64 v_a, i64 v_b)
{
- /* { dg-final { scan-assembler "f6:\n\trisbg\t%r2,%r3,0,64-10-1,10" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f6:\n\trisbg\t%r5,%r4,0,0\\\+32-1,64-0-32\n\(\t.*\n\)*\trisbg\t%r\[23\],%r5,0,64-10-1,10" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f6:\n\trisbg\t%r2,%r3,0,64-10-1,10" } } */
i64 v_anda = v_a & 1023;
i64 v_shlb = v_b << 10;
i64 v_or = v_anda | v_shlb;
// ...and again with i64.
i64 f8 (i64 v_a, i64 v_b)
{
- /* { dg-final { scan-assembler "f8:\n\trisbg\t%r2,%r3,8,63,64-8" { target { lp64 } } } } */
- /* With -m31 risbg is not really useful here, so do not test for it. */
+ /* { dg-final { scan-assembler "f8:\n\trisbg\t%r2,%r3,8,63,64-8" } } */
i64 v_anda = v_a & -72057594037927936;
i64 v_shrb = ((ui64)v_b) >> 8;
i64 v_or = v_anda | v_shrb;
// ands with complement masks.
i32 f9 (i64 v_x, i32 v_y)
{
- /* { dg-final { scan-assembler "f9:\n\trisbg\t%r3,%r2,48,63,64-48" { target { lp64 } }} } */
- /* { dg-final { scan-assembler "f9:\n\trisbg\t%r4,%r2,32\\+16,63,64-16" { target { ! lp64 } }} } */
+ /* { dg-final { scan-assembler "f9:\n\trisbg\t%r3,%r2,48,63,64-48" } } */
i64 v_shr6 = ((ui64)v_x) >> 48;
i32 v_conv = (ui32)v_shr6;
i32 v_and1 = v_y & -65536;
// ands with incompatible masks.
i32 f10 (i64 v_x, i32 v_y)
{
- /* { dg-final { scan-assembler "f10:\n\tsrlg\t%r2,%r2,48\n\trosbg\t%r2,%r3,0,39,0" { target { lp64 } } } } */
- /* { dg-final { scan-assembler "f10:\n\tnilf\t%r4,4278190080\n\trosbg\t%r4,%r2,48,63,48" { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler "f10:\n\tsrlg\t%r2,%r2,48\n\trosbg\t%r2,%r3,0,39,0" } } */
i64 v_shr6 = ((ui64)v_x) >> 48;
i32 v_conv = (ui32)v_shr6;
i32 v_and1 = v_y & -16777216;
/* Tests ported from the Llvm testsuite. */
-/* { dg-do compile { target s390x-*-* } } */
+/* { dg-do compile } */
/* { dg-options "-O3 -march=zEC12 -mzarch -fno-asynchronous-unwind-tables" } */
#define i64 signed long long
// On zEC12, we generally prefer RISBGN.
i64 f1 (i64 v_a, i64 v_b)
{
-/* { dg-final { scan-assembler "f1:\n\trisbgn\t%r2,%r3,60,62,0" { target { lp64 } } } } */
-/* { dg-final { scan-assembler "f1:\n\trisbgn\t%r3,%r2,0,0\\\+32-1,64-0-32\n\trisbgn\t%r3,%r5,60,62,0\n" { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler "f1:\n\trisbgn\t%r2,%r3,60,62,0" } } */
i64 v_anda = v_a & -15;
i64 v_andb = v_b & 14;
i64 v_or = v_anda | v_andb;
extern i64 f2_foo();
i64 f2 (i64 v_a, i64 v_b)
{
-/* { dg-final { scan-assembler "f2:\n\trisbg\t%r2,%r3,60,62,0\n\tbner\t%r14\n\tjg\tf2_foo.*\n" { target { lp64 } } } } */
-/* { dg-final { scan-assembler "f2:\n\trisbgn\t%r3,%r2,0,0\\\+32-1,64-0-32\n\trisbg\t%r3,%r5,60,62,0" { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler "f2:\n\trisbg\t%r2,%r3,60,62,0\n\tbner\t%r14\n\tjg\tf2_foo.*\n" } } */
i64 v_anda = v_a & -15;
i64 v_andb = v_b & 14;
i64 v_or = v_anda | v_andb;
void f2_bar ();
void f2_cconly (i64 v_a, i64 v_b)
{
-/* { dg-final { scan-assembler "f2_cconly:\n\trisbg\t%r2,%r3,60,62,0\n\tber\t%r14\n\tjg\tf2_bar(@PLT)?\n" { target { lp64 } } } } */
-/* { dg-final { scan-assembler "f2_cconly:\n\trisbgn\t%r3,%r2,0,0\\\+32-1,64-0-32\n\trisbg\t%r3,%r5,60,62,0\n\tber\t%r14\n\tjg\tf2_bar(@PLT)?\n" { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler "f2_cconly:\n\trisbg\t%r2,%r3,60,62,0\n\tber\t%r14\n\tjg\tf2_bar(@PLT)?\n" } } */
if ((v_a & -15) | (v_b & 14))
f2_bar();
}
+++ /dev/null
-/* { dg-do compile } */
-/* { dg-options "-O1 -m31 -mzarch -fstack-clash-protection" } */
-
-extern void c(char*);
-
-void
-a() {
- char *b = __builtin_alloca(3);
- c(b);
-}
+++ /dev/null
-/* { dg-do compile } */
-/* { dg-options "-O1 -m31 -mzarch -fstack-clash-protection" } */
-
-extern void bar (char*);
-
-void
-foo() {
- char a[4000];
- bar (a) ;
-}
/* { dg-do compile } */
/* { dg-options "-O2 -fstack-protector-all" } */
-/* { dg-final { scan-assembler-times {\tear\t%r[0-9]+,%a[01]} 8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\tsllg\t%r[0-9]+,%r[0-9]+,32} 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\tear\t%r[0-9]+,%a[01]} 3 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times {\tmvc\t160\(8,%r15\),40\(%r[0-9]+\)} 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\tmvc\t100\(4,%r15\),20\(%r[0-9]+\)} 2 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times {\tclc\t160\(8,%r15\),40\(%r[0-9]+\)} 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\tclc\t100\(4,%r15\),20\(%r[0-9]+\)} 2 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times {\tear\t%r[0-9]+,%a[01]} 8 } } */
+/* { dg-final { scan-assembler-times {\tsllg\t%r[0-9]+,%r[0-9]+,32} 4 } } */
+/* { dg-final { scan-assembler-times {\tmvc\t160\(8,%r15\),40\(%r[0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {\tclc\t160\(8,%r15\),40\(%r[0-9]+\)} 2 } } */
/* Computing the address of the thread pointer on s390 involves multiple
instructions and therefore bears the risk that the address of the canary or
{
bar(x);
bar(x + 1);
- /* { dg-final { scan-assembler-times "\ttmll\t%r15,256" 2 { target { lp64 } } } } */
- /* { dg-final { scan-assembler-times "\ttml\t%r15,384" 2 { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler-times "\ttmll\t%r15,256" 2 } } */
}
#pragma GCC target("stack-size=1024,stack-guard=0")
{
bar(x);
bar(x + 1);
- /* { dg-final { scan-assembler-times "\ttmll\t%r15,768" 1 { target { lp64 } } } } */
- /* { dg-final { scan-assembler-times "\ttml\t%r15,896" 1 { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler-times "\ttmll\t%r15,768" 1 } } */
}
#pragma GCC reset_options
{
bar(x);
bar(x + 1);
- /* { dg-final { scan-assembler-times "\ttmll\t%r15,1792" 1 { target { lp64 } } } } */
- /* { dg-final { scan-assembler-times "\ttml\t%r15,1920" 1 { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler-times "\ttmll\t%r15,1792" 1 } } */
}
#pragma GCC reset_options
{
bar(x);
bar(x + 1);
- /* { dg-final { scan-assembler-times "\ttmll\t%r15,3840" 1 { target { lp64 } } } } */
- /* { dg-final { scan-assembler-times "\ttml\t%r15,3968" 1 { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler-times "\ttmll\t%r15,3840" 1 } } */
}
__attribute__ ((target("stack-size=8192,stack-guard=0")))
{
bar(x);
bar(x + 1);
- /* { dg-final { scan-assembler-times "\ttmll\t%r15,7936" 1 { target { lp64 } } } } */
- /* { dg-final { scan-assembler-times "\ttml\t%r15,8064" 1 { target { ! lp64 } } } } */
+ /* { dg-final { scan-assembler-times "\ttmll\t%r15,7936" 1 } } */
}
void d(int x)
return 8;
}
-/* { dg-final { scan-assembler-times "\t.cfi_offset 15, -40" 10 { target { lp64 } } } } */
-/* { dg-final { scan-assembler-times "\t.cfi_offset 15, -8" 5 { target { lp64 } } } } */
-/* { dg-final { scan-assembler-times "\t.cfi_offset 15, -36" 10 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "\t.cfi_offset 15, -4" 5 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times "\t.cfi_offset 15, -40" 10 } } */
+/* { dg-final { scan-assembler-times "\t.cfi_offset 15, -8" 5 } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mno-vx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("arch=z13")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("arch=z10")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("arch=z10,arch=z13")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("arch=z13,arch=z10")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("arch=z13")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("arch=z10")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("arch=z10")
-#pragma GCC target ("arch=z13")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("arch=z13")
-#pragma GCC target ("arch=z10")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("arch=z13")
-__attribute__ ((target ("arch=z13")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("arch=z13")
-__attribute__ ((target ("arch=z13")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("arch=z13")
-__attribute__ ((target ("arch=z10")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("arch=z13")
-__attribute__ ((target ("arch=z10")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("branch-cost=1")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("branch-cost=2")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("branch-cost=2,branch-cost=1")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("branch-cost=1,branch-cost=2")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("branch-cost=1")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("branch-cost=2")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("branch-cost=2")
-#pragma GCC target ("branch-cost=1")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("branch-cost=1")
-#pragma GCC target ("branch-cost=2")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("branch-cost=1")
-__attribute__ ((target ("branch-cost=1")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("branch-cost=1")
-__attribute__ ((target ("branch-cost=1")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("branch-cost=1")
-__attribute__ ((target ("branch-cost=2")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("branch-cost=1")
-__attribute__ ((target ("branch-cost=2")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("warn-framesize=512")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("warn-framesize=0")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("warn-framesize=0,warn-framesize=512")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("warn-framesize=512,warn-framesize=0")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("warn-framesize=512")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("warn-framesize=0")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("warn-framesize=0")
-#pragma GCC target ("warn-framesize=512")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("warn-framesize=512")
-#pragma GCC target ("warn-framesize=0")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("warn-framesize=512")
-__attribute__ ((target ("warn-framesize=512")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("warn-framesize=512")
-__attribute__ ((target ("warn-framesize=512")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("warn-framesize=512")
-__attribute__ ((target ("warn-framesize=0")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("warn-framesize=512")
-__attribute__ ((target ("warn-framesize=0")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("warn-framesize=0")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("warn-framesize=512")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("warn-framesize=512,warn-framesize=0")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("warn-framesize=0,warn-framesize=512")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("warn-framesize=0")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("warn-framesize=512")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("warn-framesize=512")
-#pragma GCC target ("warn-framesize=0")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("warn-framesize=0")
-#pragma GCC target ("warn-framesize=512")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("warn-framesize=0")
-__attribute__ ((target ("warn-framesize=0")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("warn-framesize=0")
-__attribute__ ((target ("warn-framesize=0")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("warn-framesize=0")
-__attribute__ ((target ("warn-framesize=512")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("warn-framesize=0")
-__attribute__ ((target ("warn-framesize=512")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mno-packed-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("backchain")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("no-backchain")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("no-backchain,backchain")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("backchain,no-backchain")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("backchain")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("no-backchain")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("no-backchain")
-#pragma GCC target ("backchain")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("backchain")
-#pragma GCC target ("no-backchain")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("backchain")
-__attribute__ ((target ("backchain")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("backchain")
-__attribute__ ((target ("backchain")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("backchain")
-__attribute__ ((target ("no-backchain")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("backchain")
-__attribute__ ((target ("no-backchain")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("no-backchain")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("backchain")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("backchain,no-backchain")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("no-backchain,backchain")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("no-backchain")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("backchain")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("backchain")
-#pragma GCC target ("no-backchain")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-backchain")
-#pragma GCC target ("backchain")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("no-backchain")
-__attribute__ ((target ("no-backchain")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-backchain")
-__attribute__ ((target ("no-backchain")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-backchain")
-__attribute__ ((target ("backchain")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-backchain")
-__attribute__ ((target ("backchain")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("hard-dfp")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("no-hard-dfp")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("no-hard-dfp,hard-dfp")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("hard-dfp,no-hard-dfp")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("hard-dfp")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("no-hard-dfp")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("no-hard-dfp")
-#pragma GCC target ("hard-dfp")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("hard-dfp")
-#pragma GCC target ("no-hard-dfp")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("hard-dfp")
-__attribute__ ((target ("hard-dfp")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("hard-dfp")
-__attribute__ ((target ("hard-dfp")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("hard-dfp")
-__attribute__ ((target ("no-hard-dfp")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("hard-dfp")
-__attribute__ ((target ("no-hard-dfp")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -mhard-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mzarch -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("no-hard-dfp")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("hard-dfp")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("hard-dfp,no-hard-dfp")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("no-hard-dfp,hard-dfp")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("no-hard-dfp")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("hard-dfp")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("hard-dfp")
-#pragma GCC target ("no-hard-dfp")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-hard-dfp")
-#pragma GCC target ("hard-dfp")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("no-hard-dfp")
-__attribute__ ((target ("no-hard-dfp")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-hard-dfp")
-__attribute__ ((target ("no-hard-dfp")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-hard-dfp")
-__attribute__ ((target ("hard-dfp")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-hard-dfp")
-__attribute__ ((target ("hard-dfp")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mno-hard-dfp -mno-backchain -mhard-float -mno-vx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("hard-float")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("soft-float")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("soft-float,hard-float")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("hard-float,soft-float")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("hard-float")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("soft-float")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("soft-float")
-#pragma GCC target ("hard-float")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("hard-float")
-#pragma GCC target ("soft-float")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("hard-float")
-__attribute__ ((target ("hard-float")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("hard-float")
-__attribute__ ((target ("hard-float")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("hard-float")
-__attribute__ ((target ("soft-float")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("hard-float")
-__attribute__ ((target ("soft-float")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("soft-float")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("hard-float")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("hard-float,soft-float")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("soft-float,hard-float")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("soft-float")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("hard-float")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("hard-float")
-#pragma GCC target ("soft-float")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("soft-float")
-#pragma GCC target ("hard-float")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("soft-float")
-__attribute__ ((target ("soft-float")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("soft-float")
-__attribute__ ((target ("soft-float")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("soft-float")
-__attribute__ ((target ("hard-float")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("soft-float")
-__attribute__ ((target ("hard-float")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("htm")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("no-htm")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("no-htm,htm")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("htm,no-htm")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("htm")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("no-htm")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("no-htm")
-#pragma GCC target ("htm")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("htm")
-#pragma GCC target ("no-htm")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("htm")
-__attribute__ ((target ("htm")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("htm")
-__attribute__ ((target ("htm")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("htm")
-__attribute__ ((target ("no-htm")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("htm")
-__attribute__ ((target ("no-htm")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("arch=z10")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("arch=z13")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("arch=z13,arch=z10")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("arch=z10,arch=z13")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("arch=z10")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("arch=z13")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("arch=z13")
-#pragma GCC target ("arch=z10")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("arch=z10")
-#pragma GCC target ("arch=z13")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("arch=z10")
-__attribute__ ((target ("arch=z10")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("arch=z10")
-__attribute__ ((target ("arch=z10")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("arch=z10")
-__attribute__ ((target ("arch=z13")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("arch=z10")
-__attribute__ ((target ("arch=z13")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("no-htm")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("htm")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("htm,no-htm")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("no-htm,htm")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("no-htm")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("htm")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("htm")
-#pragma GCC target ("no-htm")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-htm")
-#pragma GCC target ("htm")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("no-htm")
-__attribute__ ((target ("no-htm")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-htm")
-__attribute__ ((target ("no-htm")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-htm")
-__attribute__ ((target ("htm")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-htm")
-__attribute__ ((target ("htm")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("vx")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("no-vx")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("no-vx,vx")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("vx,no-vx")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("vx")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("no-vx")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("no-vx")
-#pragma GCC target ("vx")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("vx")
-#pragma GCC target ("no-vx")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("vx")
-__attribute__ ((target ("vx")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("vx")
-__attribute__ ((target ("vx")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("vx")
-__attribute__ ((target ("no-vx")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("vx")
-__attribute__ ((target ("no-vx")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -mhard-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("no-vx")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("vx")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("vx,no-vx")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("no-vx,vx")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("no-vx")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("vx")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("vx")
-#pragma GCC target ("no-vx")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-vx")
-#pragma GCC target ("vx")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("no-vx")
-__attribute__ ((target ("no-vx")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-vx")
-__attribute__ ((target ("no-vx")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-vx")
-__attribute__ ((target ("vx")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-vx")
-__attribute__ ((target ("vx")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("packed-stack")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("no-packed-stack")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("no-packed-stack,packed-stack")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("packed-stack,no-packed-stack")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("packed-stack")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("no-packed-stack")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("no-packed-stack")
-#pragma GCC target ("packed-stack")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("packed-stack")
-#pragma GCC target ("no-packed-stack")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("packed-stack")
-__attribute__ ((target ("packed-stack")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("packed-stack")
-__attribute__ ((target ("packed-stack")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("packed-stack")
-__attribute__ ((target ("no-packed-stack")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("packed-stack")
-__attribute__ ((target ("no-packed-stack")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mno-backchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("no-packed-stack")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("packed-stack")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("packed-stack,no-packed-stack")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("no-packed-stack,packed-stack")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("no-packed-stack")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("packed-stack")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("packed-stack")
-#pragma GCC target ("no-packed-stack")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-packed-stack")
-#pragma GCC target ("packed-stack")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("no-packed-stack")
-__attribute__ ((target ("no-packed-stack")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-packed-stack")
-__attribute__ ((target ("no-packed-stack")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-packed-stack")
-__attribute__ ((target ("packed-stack")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-packed-stack")
-__attribute__ ((target ("packed-stack")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("small-exec")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("no-small-exec")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("no-small-exec,small-exec")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("small-exec,no-small-exec")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("small-exec")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("no-small-exec")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("no-small-exec")
-#pragma GCC target ("small-exec")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("small-exec")
-#pragma GCC target ("no-small-exec")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("small-exec")
-__attribute__ ((target ("small-exec")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("small-exec")
-__attribute__ ((target ("small-exec")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("small-exec")
-__attribute__ ((target ("no-small-exec")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("small-exec")
-__attribute__ ((target ("no-small-exec")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("no-small-exec")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("small-exec")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("small-exec,no-small-exec")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("no-small-exec,small-exec")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("no-small-exec")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("small-exec")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("small-exec")
-#pragma GCC target ("no-small-exec")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-small-exec")
-#pragma GCC target ("small-exec")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("no-small-exec")
-__attribute__ ((target ("no-small-exec")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-small-exec")
-__attribute__ ((target ("no-small-exec")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-small-exec")
-__attribute__ ((target ("small-exec")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-small-exec")
-__attribute__ ((target ("small-exec")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("mvcle")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("no-mvcle")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("no-mvcle,mvcle")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("mvcle,no-mvcle")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("mvcle")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("no-mvcle")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("no-mvcle")
-#pragma GCC target ("mvcle")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("mvcle")
-#pragma GCC target ("no-mvcle")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("mvcle")
-__attribute__ ((target ("mvcle")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("mvcle")
-__attribute__ ((target ("mvcle")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("mvcle")
-__attribute__ ((target ("no-mvcle")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("mvcle")
-__attribute__ ((target ("no-mvcle")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("no-mvcle")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("mvcle")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("mvcle,no-mvcle")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("no-mvcle,mvcle")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("no-mvcle")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("mvcle")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("mvcle")
-#pragma GCC target ("no-mvcle")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-mvcle")
-#pragma GCC target ("mvcle")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("no-mvcle")
-__attribute__ ((target ("no-mvcle")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-mvcle")
-__attribute__ ((target ("no-mvcle")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-mvcle")
-__attribute__ ((target ("mvcle")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-mvcle")
-__attribute__ ((target ("mvcle")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("zvector")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("no-zvector")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("no-zvector")
-#pragma GCC target ("zvector")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("zvector")
-#pragma GCC target ("no-zvector")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("tune=z13")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("tune=z10")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("tune=z10,tune=z13")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("tune=z13,tune=z10")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("tune=z13")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("tune=z10")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("tune=z10")
-#pragma GCC target ("tune=z13")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("tune=z13")
-#pragma GCC target ("tune=z10")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("tune=z13")
-__attribute__ ((target ("tune=z13")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("tune=z13")
-__attribute__ ((target ("tune=z13")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("tune=z13")
-__attribute__ ((target ("tune=z10")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("tune=z13")
-__attribute__ ((target ("tune=z10")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("no-zvector")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("zvector")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("zvector")
-#pragma GCC target ("no-zvector")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-zvector")
-#pragma GCC target ("zvector")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("warn-dynamicstack")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("no-warn-dynamicstack")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("no-warn-dynamicstack,warn-dynamicstack")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-
-__attribute__ ((target ("warn-dynamicstack,no-warn-dynamicstack")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("warn-dynamicstack")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("no-warn-dynamicstack")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("no-warn-dynamicstack")
-#pragma GCC target ("warn-dynamicstack")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("warn-dynamicstack")
-#pragma GCC target ("no-warn-dynamicstack")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("warn-dynamicstack")
-__attribute__ ((target ("warn-dynamicstack")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("warn-dynamicstack")
-__attribute__ ((target ("warn-dynamicstack")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("warn-dynamicstack")
-__attribute__ ((target ("no-warn-dynamicstack")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("warn-dynamicstack")
-__attribute__ ((target ("no-warn-dynamicstack")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("no-warn-dynamicstack")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("warn-dynamicstack")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("warn-dynamicstack,no-warn-dynamicstack")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-
-__attribute__ ((target ("no-warn-dynamicstack,warn-dynamicstack")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("no-warn-dynamicstack")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("warn-dynamicstack")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("warn-dynamicstack")
-#pragma GCC target ("no-warn-dynamicstack")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-warn-dynamicstack")
-#pragma GCC target ("warn-dynamicstack")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("no-warn-dynamicstack")
-__attribute__ ((target ("no-warn-dynamicstack")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-warn-dynamicstack")
-__attribute__ ((target ("no-warn-dynamicstack")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-warn-dynamicstack")
-__attribute__ ((target ("warn-dynamicstack")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("no-warn-dynamicstack")
-__attribute__ ((target ("warn-dynamicstack")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("tune=z10")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("tune=z13")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("tune=z13,tune=z10")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("tune=z10,tune=z13")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("tune=z10")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("tune=z13")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("tune=z13")
-#pragma GCC target ("tune=z10")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("tune=z10")
-#pragma GCC target ("tune=z13")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("tune=z10")
-__attribute__ ((target ("tune=z10")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("tune=z10")
-__attribute__ ((target ("tune=z10")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("tune=z10")
-__attribute__ ((target ("tune=z13")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("tune=z10")
-__attribute__ ((target ("tune=z13")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("stack-size=4096")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("stack-size=2048")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("stack-size=2048,stack-size=4096")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("stack-size=4096,stack-size=2048")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("stack-size=4096")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("stack-size=2048")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("stack-size=2048")
-#pragma GCC target ("stack-size=4096")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-size=4096")
-#pragma GCC target ("stack-size=2048")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("stack-size=4096")
-__attribute__ ((target ("stack-size=4096")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-size=4096")
-__attribute__ ((target ("stack-size=4096")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-size=4096")
-__attribute__ ((target ("stack-size=2048")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-size=4096")
-__attribute__ ((target ("stack-size=2048")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("stack-size=2048")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("stack-size=4096")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("stack-size=4096,stack-size=2048")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("stack-size=2048,stack-size=4096")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("stack-size=2048")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("stack-size=4096")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("stack-size=4096")
-#pragma GCC target ("stack-size=2048")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-size=2048")
-#pragma GCC target ("stack-size=4096")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("stack-size=2048")
-__attribute__ ((target ("stack-size=2048")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-size=2048")
-__attribute__ ((target ("stack-size=2048")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-size=2048")
-__attribute__ ((target ("stack-size=4096")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-size=2048")
-__attribute__ ((target ("stack-size=4096")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("stack-guard=16")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("stack-guard=0")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("stack-guard=0,stack-guard=16")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("stack-guard=16,stack-guard=0")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("stack-guard=16")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("stack-guard=0")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("stack-guard=0")
-#pragma GCC target ("stack-guard=16")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-guard=16")
-#pragma GCC target ("stack-guard=0")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("stack-guard=16")
-__attribute__ ((target ("stack-guard=16")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-guard=16")
-__attribute__ ((target ("stack-guard=16")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-guard=16")
-__attribute__ ((target ("stack-guard=0")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-guard=16")
-__attribute__ ((target ("stack-guard=0")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z10 -mtune=z13 -mstack-size=2048 -mstack-guard=16 -mbranch-cost=1 -mwarn-framesize=512 -mno-hard-dfp -mbackchain -msoft-float -mno-vx -mno-htm -mno-packed-stack -msmall-exec -mno-zvector -mmvcle -mesa -mno-warn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd0" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("stack-guard=0")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd0" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("stack-guard=16")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd0" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("stack-guard=16,stack-guard=0")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd0" } } */
-
-__attribute__ ((target ("stack-guard=0,stack-guard=16")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd0" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("stack-guard=0")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd0" } } */
-
-#pragma GCC target ("stack-guard=16")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd0" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd0" } } */
-
-#pragma GCC target ("stack-guard=16")
-#pragma GCC target ("stack-guard=0")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-guard=0")
-#pragma GCC target ("stack-guard=16")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("stack-guard=0")
-__attribute__ ((target ("stack-guard=0")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-guard=0")
-__attribute__ ((target ("stack-guard=0")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-guard=0")
-__attribute__ ((target ("stack-guard=16")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd0" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("stack-guard=0")
-__attribute__ ((target ("stack-guard=16")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd0" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss2048" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg16" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf512" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd0" } } */
+++ /dev/null
-/* Functional tests for the "target" attribute and pragma. */
-
-/* { dg-do assemble { target { ! lp64 } } } */
-/* { dg-require-effective-target target_attribute } */
-/* { dg-options "-save-temps -mdebug -m31 -march=z13 -mtune=z10 -mstack-size=4096 -mstack-guard=0 -mbranch-cost=2 -mwarn-framesize=0 -mhard-dfp -mno-backchain -mhard-float -mvx -mhtm -mpacked-stack -mno-small-exec -mzvector -mno-mvcle -mzarch -mwarn-dynamicstack" } */
-
-/**
- **
- ** Start
- **
- **/
-
-void fn_default_start (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_start ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_start wd1" } } */
-
-/**
- **
- ** Attribute
- **
- **/
-
-__attribute__ ((target ("branch-cost=2")))
-void fn_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1 wd1" } } */
-
-void fn_att_1_default (void) { }
-
-__attribute__ ((target ("branch-cost=1")))
-void fn_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0 wd1" } } */
-
-void fn_att_0_default (void) { }
-
-__attribute__ ((target ("branch-cost=1,branch-cost=2")))
-void fn_att_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_0_1 wd1" } } */
-
-__attribute__ ((target ("branch-cost=2,branch-cost=1")))
-void fn_att_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_att_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_att_1_0 wd1" } } */
-
-/**
- **
- ** Pragma
- **
- **/
-
-#pragma GCC target ("branch-cost=2")
-void fn_pragma_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_1_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_default wd1" } } */
-
-#pragma GCC target ("branch-cost=1")
-void fn_pragma_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0 wd1" } } */
-#pragma GCC reset_options
-
-void fn_pragma_0_default (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_default wd1" } } */
-
-#pragma GCC target ("branch-cost=1")
-#pragma GCC target ("branch-cost=2")
-void fn_pragma_0_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("branch-cost=2")
-#pragma GCC target ("branch-cost=1")
-void fn_pragma_1_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** Pragma and attribute
- **
- **/
-
-#pragma GCC target ("branch-cost=2")
-__attribute__ ((target ("branch-cost=2")))
-void fn_pragma_1_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("branch-cost=2")
-__attribute__ ((target ("branch-cost=2")))
-void fn_pragma_0_att_1 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_1 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("branch-cost=2")
-__attribute__ ((target ("branch-cost=1")))
-void fn_pragma_1_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_1_att_0 wd1" } } */
-#pragma GCC reset_options
-
-#pragma GCC target ("branch-cost=2")
-__attribute__ ((target ("branch-cost=1")))
-void fn_pragma_0_att_0 (void) { }
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 bc1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 se0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_pragma_0_att_0 wd1" } } */
-#pragma GCC reset_options
-
-/**
- **
- ** End
- **
- **/
-
-void fn_default_end (void) { }
-/* { dg-final { scan-assembler "fn:fn_default_end ar7" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end tu4" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ss4096" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end sg0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end bc2" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wf0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hd1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ba0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end hf1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end vx1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ht1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end ps1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end se0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end zv1" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end mv0" } } */
-/* { dg-final { scan-assembler "fn:fn_default_end wd1" } } */
/* foo must use the initial-exec model, foostatic must use the local-exec
model. */
-/* { dg-final { scan-assembler-times {\tear} 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\tear} 2 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times {\tear} 4 } } */
/* { dg-do run { target { s390_useable_hw } } } */
/* { dg-options "-O2 -march=z13 -mzarch -save-temps -fdump-tree-optimized" } */
-/* { dg-final { scan-tree-dump-times "\\.UADDC \\(" 4 "optimized" { target lp64 } } } */
-/* { dg-final { scan-tree-dump-times "\\.UADDC \\(" 2 "optimized" { target { ! lp64 } } } } */
+/* { dg-final { scan-tree-dump-times "\\.UADDC \\(" 4 "optimized" } } */
/* { dg-final { scan-assembler-times "\\talcr\\t" 1 } } */
/* { dg-final { scan-assembler-times "\\talc\\t" 1 } } */
-/* { dg-final { scan-assembler-times "\\talcgr\\t" 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "\\talcg\\t" 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "\\talcgr\\t" 1 } } */
+/* { dg-final { scan-assembler-times "\\talcg\\t" 1 } } */
#include <assert.h>
/* { dg-do compile } */
/* { dg-options "-O2 -march=z13 -mzarch -save-temps -fdump-tree-optimized" } */
/* { dg-final { scan-tree-dump-times "\\.UADDC \\(" 6 "optimized" } } */
-/* { dg-final { scan-assembler-times "\\talcr\\t" 6 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "\\talcr\\t" 3 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "\\talcgr\\t" 3 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "\\talcr\\t" 3 } } */
+/* { dg-final { scan-assembler-times "\\talcgr\\t" 3 } } */
#define TEST(T, V, OP) \
unsigned T \
/* { dg-options "-O2 -march=z13 -mzarch -save-temps -fdump-tree-optimized" } */
/* { dg-final { scan-tree-dump-times "\\.UADDC \\(\[^,\]+, \[^,\]+, 0\\)" 1 "optimized" } } */
/* { dg-final { scan-tree-dump-times "\\.UADDC \\(\[^,\]+, \[^,\]+, _.+\\)" 1 "optimized" } } */
-/* { dg-final { scan-assembler-times "alg\t" 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "ag\t" 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "al\t" 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "a\t" 2 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times "alg\t" 1 } } */
+/* { dg-final { scan-assembler-times "ag\t" 2 } } */
static unsigned long
uaddc (unsigned long x, unsigned long y, unsigned long carry_in, unsigned long *carry_out)
/* { dg-do run { target { s390_useable_hw } } } */
/* { dg-options "-O2 -march=z13 -mzarch -save-temps -fdump-tree-optimized" } */
-/* { dg-final { scan-tree-dump-times "\\.USUBC \\(" 4 "optimized" { target lp64 } } } */
-/* { dg-final { scan-tree-dump-times "\\.USUBC \\(" 2 "optimized" { target { ! lp64 } } } } */
+/* { dg-final { scan-tree-dump-times "\\.USUBC \\(" 4 "optimized" } } */
/* { dg-final { scan-assembler-times "\\tslbr\\t" 1 } } */
/* { dg-final { scan-assembler-times "\\tslb\\t" 1 } } */
-/* { dg-final { scan-assembler-times "\\tslbgr\\t" 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "\\tslbg\\t" 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "\\tslbgr\\t" 1 } } */
+/* { dg-final { scan-assembler-times "\\tslbg\\t" 1 } } */
#include <assert.h>
/* { dg-do compile } */
/* { dg-options "-O2 -march=z13 -mzarch -save-temps -fdump-tree-optimized" } */
/* { dg-final { scan-tree-dump-times "\\.USUBC \\(" 6 "optimized" } } */
-/* { dg-final { scan-assembler-times "\\tslbr\\t" 6 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "\\tslbr\\t" 3 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "\\tslbgr\\t" 3 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "\\tslbr\\t" 3 } } */
+/* { dg-final { scan-assembler-times "\\tslbgr\\t" 3 } } */
#define TEST(T, V, OP) \
unsigned T \
/* { dg-options "-O2 -march=z13 -mzarch -save-temps -fdump-tree-optimized" } */
/* { dg-final { scan-tree-dump-times "\\.USUBC \\(\[^,\]+, \[^,\]+, 0\\)" 1 "optimized" } } */
/* { dg-final { scan-tree-dump-times "\\.USUBC \\(\[^,\]+, \[^,\]+, _.+\\)" 1 "optimized" } } */
-/* { dg-final { scan-assembler-times "slg\t" 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "alcgr\t" 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "slbg\t" 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "sl\t" 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "alcr\t" 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "slb\t" 1 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times "slg\t" 1 } } */
+/* { dg-final { scan-assembler-times "alcgr\t" 1 } } */
+/* { dg-final { scan-assembler-times "slbg\t" 1 } } */
static unsigned long
usubc (unsigned long x, unsigned long y, unsigned long carry_in, unsigned long *carry_out)
TEST(short,int,8)
TEST(int,long,4)
-/* { dg-final { scan-tree-dump-times "\.AVG_CEIL" 6 "optimized" { target lp64 } } } */
-/* { dg-final { scan-tree-dump-times "\.AVG_CEIL" 4 "optimized" { target { ! lp64 } } } } */
+/* { dg-final { scan-tree-dump-times "\.AVG_CEIL" 6 "optimized" } } */
/* Check calling convention in the vector ABI. */
-/* { dg-do compile { target { s390*-*-* } } } */
-/* { dg-options "-O3 -mzarch -march=z13" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=z13" } */
/* Make sure the last argument is fetched from the argument overflow area. */
-/* { dg-final { scan-assembler "vl\t%v\[0-9\]*,160\\(%r15\\)" { target lp64 } } } */
-/* { dg-final { scan-assembler "vl\t%v\[0-9\]*,96\\(%r15\\)" { target ilp32 } } } */
+/* { dg-final { scan-assembler "vl\t%v\[0-9\]*,160\\(%r15\\)" } } */
/* { dg-final { scan-assembler "gnu_attribute 8, 2" } } */
typedef double v2df __attribute__((vector_size(16)));
/* Check calling convention in the vector ABI regarding vector like structs. */
-/* { dg-do compile { target { s390*-*-* } } } */
+/* { dg-do compile } */
/* { dg-options "-O3 -mzarch -march=z13" } */
/* addA */
/* addF */
/* { dg-final { scan-assembler-times "vab\t%v24,%v\[0-9\]*,%v\[0-9\]*" 1 } } */
-/* { dg-final { scan-assembler-times "srlg\t%r\[0-9\]*,%r2,32" 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "srlg\t%r\[0-9\]*,%r3,32" 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "llgfr\t%.*,%r2" 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "llgfr\t%.*,%r4" 1 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times "srlg\t%r\[0-9\]*,%r2,32" 1 } } */
+/* { dg-final { scan-assembler-times "srlg\t%r\[0-9\]*,%r3,32" 1 } } */
typedef double v2df __attribute__((vector_size(16)));
/* { dg-do compile { target { s390*-*-* } } } */
/* { dg-options "-O3 -mzarch -march=z13" } */
-/* { dg-final { scan-assembler-times "lde\t%.*,160\\\(%r15\\\)" 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lde\t%.*,168\\\(%r15\\\)" 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lde\t%.*,96\\\(%r15\\\)" 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "lde\t%.*,100\\\(%r15\\\)" 1 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times "lde\t%.*,160\\\(%r15\\\)" 1 } } */
+/* { dg-final { scan-assembler-times "lde\t%.*,168\\\(%r15\\\)" 1 } } */
typedef char __attribute__((vector_size(4))) v4qi;
/* Check calling convention with variable argument lists in the vector
ABI. */
-/* { dg-do run { target { s390*-*-* } } } */
+/* { dg-do run } */
/* { dg-require-effective-target s390_vx } */
-/* { dg-options "-O3 -mzarch -march=z13 --save-temps" } */
+/* { dg-options "-O3 -march=z13 --save-temps" } */
/* Make sure arguments are fetched from the argument overflow area. */
-/* { dg-final { scan-assembler "vl\t%v\[0-9\]*,352\\(%r15\\)" { target lp64 } } } */
-/* { dg-final { scan-assembler "ld\t%v\[0-9\]*,368\\(%r15\\)" { target lp64 } } } */
-/* { dg-final { scan-assembler "vl\t%v\[0-9\]*,376\\(%r15\\)" { target lp64 } } } */
-/* { dg-final { scan-assembler "ld\t%v\[0-9\]*,392\\(%r15\\)" { target lp64 } } } */
-
-/* { dg-final { scan-assembler "vl\t%v\[0-9\]*,208\\(%r15\\)" { target ilp32 } } } */
-/* { dg-final { scan-assembler "ld\t%v\[0-9\]*,224\\(%r15\\)" { target ilp32 } } } */
-/* { dg-final { scan-assembler "vl\t%v\[0-9\]*,232\\(%r15\\)" { target ilp32 } } } */
-/* { dg-final { scan-assembler "ld\t%v\[0-9\]*,248\\(%r15\\)" { target ilp32 } } } */
+/* { dg-final { scan-assembler "vl\t%v\[0-9\]*,352\\(%r15\\)" } } */
+/* { dg-final { scan-assembler "ld\t%v\[0-9\]*,368\\(%r15\\)" } } */
+/* { dg-final { scan-assembler "vl\t%v\[0-9\]*,376\\(%r15\\)" } } */
+/* { dg-final { scan-assembler "ld\t%v\[0-9\]*,392\\(%r15\\)" } } */
#include <stdarg.h>
/* Check that we use the scalar variants of vector compares. */
-/* { dg-do compile { target { s390*-*-* } } } */
+/* { dg-do compile } */
/* { dg-options "-O3 -mzarch -march=z13 -fno-asynchronous-unwind-tables" } */
int
return a == b;
}
-/* { dg-final { scan-assembler "eq:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochie\t%r2,1" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "eq:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlocghie\t%r2,1" { target lp64 } } } */
+/* { dg-final { scan-assembler "eq:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlocghie\t%r2,1" } } */
int
ne (double a, double b)
return a != b;
}
-/* { dg-final { scan-assembler "ne:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochine\t%r2,1" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "ne:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlocghine\t%r2,1" { target lp64 } } } */
+/* { dg-final { scan-assembler "ne:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlocghine\t%r2,1" } } */
int
gt (double a, double b)
return a > b;
}
-/* { dg-final { scan-assembler "gt:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochih\t%r2,1" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "gt:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlocghih\t%r2,1" { target lp64 } } } */
+/* { dg-final { scan-assembler "gt:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlocghih\t%r2,1" } } */
int
ge (double a, double b)
return a >= b;
}
-/* { dg-final { scan-assembler "ge:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochihe\t%r2,1" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "ge:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlocghihe\t%r2,1" { target lp64 } } } */
+/* { dg-final { scan-assembler "ge:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlocghihe\t%r2,1" } } */
int
lt (double a, double b)
return a < b;
}
-/* { dg-final { scan-assembler "lt:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochil\t%r2,1" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "lt:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlocghil\t%r2,1" { target lp64 } } } */
+/* { dg-final { scan-assembler "lt:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlocghil\t%r2,1" } } */
int
le (double a, double b)
return a <= b;
}
-/* { dg-final { scan-assembler "le:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochile\t%r2,1" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "le:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlocghile\t%r2,1" { target lp64 } } } */
+/* { dg-final { scan-assembler "le:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlocghile\t%r2,1" } } */
/* { dg-final { scan-assembler "lghi\t%r4,0" } } */
/* { dg-final { scan-assembler "lghi\t%r5,0" } } */
-/* { dg-final { scan-assembler-times "vzero\t" 30 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times "vzero\t" 24 { target { lp64 } } } } */
+/* { dg-final { scan-assembler-times "vzero\t" 24 } } */
/* { dg-final { scan-assembler "vzero\t%v0" } } */
/* { dg-final { scan-assembler "vzero\t%v1" } } */
/* { dg-final { scan-assembler "vzero\t%v2" } } */
/* { dg-final { scan-assembler "vzero\t%v3" } } */
-/* { dg-final { scan-assembler "vzero\t%v4" { target { lp64 } } } } */
+/* { dg-final { scan-assembler "vzero\t%v4" } } */
/* { dg-final { scan-assembler "vzero\t%v5" } } */
-/* { dg-final { scan-assembler "vzero\t%v6" { target { lp64 } } } } */
+/* { dg-final { scan-assembler "vzero\t%v6" } } */
/* { dg-final { scan-assembler "vzero\t%v7" } } */
-/* { dg-final { scan-assembler "vzero\t%v8" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "vzero\t%v9" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "vzero\t%v10" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "vzero\t%v11" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "vzero\t%v12" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "vzero\t%v13" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "vzero\t%v14" { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler "vzero\t%v15" { target { ! lp64 } } } } */
/* { dg-final { scan-assembler "vzero\t%v16" } } */
/* { dg-final { scan-assembler "vzero\t%v17" } } */
/* { dg-final { scan-assembler "vzero\t%v18" } } */
{
return vec_all_eq (a, b);
}
-/* { dg-final { scan-assembler-times all_eq_double:\n\tvfcedbs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochie\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times all_eq_double:\n\tvfcedbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times all_eq_double:\n\tvfcedbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
all_ne_double (vector double a, vector double b)
{
return vec_all_ne (a, b);
}
-/* { dg-final { scan-assembler-times all_ne_double:\n\tvfcedbs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochinle\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times all_ne_double:\n\tvfcedbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghinle\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times all_ne_double:\n\tvfcedbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghinle\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
all_gt_double (vector double a, vector double b)
{
return vec_all_gt (a, b);
}
-/* { dg-final { scan-assembler-times all_gt_double:\n\tvfchdbs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochie\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times all_gt_double:\n\tvfchdbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times all_gt_double:\n\tvfchdbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
all_lt_double (vector double a, vector double b)
{
return vec_all_lt (a, b);
}
-/* { dg-final { scan-assembler-times all_lt_double:\n\tvfchdbs\t%v\[0-9\]*,%v26,%v24\n\tlhi\t%r2,0\n\tlochie\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times all_lt_double:\n\tvfchdbs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times all_lt_double:\n\tvfchdbs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
all_ge_double (vector double a, vector double b)
{
return vec_all_ge (a, b);
}
-/* { dg-final { scan-assembler-times all_ge_double:\n\tvfchedbs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochie\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times all_ge_double:\n\tvfchedbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times all_ge_double:\n\tvfchedbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
all_le_double (vector double a, vector double b)
{
return vec_all_le (a, b);
}
-/* { dg-final { scan-assembler-times all_le_double:\n\tvfchedbs\t%v\[0-9\]*,%v26,%v24\n\tlhi\t%r2,0\n\tlochie\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times all_le_double:\n\tvfchedbs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times all_le_double:\n\tvfchedbs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
any_eq_double (vector double a, vector double b)
{
return vec_any_eq (a, b);
}
-/* { dg-final { scan-assembler-times any_eq_double:\n\tvfcedbs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochile\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times any_eq_double:\n\tvfcedbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times any_eq_double:\n\tvfcedbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
any_ne_double (vector double a, vector double b)
{
return vec_any_ne (a, b);
}
-/* { dg-final { scan-assembler-times any_ne_double:\n\tvfcedbs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochine\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times any_ne_double:\n\tvfcedbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghine\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times any_ne_double:\n\tvfcedbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghine\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
any_gt_double (vector double a, vector double b)
{
return vec_any_gt (a, b);
}
-/* { dg-final { scan-assembler-times any_gt_double:\n\tvfchdbs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochile\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times any_gt_double:\n\tvfchdbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times any_gt_double:\n\tvfchdbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
any_lt_double (vector double a, vector double b)
{
return vec_any_lt (a, b);
}
-/* { dg-final { scan-assembler-times any_lt_double:\n\tvfchdbs\t%v\[0-9\]*,%v26,%v24\n\tlhi\t%r2,0\n\tlochile\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times any_lt_double:\n\tvfchdbs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times any_lt_double:\n\tvfchdbs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
any_ge_double (vector double a, vector double b)
{
return vec_any_ge (a, b);
}
-/* { dg-final { scan-assembler-times any_ge_double:\n\tvfchedbs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochile\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times any_ge_double:\n\tvfchedbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times any_ge_double:\n\tvfchedbs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
any_le_double (vector double a, vector double b)
{
return vec_any_le (a, b);
}
-/* { dg-final { scan-assembler-times any_le_double:\n\tvfchedbs\t%v\[0-9\]*,%v26,%v24\n\tlhi\t%r2,0\n\tlochile\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times any_le_double:\n\tvfchedbs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times any_le_double:\n\tvfchedbs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
all_eq_int (vector int a, vector int b)
{
return vec_all_eq (a, b);
}
-/* { dg-final { scan-assembler-times all_eq_int:\n\tvceqfs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochie\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times all_eq_int:\n\tvceqfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times all_eq_int:\n\tvceqfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
all_ne_int (vector int a, vector int b)
{
return vec_all_ne (a, b);
}
-/* { dg-final { scan-assembler-times all_ne_int:\n\tvceqfs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochinle\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times all_ne_int:\n\tvceqfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghinle\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times all_ne_int:\n\tvceqfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghinle\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
all_gt_int (vector int a, vector int b)
{
return vec_all_gt (a, b);
}
-/* { dg-final { scan-assembler-times all_gt_int:\n\tvchfs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochie\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times all_gt_int:\n\tvchfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times all_gt_int:\n\tvchfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
all_lt_int (vector int a, vector int b)
{
return vec_all_lt (a, b);
}
-/* { dg-final { scan-assembler-times all_lt_int:\n\tvchfs\t%v\[0-9\]*,%v26,%v24\n\tlhi\t%r2,0\n\tlochie\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times all_lt_int:\n\tvchfs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times all_lt_int:\n\tvchfs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghie\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
all_ge_int (vector int a, vector int b)
{
return vec_all_ge (a, b);
}
-/* { dg-final { scan-assembler-times all_ge_int:\n\tvchfs\t%v\[0-9\]*,%v26,%v24\n\tlhi\t%r2,0\n\tlochinle\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times all_ge_int:\n\tvchfs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghinle\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times all_ge_int:\n\tvchfs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghinle\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
all_le_int (vector int a, vector int b)
{
return vec_all_le (a, b);
}
-/* { dg-final { scan-assembler-times all_le_int:\n\tvchfs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochinle\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times all_le_int:\n\tvchfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghinle\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times all_le_int:\n\tvchfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghinle\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
any_eq_int (vector int a, vector int b)
{
return vec_any_eq (a, b);
}
-/* { dg-final { scan-assembler-times any_eq_int:\n\tvceqfs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochile\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times any_eq_int:\n\tvceqfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times any_eq_int:\n\tvceqfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
any_ne_int (vector int a, vector int b)
{
return vec_any_ne (a, b);
}
-/* { dg-final { scan-assembler-times any_ne_int:\n\tvceqfs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochine\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times any_ne_int:\n\tvceqfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghine\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times any_ne_int:\n\tvceqfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghine\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
any_gt_int (vector int a, vector int b)
{
return vec_any_gt (a, b);
}
-/* { dg-final { scan-assembler-times any_gt_int:\n\tvchfs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochile\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times any_gt_int:\n\tvchfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times any_gt_int:\n\tvchfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
any_lt_int (vector int a, vector int b)
{
return vec_any_lt (a, b);
}
-/* { dg-final { scan-assembler-times any_lt_int:\n\tvchfs\t%v\[0-9\]*,%v26,%v24\n\tlhi\t%r2,0\n\tlochile\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times any_lt_int:\n\tvchfs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times any_lt_int:\n\tvchfs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghile\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
any_ge_int (vector int a, vector int b)
{
return vec_any_ge (a, b);
}
-/* { dg-final { scan-assembler-times any_ge_int:\n\tvchfs\t%v\[0-9\]*,%v26,%v24\n\tlhi\t%r2,0\n\tlochine\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times any_ge_int:\n\tvchfs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghine\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times any_ge_int:\n\tvchfs\t%v\[0-9\]*,%v26,%v24\n\tlghi\t%r2,0\n\tlocghine\t%r2,1 1 } } */
int __attribute__((noinline,noclone))
any_le_int (vector int a, vector int b)
{
return vec_any_le (a, b);
}
-/* { dg-final { scan-assembler-times any_le_int:\n\tvchfs\t%v\[0-9\]*,%v24,%v26\n\tlhi\t%r2,0\n\tlochine\t%r2,1 1 { target { ! lp64 } } } } */
-/* { dg-final { scan-assembler-times any_le_int:\n\tvchfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghine\t%r2,1 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times any_le_int:\n\tvchfs\t%v\[0-9\]*,%v24,%v26\n\tlghi\t%r2,0\n\tlocghine\t%r2,1 1 } } */
cpu_type=sparc
tmake_file="${tmake_file} sparc/t-sparc"
;;
-s390*-*-*)
+s390x-*-*)
cpu_type=s390
;;
# Note the 'l'; we need to be able to match e.g. "shle" or "shl".
tmake_file="rx/t-rx t-fdpbit"
tm_file="$tm_file rx/rx-lib.h"
;;
-s390-*-linux*)
- tmake_file="${tmake_file} s390/t-crtstuff s390/t-linux s390/32/t-floattodi t-stack s390/t-stack-s390"
- md_unwind_header=s390/linux-unwind.h
- ;;
s390x-*-linux*)
tmake_file="${tmake_file} s390/t-crtstuff s390/t-linux t-stack s390/t-stack-s390"
- if test "${host_address}" = 32; then
- tmake_file="${tmake_file} s390/32/t-floattodi"
- else
- if test "$libgcc_cv_s390_float16" = "yes"; then
+ if test "$libgcc_cv_s390_float16" = "yes"; then
tmake_file="${tmake_file} s390/t-float16"
- fi
- tmake_file="${tmake_file} s390/t-softfp t-softfp"
fi
+ tmake_file="${tmake_file} s390/t-softfp t-softfp"
md_unwind_header=s390/linux-unwind.h
;;
s390x-ibm-tpf*)
+++ /dev/null
-/* Definitions of target machine for GNU compiler, for IBM S/390
- Copyright (C) 1999-2026 Free Software Foundation, Inc.
- Contributed by Hartmut Penner (hpenner@de.ibm.com) and
- Ulrich Weigand (uweigand@de.ibm.com).
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
-version.
-
-GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-#ifndef __s390x__
-
-#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
-#define EXPONENT_BIAS 1023
-#define MANTISSA_BITS 52
-#define PRECISION (MANTISSA_BITS + 1)
-#define SIGNBIT 0x80000000
-#define SIGN(fp) ((fp.l.upper) & SIGNBIT)
-#define MANTD_LL(fp) ((fp.ll & (HIDDEND_LL-1)) | HIDDEND_LL)
-#define FRACD_LL(fp) (fp.ll & (HIDDEND_LL-1))
-#define HIDDEND_LL ((UDItype_x)1 << MANTISSA_BITS)
-#define LLONG_MAX 9223372036854775807LL
-#define LLONG_MIN (-LLONG_MAX - 1LL)
-
-typedef int DItype_x __attribute__ ((mode (DI)));
-typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
-typedef int SItype_x __attribute__ ((mode (SI)));
-typedef unsigned int USItype_x __attribute__ ((mode (SI)));
-
-union double_long {
- double d;
- struct {
- SItype_x upper;
- USItype_x lower;
- } l;
- UDItype_x ll;
-};
-
-static __inline__ void
-fexceptdiv (float d, float e)
-{
- __asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
-}
-
-DItype_x __fixdfdi (double a1);
-
-/* convert double to int */
-DItype_x
-__fixdfdi (double a1)
-{
- register union double_long dl1;
- register int exp;
- register DItype_x l;
-
- dl1.d = a1;
-
- /* +/- 0, denormalized */
- if (!EXPD (dl1))
- return 0;
-
- /* The exponent - considered the binary point at the right end of
- the mantissa. */
- exp = EXPD (dl1) - EXPONENT_BIAS - MANTISSA_BITS;
-
- /* number < 1 */
- if (exp <= -PRECISION)
- return 0;
-
- /* NaN */
-
- if ((EXPD(dl1) == 0x7ff) && (FRACD_LL(dl1) != 0)) /* NaN */
- {
- /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
- fexceptdiv (0.0, 0.0);
- return 0x8000000000000000ULL;
- }
-
- /* Number big number & +/- inf */
- if (exp >= 11) {
- /* Don't throw an exception for -1p+63 */
- if (!SIGN (dl1) || exp > 11 || FRACD_LL (dl1) != 0)
- /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
- fexceptdiv (0.0, 0.0);
- return SIGN (dl1) ? LLONG_MIN : LLONG_MAX;
- }
-
- l = MANTD_LL(dl1);
-
- /* shift down until exp < 12 or l = 0 */
- if (exp > 0)
- l <<= exp;
- else
- l >>= -exp;
-
- return (SIGN (dl1) ? -l : l);
-}
-#endif /* !__s390x__ */
+++ /dev/null
-/* Definitions of target machine for GNU compiler, for IBM S/390
- Copyright (C) 1999-2026 Free Software Foundation, Inc.
- Contributed by Hartmut Penner (hpenner@de.ibm.com) and
- Ulrich Weigand (uweigand@de.ibm.com).
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
-version.
-
-GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-#ifndef __s390x__
-
-#define EXPONENT_BIAS 127
-#define MANTISSA_BITS 23
-#define EXP(fp) (((fp.l) >> MANTISSA_BITS) & 0xFF)
-#define PRECISION (MANTISSA_BITS + 1)
-#define SIGNBIT 0x80000000
-#define SIGN(fp) ((fp.l) & SIGNBIT)
-#define HIDDEN (1 << MANTISSA_BITS)
-#define MANT(fp) (((fp.l) & 0x7FFFFF) | HIDDEN)
-#define FRAC(fp) ((fp.l) & 0x7FFFFF)
-#define LLONG_MAX 9223372036854775807LL
-#define LLONG_MIN (-LLONG_MAX - 1LL)
-
-typedef int DItype_x __attribute__ ((mode (DI)));
-typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
-typedef int SItype_x __attribute__ ((mode (SI)));
-typedef unsigned int USItype_x __attribute__ ((mode (SI)));
-
-union float_long
- {
- float f;
- USItype_x l;
- };
-
-static __inline__ void
-fexceptdiv (float d, float e)
-{
- __asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
-}
-
-DItype_x __fixsfdi (float a1);
-
-/* convert double to int */
-DItype_x
-__fixsfdi (float a1)
-{
- register union float_long fl1;
- register int exp;
- register DItype_x l;
-
- fl1.f = a1;
-
- /* +/- 0, denormalized */
- if (!EXP (fl1))
- return 0;
-
- exp = EXP (fl1) - EXPONENT_BIAS - MANTISSA_BITS;
-
- /* number < 1 */
- if (exp <= -PRECISION)
- return 0;
-
- /* NaN */
-
- if ((EXP (fl1) == 0xff) && (FRAC (fl1) != 0)) /* NaN */
- {
- /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
- fexceptdiv (0.0, 0.0);
- return 0x8000000000000000ULL;
- }
-
- /* Number big number & +/- inf */
- if (exp >= 40) {
- /* Don't throw an exception for -1p+63 */
- if (!SIGN (fl1) || exp > 40 || FRAC (fl1) != 0)
- /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
- fexceptdiv (0.0, 0.0);
- return SIGN (fl1) ? LLONG_MIN : LLONG_MAX;
- }
-
- l = MANT (fl1);
-
- if (exp > 0)
- l <<= exp;
- else
- l >>= -exp;
-
- return (SIGN (fl1) ? -l : l);
-}
-#endif /* !__s390x__ */
+++ /dev/null
-/* Definitions of target machine for GNU compiler, for IBM S/390
- Copyright (C) 1999-2026 Free Software Foundation, Inc.
- Contributed by Hartmut Penner (hpenner@de.ibm.com) and
- Ulrich Weigand (uweigand@de.ibm.com).
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
-version.
-
-GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-#ifndef __s390x__
-
-#define EXPD(fp) (((fp.l.i[0]) >> 16) & 0x7FFF)
-#define EXPONENT_BIAS 16383
-#define MANTISSA_BITS 112
-#define PRECISION (MANTISSA_BITS + 1)
-#define SIGNBIT 0x80000000
-#define SIGN(fp) ((fp.l.i[0]) & SIGNBIT)
-#define MANTD_HIGH_LL(fp) ((fp.ll[0] & HIGH_LL_FRAC_MASK) | HIGH_LL_UNIT_BIT)
-#define MANTD_LOW_LL(fp) (fp.ll[1])
-#define FRACD_ZERO_P(fp) (!fp.ll[1] && !(fp.ll[0] & HIGH_LL_FRAC_MASK))
-#define HIGH_LL_FRAC_BITS 48
-#define HIGH_LL_UNIT_BIT ((UDItype_x)1 << HIGH_LL_FRAC_BITS)
-#define HIGH_LL_FRAC_MASK (HIGH_LL_UNIT_BIT - 1)
-#define LLONG_MAX 9223372036854775807LL
-#define LLONG_MIN (-LLONG_MAX - 1LL)
-
-typedef int DItype_x __attribute__ ((mode (DI)));
-typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
-typedef int SItype_x __attribute__ ((mode (SI)));
-typedef unsigned int USItype_x __attribute__ ((mode (SI)));
-
-union double_long {
- long double d;
- struct {
- SItype_x i[4]; /* 32 bit parts: 0 upper ... 3 lowest */
- } l;
- UDItype_x ll[2]; /* 64 bit parts: 0 upper, 1 lower */
-};
-
-static __inline__ void
-fexceptdiv (float d, float e)
-{
- __asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
-}
-
-DItype_x __fixtfdi (long double a1);
-
-/* convert double to unsigned int */
-DItype_x
-__fixtfdi (long double a1)
-{
- register union double_long dl1;
- register int exp;
- register UDItype_x l;
-
- dl1.d = a1;
-
- /* +/- 0, denormalized */
- if (!EXPD (dl1))
- return 0;
-
- /* The exponent - considered the binary point at the right end of
- the mantissa. */
- exp = EXPD (dl1) - EXPONENT_BIAS - MANTISSA_BITS;
-
- /* number < 1: If the mantissa would need to be right-shifted more bits than
- its size the result would be zero. */
- if (exp <= -PRECISION)
- return 0;
-
- /* NaN: All exponent bits set and a nonzero fraction. */
- if ((EXPD(dl1) == 0x7fff) && !FRACD_ZERO_P (dl1))
- {
- /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
- fexceptdiv (0.0, 0.0);
- return 0x8000000000000000ULL;
- }
-
- /* One extra bit is needed for the unit bit which is appended by
- MANTD_HIGH_LL on the left of the matissa. */
- exp += HIGH_LL_FRAC_BITS + 1;
-
- /* If the result would still need a left shift it will be too large
- to be represented. Compared to the unsigned variant we have to
- take care that there is still space for the sign bit to be
- applied. So we can only go on if there is a right-shift by one
- or more. */
- if (exp >= 0)
- {
- /* Don't throw an exception for -1p+63 */
- if (!SIGN (dl1)
- || exp > 0
- || MANTD_LOW_LL (dl1) >> (HIGH_LL_FRAC_BITS + 1)
- || (dl1.ll[0] & HIGH_LL_FRAC_MASK))
- /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
- fexceptdiv (0.0, 0.0);
- return SIGN (dl1) ? LLONG_MIN : LLONG_MAX;
- }
-
- l = MANTD_LOW_LL (dl1) >> (HIGH_LL_FRAC_BITS + 1)
- | MANTD_HIGH_LL (dl1) << (64 - (HIGH_LL_FRAC_BITS + 1));
-
- return SIGN (dl1) ? -(l >> -exp) : l >> -exp;
-}
-#endif /* !__s390x__ */
+++ /dev/null
-/* Definitions of target machine for GNU compiler, for IBM S/390
- Copyright (C) 1999-2026 Free Software Foundation, Inc.
- Contributed by Hartmut Penner (hpenner@de.ibm.com) and
- Ulrich Weigand (uweigand@de.ibm.com).
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
-version.
-
-GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-#ifndef __s390x__
-
-#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
-#define EXPONENT_BIAS 1023
-#define MANTISSA_BITS 52
-#define PRECISION (MANTISSA_BITS + 1)
-#define SIGNBIT 0x80000000
-#define SIGN(fp) ((fp.l.upper) & SIGNBIT)
-#define MANTD_LL(fp) ((fp.ll & (HIDDEND_LL-1)) | HIDDEND_LL)
-#define FRACD_LL(fp) (fp.ll & (HIDDEND_LL-1))
-#define HIDDEND_LL ((UDItype_x)1 << 52)
-
-typedef int DItype_x __attribute__ ((mode (DI)));
-typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
-typedef int SItype_x __attribute__ ((mode (SI)));
-typedef unsigned int USItype_x __attribute__ ((mode (SI)));
-
-union double_long {
- double d;
- struct {
- SItype_x upper;
- USItype_x lower;
- } l;
- UDItype_x ll;
-};
-
-static __inline__ void
-fexceptdiv (float d, float e)
-{
- __asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
-}
-
-UDItype_x __fixunsdfdi (double a1);
-
-/* convert double to unsigned int */
-UDItype_x
-__fixunsdfdi (double a1)
-{
- register union double_long dl1;
- register int exp;
- register UDItype_x l;
-
- dl1.d = a1;
-
- /* +/- 0, denormalized */
- if (!EXPD (dl1))
- return 0;
-
- /* Negative. */
- if (SIGN (dl1))
- {
- /* Value is <= -1.0
- C99 Annex F.4 requires an "invalid" exception to be thrown. */
- if (EXPD (dl1) >= EXPONENT_BIAS)
- fexceptdiv (0.0, 0.0);
- return 0;
- }
-
- exp = EXPD (dl1) - EXPONENT_BIAS - MANTISSA_BITS;
-
- /* number < 1 */
-
- if (exp < -PRECISION)
- return 0;
-
- /* NaN */
-
- if ((EXPD(dl1) == 0x7ff) && (FRACD_LL(dl1) != 0)) /* NaN */
- {
- /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
- fexceptdiv (0.0, 0.0);
- return 0x0ULL;
- }
-
- /* Number big number & + inf */
-
- if (exp >= 12)
- {
- /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
- fexceptdiv (0.0, 0.0);
- return 0xFFFFFFFFFFFFFFFFULL;
- }
-
- l = MANTD_LL(dl1);
-
- /* shift down until exp < 12 or l = 0 */
- if (exp > 0)
- l <<= exp;
- else
- l >>= -exp;
-
- return l;
-}
-#endif /* !__s390x__ */
+++ /dev/null
-/* Definitions of target machine for GNU compiler, for IBM S/390
- Copyright (C) 1999-2026 Free Software Foundation, Inc.
- Contributed by Hartmut Penner (hpenner@de.ibm.com) and
- Ulrich Weigand (uweigand@de.ibm.com).
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
-version.
-
-GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-#ifndef __s390x__
-
-#define EXPONENT_BIAS 127
-#define MANTISSA_BITS 23
-#define EXP(fp) (((fp.l) >> MANTISSA_BITS) & 0xFF)
-#define SIGNBIT 0x80000000
-#define SIGN(fp) ((fp.l) & SIGNBIT)
-#define HIDDEN (1 << MANTISSA_BITS)
-#define MANT(fp) (((fp.l) & 0x7FFFFF) | HIDDEN)
-#define FRAC(fp) ((fp.l) & 0x7FFFFF)
-
-typedef int DItype_x __attribute__ ((mode (DI)));
-typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
-typedef int SItype_x __attribute__ ((mode (SI)));
-typedef unsigned int USItype_x __attribute__ ((mode (SI)));
-
-union float_long
- {
- float f;
- USItype_x l;
- };
-
-static __inline__ void
-fexceptdiv (float d, float e)
-{
- __asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
-}
-
-UDItype_x __fixunssfdi (float a1);
-
-/* convert float to unsigned int */
-UDItype_x
-__fixunssfdi (float a1)
-{
- register union float_long fl1;
- register int exp;
- register UDItype_x l;
-
- fl1.f = a1;
-
- /* +/- 0, denormalized */
- if (!EXP (fl1))
- return 0;
-
- /* Negative. */
- if (SIGN (fl1))
- {
- /* Value is <= -1.0
- C99 Annex F.4 requires an "invalid" exception to be thrown. */
- if (EXP (fl1) >= EXPONENT_BIAS)
- fexceptdiv (0.0, 0.0);
- return 0;
- }
-
- exp = EXP (fl1) - EXPONENT_BIAS - MANTISSA_BITS;
-
- /* number < 1 */
- if (exp < -24)
- return 0;
-
- /* NaN */
-
- if ((EXP (fl1) == 0xff) && (FRAC (fl1) != 0)) /* NaN */
- {
- /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
- fexceptdiv (0.0, 0.0);
- return 0x0ULL;
- }
-
- /* Number big number & + inf */
-
- if (exp >= 41)
- {
- /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
- fexceptdiv (0.0, 0.0);
- return 0xFFFFFFFFFFFFFFFFULL;
- }
-
- l = MANT (fl1);
-
- if (exp > 0)
- l <<= exp;
- else
- l >>= -exp;
-
- return l;
-}
-#endif /* !__s390x__ */
+++ /dev/null
-/* Definitions of target machine for GNU compiler, for IBM S/390
- Copyright (C) 1999-2026 Free Software Foundation, Inc.
- Contributed by Hartmut Penner (hpenner@de.ibm.com) and
- Ulrich Weigand (uweigand@de.ibm.com).
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
-version.
-
-GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-#ifndef __s390x__
-
-#define EXPD(fp) (((fp.l.i[0]) >> 16) & 0x7FFF)
-#define EXPONENT_BIAS 16383
-#define MANTISSA_BITS 112
-#define PRECISION (MANTISSA_BITS + 1)
-#define SIGNBIT 0x80000000
-#define SIGND(fp) ((fp.l.i[0]) & SIGNBIT)
-#define MANTD_HIGH_LL(fp) ((fp.ll[0] & HIGH_LL_FRAC_MASK) | HIGH_LL_UNIT_BIT)
-#define MANTD_LOW_LL(fp) (fp.ll[1])
-#define FRACD_ZERO_P(fp) (!fp.ll[1] && !(fp.ll[0] & HIGH_LL_FRAC_MASK))
-#define HIGH_LL_FRAC_BITS 48
-#define HIGH_LL_UNIT_BIT ((UDItype_x)1 << HIGH_LL_FRAC_BITS)
-#define HIGH_LL_FRAC_MASK (HIGH_LL_UNIT_BIT - 1)
-
-typedef int DItype_x __attribute__ ((mode (DI)));
-typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
-typedef int SItype_x __attribute__ ((mode (SI)));
-typedef unsigned int USItype_x __attribute__ ((mode (SI)));
-
-union double_long {
- long double d;
- struct {
- SItype_x i[4]; /* 32 bit parts: 0 upper ... 3 lowest */
- } l;
- UDItype_x ll[2]; /* 64 bit parts: 0 upper, 1 lower */
-};
-
-static __inline__ void
-fexceptdiv (float d, float e)
-{
- __asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
-}
-
-UDItype_x __fixunstfdi (long double a1);
-
-/* convert double to unsigned int */
-UDItype_x
-__fixunstfdi (long double a1)
-{
- register union double_long dl1;
- register int exp;
- register UDItype_x l;
-
- dl1.d = a1;
-
- /* +/- 0, denormalized */
- if (!EXPD (dl1))
- return 0;
-
- /* Negative. */
- if (SIGND (dl1))
- {
- /* Value is <= -1.0
- C99 Annex F.4 requires an "invalid" exception to be thrown. */
- if (EXPD (dl1) >= EXPONENT_BIAS)
- fexceptdiv (0.0, 0.0);
- return 0;
- }
-
- /* The exponent - considered the binary point at the right end of
- the mantissa. */
- exp = EXPD (dl1) - EXPONENT_BIAS - MANTISSA_BITS;
-
- /* number < 1: If the mantissa would need to be right-shifted more bits than
- its size (plus the implied one bit on the left) the result would be
- zero. */
- if (exp <= -PRECISION)
- return 0;
-
- /* NaN: All exponent bits set and a nonzero fraction. */
- if ((EXPD(dl1) == 0x7fff) && !FRACD_ZERO_P (dl1))
- {
- /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
- fexceptdiv (0.0, 0.0);
- return 0;
- }
-
- /* One extra bit is needed for the unit bit which is appended by
- MANTD_HIGH_LL on the left of the matissa. */
- exp += HIGH_LL_FRAC_BITS + 1;
-
- /* If the result would still need a left shift it will be too
- large to be represented. Infinities have all exponent bits set
- and will end up here as well. */
- if (exp > 0)
- {
- /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
- fexceptdiv (0.0, 0.0);
- return 0xFFFFFFFFFFFFFFFFULL;
- }
-
- l = MANTD_LOW_LL (dl1) >> (HIGH_LL_FRAC_BITS + 1)
- | MANTD_HIGH_LL (dl1) << (64 - (HIGH_LL_FRAC_BITS + 1));
-
- return l >> -exp;
-}
-
-#endif /* !__s390x__ */
+++ /dev/null
-floattodi-functions = _fixsfdi _fixdfdi _fixtfdi _fixunssfdi _fixunsdfdi _fixunstfdi
-LIB2FUNCS_EXCLUDE += $(floattodi-functions)
-
-floattodi-src = $(addsuffix .c, $(floattodi-functions))
-LIB2ADD = $(addprefix $(srcdir)/config/s390/32/, $(floattodi-src))
# because GLIBC_2.0 does not exist on this architecture, as the first
# ever glibc release on the platform was GLIBC_2.2.
-%ifndef __s390x__
-%exclude {
- __divdi3
- __moddi3
- __udivdi3
- __umoddi3
- __register_frame
- __register_frame_table
- __deregister_frame
- __register_frame_info
- __deregister_frame_info
- __frame_state_for
- __register_frame_info_table
-}
-
-%inherit GCC_3.0 GLIBC_2.0
-GLIBC_2.0 {
- __divdi3
- __moddi3
- __udivdi3
- __umoddi3
-
- __register_frame
- __register_frame_table
- __deregister_frame
- __register_frame_info
- __deregister_frame_info
- __frame_state_for
- __register_frame_info_table
-}
-%endif
-
-%ifdef __s390x__
%exclude {
__register_frame
__register_frame_table
__frame_state_for
__register_frame_info_table
}
-%endif
# With GCC 4.1.0 long double 128 bit support was introduced. The
# following symbols coming from libgcc are enabled when -mlong-double-128
__multc3
__powitf2
-%ifdef __s390x__
__fixtfti
__fixunstfti
__floattitf
-
-%else
- __fixtfdi
- __fixunstfdi
- __floatditf
-%endif
}
-%ifdef __s390x__
%inherit GCC_16.0.0 GCC_4.1.0
GCC_16.0.0 {
__mulbitint3
__floattihf
__floatuntihf
}
-%endif
.LFB1:
.cfi_startproc
-
-#ifndef __s390x__
-
-
-# The 31-bit __morestack function.
-
- # We use a cleanup to restore the stack guard if an exception
- # is thrown through this code.
-#ifndef __PIC__
- .cfi_personality 0,__gcc_personality_v0
- .cfi_lsda 0,.LLSDA1
-#else
- .cfi_personality 0x9b,DW.ref.__gcc_personality_v0
- .cfi_lsda 0x1b,.LLSDA1
-#endif
-
- stm %r2, %r15, 0x8(%r15) # Save %r2-%r15.
- .cfi_offset %r6, -0x48
- .cfi_offset %r7, -0x44
- .cfi_offset %r8, -0x40
- .cfi_offset %r9, -0x3c
- .cfi_offset %r10, -0x38
- .cfi_offset %r11, -0x34
- .cfi_offset %r12, -0x30
- .cfi_offset %r13, -0x2c
- .cfi_offset %r14, -0x28
- .cfi_offset %r15, -0x24
- lr %r11, %r15 # Make frame pointer for vararg.
- .cfi_def_cfa_register %r11
- ahi %r15, -0x60 # 0x60 for standard frame.
- st %r11, 0(%r15) # Save back chain.
- lr %r8, %r0 # Save %r0 (static chain).
- lr %r10, %r1 # Save %r1 (address of parameter block).
-
- l %r7, 0(%r10) # Required frame size to %r7
- ear %r1, %a0 # Extract thread pointer.
- l %r1, 0x20(%r1) # Get stack bounduary
- ar %r1, %r7 # Stack bounduary + frame size
- a %r1, 4(%r10) # + stack param size
- clr %r1, %r15 # Compare with current stack pointer
- jle .Lnoalloc # guard > sp - frame-size: need alloc
-
- brasl %r14, __morestack_block_signals
-
- # We abuse one of caller's fpr save slots (which we don't use for fprs)
- # as a local variable. Not needed here, but done to be consistent with
- # the below use.
- ahi %r7, BACKOFF # Bump requested size a bit.
- st %r7, 0x40(%r11) # Stuff frame size on stack.
- la %r2, 0x40(%r11) # Pass its address as parameter.
- la %r3, 0x60(%r11) # Caller's stack parameters.
- l %r4, 4(%r10) # Size of stack parameters.
- brasl %r14, __generic_morestack
-
- lr %r15, %r2 # Switch to the new stack.
- ahi %r15, -0x60 # Make a stack frame on it.
- st %r11, 0(%r15) # Save back chain.
-
- s %r2, 0x40(%r11) # The end of stack space.
- ahi %r2, BACKOFF # Back off a bit.
- ear %r1, %a0 # Extract thread pointer.
-.LEHB0:
- st %r2, 0x20(%r1) # Save the new stack boundary.
-
- brasl %r14, __morestack_unblock_signals
-
- lr %r0, %r8 # Static chain.
- lm %r2, %r6, 0x8(%r11) # Paremeter registers.
-
- # Third parameter is address of function meat - address of parameter
- # block.
- a %r10, 0x8(%r10)
-
- # Leave vararg pointer in %r1, in case function uses it
- la %r1, 0x60(%r11)
-
- # State of registers:
- # %r0: Static chain from entry.
- # %r1: Vararg pointer.
- # %r2-%r6: Parameters from entry.
- # %r7-%r10: Indeterminate.
- # %r11: Frame pointer (%r15 from entry).
- # %r12-%r13: Indeterminate.
- # %r14: Return address.
- # %r15: Stack pointer.
- basr %r14, %r10 # Call our caller.
-
- stm %r2, %r3, 0x8(%r11) # Save return registers.
-
- brasl %r14, __morestack_block_signals
-
- # We need a stack slot now, but have no good way to get it - the frame
- # on new stack had to be exactly 0x60 bytes, or stack parameters would
- # be passed wrong. Abuse fpr save area in caller's frame (we don't
- # save actual fprs).
- la %r2, 0x40(%r11)
- brasl %r14, __generic_releasestack
-
- s %r2, 0x40(%r11) # Subtract available space.
- ahi %r2, BACKOFF # Back off a bit.
- ear %r1, %a0 # Extract thread pointer.
-.LEHE0:
- st %r2, 0x20(%r1) # Save the new stack boundary.
-
- # We need to restore the old stack pointer before unblocking signals.
- # We also need 0x60 bytes for a stack frame. Since we had a stack
- # frame at this place before the stack switch, there's no need to
- # write the back chain again.
- lr %r15, %r11
- ahi %r15, -0x60
-
- brasl %r14, __morestack_unblock_signals
-
- lm %r2, %r15, 0x8(%r11) # Restore all registers.
- .cfi_remember_state
- .cfi_restore %r15
- .cfi_restore %r14
- .cfi_restore %r13
- .cfi_restore %r12
- .cfi_restore %r11
- .cfi_restore %r10
- .cfi_restore %r9
- .cfi_restore %r8
- .cfi_restore %r7
- .cfi_restore %r6
- .cfi_def_cfa_register %r15
- br %r14 # Return to caller's caller.
-
-# Executed if no new stack allocation is needed.
-
-.Lnoalloc:
- .cfi_restore_state
- # We may need to copy stack parameters.
- l %r9, 0x4(%r10) # Load stack parameter size.
- ltr %r9, %r9 # And check if it's 0.
- je .Lnostackparm # Skip the copy if not needed.
- sr %r15, %r9 # Make space on the stack.
- la %r8, 0x60(%r15) # Destination.
- la %r12, 0x60(%r11) # Source.
- lr %r13, %r9 # Source size.
-.Lcopy:
- mvcle %r8, %r12, 0 # Copy.
- jo .Lcopy
-
-.Lnostackparm:
- # Third parameter is address of function meat - address of parameter
- # block.
- a %r10, 0x8(%r10)
-
- # Leave vararg pointer in %r1, in case function uses it
- la %r1, 0x60(%r11)
-
- # OK, no stack allocation needed. We still follow the protocol and
- # call our caller - it doesn't cost much and makes sure vararg works.
- # No need to set any registers here - %r0 and %r2-%r6 weren't modified.
- basr %r14, %r10 # Call our caller.
-
- lm %r6, %r15, 0x18(%r11) # Restore all callee-saved registers.
- .cfi_remember_state
- .cfi_restore %r15
- .cfi_restore %r14
- .cfi_restore %r13
- .cfi_restore %r12
- .cfi_restore %r11
- .cfi_restore %r10
- .cfi_restore %r9
- .cfi_restore %r8
- .cfi_restore %r7
- .cfi_restore %r6
- .cfi_def_cfa_register %r15
- br %r14 # Return to caller's caller.
-
-# This is the cleanup code called by the stack unwinder when unwinding
-# through the code between .LEHB0 and .LEHE0 above.
-
-.L1:
- .cfi_restore_state
- lr %r2, %r11 # Stack pointer after resume.
- brasl %r14, __generic_findstack
- lr %r3, %r11 # Get the stack pointer.
- sr %r3, %r2 # Subtract available space.
- ahi %r3, BACKOFF # Back off a bit.
- ear %r1, %a0 # Extract thread pointer.
- st %r3, 0x20(%r1) # Save the new stack boundary.
-
- # We need GOT pointer in %r12 for PLT entry.
- larl %r12,_GLOBAL_OFFSET_TABLE_
- lr %r2, %r6 # Exception header.
-#ifdef __PIC__
- brasl %r14, _Unwind_Resume@PLT
-#else
- brasl %r14, _Unwind_Resume
-#endif
-
-#else /* defined(__s390x__) */
-
-
-# The 64-bit __morestack function.
-
# We use a cleanup to restore the stack guard if an exception
# is thrown through this code.
#ifndef __PIC__
brasl %r14, _Unwind_Resume
#endif
-#endif /* defined(__s390x__) */
-
.cfi_endproc
.size __morestack, . - __morestack
__stack_split_initialize:
-#ifndef __s390x__
-
- ear %r1, %a0
- lr %r0, %r15
- ahi %r0, -0x4000 # We should have at least 16K.
- st %r0, 0x20(%r1)
-
- lr %r2, %r15
- lhi %r3, 0x4000
-#ifdef __PIC__
- jg __generic_morestack_set_initial_sp@PLT # Tail call
-#else
- jg __generic_morestack_set_initial_sp # Tail call
-#endif
-
-#else /* defined(__s390x__) */
-
ear %r1, %a0
sllg %r1, %r1, 32
ear %r1, %a1
jg __generic_morestack_set_initial_sp # Tail call
#endif
-#endif /* defined(__s390x__) */
-
.size __stack_split_initialize, . - __stack_split_initialize
# Routines to get and set the guard, for __splitstack_getcontext,
__morestack_get_guard:
-#ifndef __s390x__
- ear %r1, %a0
- l %r2, 0x20(%r1)
-#else
ear %r1, %a0
sllg %r1, %r1, 32
ear %r1, %a1
lg %r2, 0x38(%r1)
-#endif
br %r14
.size __morestack_get_guard, . - __morestack_get_guard
__morestack_set_guard:
-#ifndef __s390x__
- ear %r1, %a0
- st %r2, 0x20(%r1)
-#else
ear %r1, %a0
sllg %r1, %r1, 32
ear %r1, %a1
stg %r2, 0x38(%r1)
-#endif
br %r14
.size __morestack_set_guard, . - __morestack_set_guard
__morestack_make_guard:
-#ifndef __s390x__
- sr %r2, %r3
- ahi %r2, BACKOFF
-#else
sgr %r2, %r3
aghi %r2, BACKOFF
-#endif
br %r14
.size __morestack_make_guard, . - __morestack_make_guard
.section .ctors.65535,"aw",@progbits
#endif
-#ifndef __LP64__
- .align 4
- .long __stack_split_initialize
- .long __morestack_load_mmap
-#else
.align 8
.quad __stack_split_initialize
.quad __morestack_load_mmap
-#endif
.section .note.GNU-stack,"",@progbits
.section .note.GNU-split-stack,"",@progbits
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
-#if ! __s390x__
-# error "soft-fp implemented for s390x only"
-#endif
-
#define _FP_W_TYPE_SIZE 64
#define _FP_W_TYPE unsigned long long
#define _FP_WS_TYPE signed long long
esac
case ${host} in
-s390*-*-linux*)
+s390x-*-linux*)
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking Support float16 on s390" >&5
$as_echo_n "checking Support float16 on s390... " >&6; }
if ${libgcc_cv_s390_float16+:} false; then :
esac
case ${host} in
-s390*-*-linux*)
+s390x-*-linux*)
AC_CACHE_CHECK([Support float16 on s390],
[libgcc_cv_s390_float16],
[AC_COMPILE_IFELSE(
#elif defined __powerpc64__
#elif defined __s390x__
nsp -= 2 * 160;
-#elif defined __s390__
- nsp -= 2 * 96;
#else
#error "unrecognized target"
#endif
powerpc64*)
abi_baseline_pair=powerpc64-linux-gnu
;;
- s390)
- abi_baseline_pair=s390-linux-gnu
- ;;
s390x)
abi_baseline_pair=s390x-linux-gnu
;;
/* _ITM_beginTransaction (int props); props -> r2 */
_ITM_beginTransaction:
cfi_startproc
-#ifdef __s390x__
lgr %r3,%r15 /* backup stack pointer */
aghi %r15,-304 /* jump buffer (144) + reg save area (160) */
cfi_adjust_cfa_offset(304)
aghi %r15,304
cfi_adjust_cfa_offset(-304)
br %r1
-#else
- lr %r3,%r15 /* backup stack pointer */
- ahi %r15,-152 /* jump buffer (56) + reg save area (96) */
- cfi_adjust_cfa_offset(152)
- stm %r6,%r14,96(%r15)
- st %r3,36+96(%r15) /* store the old stack pointer */
- std %f4,40+96(%r15)
- std %f6,48+96(%r15)
- la %r3,96(%r15) /* second argument to GTM_begin_transaction */
- /* begin_transaction (uint32_t prop, const gtm_jmpbuf *jb) */
- brasl %r14,GTM_begin_transaction /* requires mzarch */
- l %r1,32+96(%r15)
- ahi %r15,152
- cfi_adjust_cfa_offset(-152)
- br %r1
-#endif
cfi_endproc
.size _ITM_beginTransaction, .-_ITM_beginTransaction
_ITM_beginTransaction (r2).
Third parameter is ignored for now. */
cfi_startproc
-#ifdef __s390x__
ld %f8,80(%r3)
ld %f9,88(%r3)
ld %f10,96(%r3)
ld %f15,136(%r3)
lmg %r6,%r15,0(%r3)
br %r14
-#else
- ld %f4,40(%r3)
- ld %f6,48(%r3)
- lm %r6,%r15,0(%r3)
- br %r14
-#endif
cfi_endproc
.size GTM_longjmp, .-GTM_longjmp
powerpc64*)
abi_baseline_pair=powerpc64-linux-gnu
;;
- s390)
- abi_baseline_pair=s390-linux-gnu
- ;;
s390x)
abi_baseline_pair=s390x-linux-gnu
;;
projects / thirdparty / gcc.git / commitdiff
