re PR target/15693 (ICE - unrecognizable insn)

	PR target/15693
	* config/sparc/sparc.c (compare_operand): New predicate.
	* config/sparc/sparc.h (PREDICATE_CODES): Add it.
	* config/sparc/sparc.md (cmpsi expander): Use it.  If the first
	operand is a ZERO_EXTRACT and the second operand is not zero,
	force the former to a register.
	(cmpdi expander): Likewise.

From-SVN: r82504

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 15d13c9c7bc1753ca2c95a8f5e81d682067e5482..3a10fe3e5fb2c5c65fc3615dc2d5a18135e664d8 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2004-05-31  Eric Botcazou  <ebotcazou@libertysurf.fr>
+
+       PR target/15693
+       * config/sparc/sparc.c (compare_operand): New predicate.
+       * config/sparc/sparc.h (PREDICATE_CODES): Add it.
+       * config/sparc/sparc.md (cmpsi expander): Use it.  If the first
+       operand is a ZERO_EXTRACT and the second operand is not zero,
+       force the former to a register.
+       (cmpdi expander): Likewise.
+
 2004-05-29  Eric Botcazou  <ebotcazou@libertysurf.fr>
 
        PR optimization/13653

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 324ec0549cfde02e584e67b00de94032024fecd5..931114f5db843c877ac4947b8ff1aa97c1744ddb 100644 (file)
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -1357,6 +1357,34 @@ input_operand (op, mode)
   return 0;
 }
 
+/* Return 1 if OP is valid for the lhs of a compare insn.  */
+
+int
+compare_operand (op, mode)
+     rtx op;
+     enum machine_mode mode;
+{
+  if (GET_CODE (op) == ZERO_EXTRACT)
+    return (register_operand (XEXP (op, 0), mode)
+           && small_int_or_double (XEXP (op, 1), mode)
+           && small_int_or_double (XEXP (op, 2), mode)
+           /* This matches cmp_zero_extract.  */
+           && ((mode == SImode
+                && ((GET_CODE (XEXP (op, 2)) == CONST_INT
+                     && INTVAL (XEXP (op, 2)) > 19)
+                    || (GET_CODE (XEXP (op, 2)) == CONST_DOUBLE
+                        && CONST_DOUBLE_LOW (XEXP (op, 2)) > 19)))
+               /* This matches cmp_zero_extract_sp64.  */
+               || (mode == DImode
+                   && TARGET_ARCH64
+                   && ((GET_CODE (XEXP (op, 2)) == CONST_INT
+                        && INTVAL (XEXP (op, 2)) > 51)
+                       || (GET_CODE (XEXP (op, 2)) == CONST_DOUBLE
+                           && CONST_DOUBLE_LOW (XEXP (op, 2)) > 51)))));
+  else
+    return register_operand (op, mode);
+}
+
 \f
 /* We know it can't be done in one insn when we get here,
    the movsi expander guarentees this.  */

diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 30a7181b4e1570d69d086b6fec46126081240af7..9f5911c13ae0fc708008ec7b7de25ec31ea3e461 100644 (file)
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -3059,6 +3059,7 @@ do {                                                                      \
 {"uns_arith_operand", {SUBREG, REG, CONST_INT}},                       \
 {"clobbered_register", {REG}},                                         \
 {"input_operand", {SUBREG, REG, CONST_INT, MEM, CONST}},               \
+{"compare_operand", {SUBREG, REG, ZERO_EXTRACT}},                      \
 {"const64_operand", {CONST_INT, CONST_DOUBLE}},                                \
 {"const64_high_operand", {CONST_INT, CONST_DOUBLE}},
 

diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 01e031ebadbbab22036b7ef490c948a80d5321fc..8c3e7c03f7cdf548874d395ae18136a0b5b87112 100644 (file)
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -290,10 +290,13 @@
 
 (define_expand "cmpsi"
   [(set (reg:CC 100)
-       (compare:CC (match_operand:SI 0 "register_operand" "")
+       (compare:CC (match_operand:SI 0 "compare_operand" "")
                    (match_operand:SI 1 "arith_operand" "")))]
   ""
 {
+  if (GET_CODE (operands[0]) == ZERO_EXTRACT && operands[1] != const0_rtx)
+    operands[0] = force_reg (SImode, operands[0]);
+
   sparc_compare_op0 = operands[0];
   sparc_compare_op1 = operands[1];
   DONE;
@@ -301,10 +304,13 @@
 
 (define_expand "cmpdi"
   [(set (reg:CCX 100)
-       (compare:CCX (match_operand:DI 0 "register_operand" "")
+       (compare:CCX (match_operand:DI 0 "compare_operand" "")
                     (match_operand:DI 1 "arith_double_operand" "")))]
   "TARGET_ARCH64"
 {
+  if (GET_CODE (operands[0]) == ZERO_EXTRACT && operands[1] != const0_rtx)
+    operands[0] = force_reg (DImode, operands[0]);
+
   sparc_compare_op0 = operands[0];
   sparc_compare_op1 = operands[1];
   DONE;

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6b936943bef3a73af8adf5c1c1ffc95ec0813eff..cf5512853212d534cf68e4d0675bd68a41cef6b8 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2004-05-31  Eric Botcazou  <ebotcazou@libertysurf.fr>
+
+       * gcc.dg/sparc-trap-1.c: New test.
+
 2004-05-26  Hans-Peter Nilsson  <hp@axis.com>
 
        PR optimization/15296