net: macb: split USRIO_HAS_CLKEN capability in two

While trying to rework the internal/external refclk selection on
sama7g5, Ryan and I noticed that the sama7g5 was "overloading" the
meaning of MACB_CAPS_USRIO_HAS_CLKEN, using it differently to how it was
originally intended.
Originally, on the macb hardware on sam9620 et al,
MACB_CAPS_USRIO_HAS_CLKEN represented the hardware having a bit that
needed to be set to turn on the input clock to the transceivers. The
sama7g5 doesn't have this bit, so for some reason the decision was made
to reuse this capability flag to control selection of internal/external
references.

Split the caps in two, so that capabilities do what they say on the tin,
and allow reworking the refclk selection handling without impacting the
older devices that use MACB_CAPS_USRIO_CLKEN for its original purpose.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260325-gradient-grading-b23b9e6ef9ff@spud
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 32217de5e0730bd92db1a400ecd3bc34e67b0d5e..35b7129d7c1ee4960f2e76d41a57c583e36ad828 100644 (file)
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -787,6 +787,7 @@
 #define MACB_CAPS_NO_LSO                       BIT(24)
 #define MACB_CAPS_EEE                          BIT(25)
 #define MACB_CAPS_USRIO_HAS_MII                        BIT(26)
+#define MACB_CAPS_USRIO_HAS_REFCLK_SOURCE      BIT(27)
 
 /* LSO settings */
 #define MACB_LSO_UFO_ENABLE                    0x01
@@ -1226,6 +1227,7 @@ struct macb_usrio_config {
        u32 rmii;
        u32 rgmii;
        u32 refclk;
+       u32 clken;
        u32 hdfctlen;
 };
 

diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index a96d2cf5355ddd02288229fca9890765f142b6ed..545d9222ea1fa8cea4283eb7c6b192fba3fd798d 100644 (file)
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -4615,7 +4615,7 @@ static void macb_configure_caps(struct macb *bp,
        }
 
        if (refclk_ext)
-               bp->caps |= MACB_CAPS_USRIO_HAS_CLKEN;
+               bp->caps |= MACB_CAPS_USRIO_HAS_REFCLK_SOURCE;
 
        dev_dbg(&bp->pdev->dev, "Cadence caps 0x%08x\n", bp->caps);
 }
@@ -4895,6 +4895,9 @@ static int macb_init_dflt(struct platform_device *pdev)
                }
 
                if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
+                       val |= bp->usrio->clken;
+
+               if (bp->caps & MACB_CAPS_USRIO_HAS_REFCLK_SOURCE)
                        val |= bp->usrio->refclk;
 
                macb_or_gem_writel(bp, USRIO, val);
@@ -5497,7 +5500,7 @@ static const struct macb_usrio_config at91_default_usrio = {
        .mii = MACB_BIT(MII),
        .rmii = MACB_BIT(RMII),
        .rgmii = GEM_BIT(RGMII),
-       .refclk = MACB_BIT(CLKEN),
+       .clken = MACB_BIT(CLKEN),
 };
 
 static const struct macb_usrio_config sama7g5_usrio = {
@@ -5615,6 +5618,7 @@ static const struct macb_config mpfs_config = {
 static const struct macb_config sama7g5_gem_config = {
        .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG |
                MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII |
+               MACB_CAPS_USRIO_HAS_REFCLK_SOURCE |
                MACB_CAPS_MIIONRGMII | MACB_CAPS_GEM_HAS_PTP |
                MACB_CAPS_USRIO_HAS_MII,
        .dma_burst_length = 16,
@@ -5623,7 +5627,8 @@ static const struct macb_config sama7g5_gem_config = {
 
 static const struct macb_config sama7g5_emac_config = {
        .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII |
-               MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_MIIONRGMII |
+               MACB_CAPS_MIIONRGMII |
+               MACB_CAPS_USRIO_HAS_REFCLK_SOURCE |
                MACB_CAPS_GEM_HAS_PTP |
                MACB_CAPS_USRIO_HAS_MII,
        .dma_burst_length = 16,