arm64: dts: zynqmp: Update the GPU address size

The correct register size is 0x10000, otherwise
it overlaps with other register space.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 4eaa9ebe756e9ae8e8c3b187a068ec37848d69df..5d17e9bdd9a72a36ea126f41d5582249a30a6746 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -540,7 +540,7 @@
                gpu: gpu@fd4b0000 {
                        status = "disabled";
                        compatible = "arm,mali-400", "arm,mali-utgard";
-                       reg = <0x0 0xfd4b0000 0x0 0x30000>;
+                       reg = <0x0 0xfd4b0000 0x0 0x10000>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
                        interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";