pinctrl: airoha: an7581: fix misprint in gpio19 pinconf

Pin 32 (gpio19) duplicate pinconf settings of pin 31. Fix it using
a proper bit number in the configuration register.

Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>

diff --git a/drivers/pinctrl/airoha/pinctrl-airoha.c b/drivers/pinctrl/airoha/pinctrl-airoha.c
index 6ad44545675d9b3d1a7022fc98f857bb11eaef51..0725a7ece25d98db70ed675d05fdbb2410cea7e5 100644 (file)
--- a/drivers/pinctrl/airoha/pinctrl-airoha.c
+++ b/drivers/pinctrl/airoha/pinctrl-airoha.c
@@ -1798,7 +1798,7 @@ static const struct airoha_pinctrl_conf en7581_pinctrl_pullup_conf[] = {
        PINCTRL_CONF_DESC(29, REG_GPIO_L_PU, BIT(16)),
        PINCTRL_CONF_DESC(30, REG_GPIO_L_PU, BIT(17)),
        PINCTRL_CONF_DESC(31, REG_GPIO_L_PU, BIT(18)),
-       PINCTRL_CONF_DESC(32, REG_GPIO_L_PU, BIT(18)),
+       PINCTRL_CONF_DESC(32, REG_GPIO_L_PU, BIT(19)),
        PINCTRL_CONF_DESC(33, REG_GPIO_L_PU, BIT(20)),
        PINCTRL_CONF_DESC(34, REG_GPIO_L_PU, BIT(21)),
        PINCTRL_CONF_DESC(35, REG_GPIO_L_PU, BIT(22)),
@@ -1915,7 +1915,7 @@ static const struct airoha_pinctrl_conf en7581_pinctrl_pulldown_conf[] = {
        PINCTRL_CONF_DESC(29, REG_GPIO_L_PD, BIT(16)),
        PINCTRL_CONF_DESC(30, REG_GPIO_L_PD, BIT(17)),
        PINCTRL_CONF_DESC(31, REG_GPIO_L_PD, BIT(18)),
-       PINCTRL_CONF_DESC(32, REG_GPIO_L_PD, BIT(18)),
+       PINCTRL_CONF_DESC(32, REG_GPIO_L_PD, BIT(19)),
        PINCTRL_CONF_DESC(33, REG_GPIO_L_PD, BIT(20)),
        PINCTRL_CONF_DESC(34, REG_GPIO_L_PD, BIT(21)),
        PINCTRL_CONF_DESC(35, REG_GPIO_L_PD, BIT(22)),
@@ -2032,7 +2032,7 @@ static const struct airoha_pinctrl_conf en7581_pinctrl_drive_e2_conf[] = {
        PINCTRL_CONF_DESC(29, REG_GPIO_L_E2, BIT(16)),
        PINCTRL_CONF_DESC(30, REG_GPIO_L_E2, BIT(17)),
        PINCTRL_CONF_DESC(31, REG_GPIO_L_E2, BIT(18)),
-       PINCTRL_CONF_DESC(32, REG_GPIO_L_E2, BIT(18)),
+       PINCTRL_CONF_DESC(32, REG_GPIO_L_E2, BIT(19)),
        PINCTRL_CONF_DESC(33, REG_GPIO_L_E2, BIT(20)),
        PINCTRL_CONF_DESC(34, REG_GPIO_L_E2, BIT(21)),
        PINCTRL_CONF_DESC(35, REG_GPIO_L_E2, BIT(22)),
@@ -2149,7 +2149,7 @@ static const struct airoha_pinctrl_conf en7581_pinctrl_drive_e4_conf[] = {
        PINCTRL_CONF_DESC(29, REG_GPIO_L_E4, BIT(16)),
        PINCTRL_CONF_DESC(30, REG_GPIO_L_E4, BIT(17)),
        PINCTRL_CONF_DESC(31, REG_GPIO_L_E4, BIT(18)),
-       PINCTRL_CONF_DESC(32, REG_GPIO_L_E4, BIT(18)),
+       PINCTRL_CONF_DESC(32, REG_GPIO_L_E4, BIT(19)),
        PINCTRL_CONF_DESC(33, REG_GPIO_L_E4, BIT(20)),
        PINCTRL_CONF_DESC(34, REG_GPIO_L_E4, BIT(21)),
        PINCTRL_CONF_DESC(35, REG_GPIO_L_E4, BIT(22)),