]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
perf/x86/amd/lbr: Discard erroneous branch entries
authorSandipan Das <sandipan.das@amd.com>
Mon, 29 Jan 2024 11:06:25 +0000 (16:36 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 13 Apr 2024 11:07:37 +0000 (13:07 +0200)
[ Upstream commit 29297ffffb0bf388778bd4b581a43cee6929ae65 ]

The Revision Guide for AMD Family 19h Model 10-1Fh processors declares
Erratum 1452 which states that non-branch entries may erroneously be
recorded in the Last Branch Record (LBR) stack with the valid and
spec bits set.

Such entries can be recognized by inspecting bit 61 of the corresponding
LastBranchStackToIp register. This bit is currently reserved but if found
to be set, the associated branch entry should be discarded.

Signed-off-by: Sandipan Das <sandipan.das@amd.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://bugzilla.kernel.org/attachment.cgi?id=305518
Link: https://lore.kernel.org/r/3ad2aa305f7396d41a40e3f054f740d464b16b7f.1706526029.git.sandipan.das@amd.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/x86/events/amd/lbr.c

index 110e34c59643a68ea8145027c236383f8732268c..5149830c7c4fa61207a3a30122e07a24964374d9 100644 (file)
@@ -173,9 +173,11 @@ void amd_pmu_lbr_read(void)
 
                /*
                 * Check if a branch has been logged; if valid = 0, spec = 0
-                * then no branch was recorded
+                * then no branch was recorded; if reserved = 1 then an
+                * erroneous branch was recorded (see Erratum 1452)
                 */
-               if (!entry.to.split.valid && !entry.to.split.spec)
+               if ((!entry.to.split.valid && !entry.to.split.spec) ||
+                   entry.to.split.reserved)
                        continue;
 
                perf_clear_branch_entry_bitfields(br + out);