phy: zynqmp: Use reset controller framework for asserting/de-asserting reset

This patch modifies the phy_zynqmp.c driver to use reset-controller
framework for asserting/de-asserting reset for High Speed modules.

Also fix documentation and dtsi.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index e823fe195664fe23a7a60616c5ccfd815d2fcac0..84c6e28ab3a8a06b87f46466e94a2051029437db 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -754,9 +754,8 @@
                        status = "disabled";
                        reg = <0x0 0xfd400000 0x0 0x40000>,
                              <0x0 0xfd3d0000 0x0 0x1000>,
-                             <0x0 0xfd1a0000 0x0 0x1000>,
                              <0x0 0xff5e0000 0x0 0x1000>;
-                       reg-names = "serdes", "siou", "fpd", "lpd";
+                       reg-names = "serdes", "siou", "lpd";
                        nvmem-cells = <&soc_revision>;
                        nvmem-cell-names = "soc_revision";
                        resets = <&rst 16>, <&rst 59>, <&rst 60>,