dma: zynqmp: Added zynqmp DMA clks

zynqmp dma main clock and apb clock are
added in zynqmp-clk.dtsi

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>

diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi
index 2c0643ea237b1adc63560f14884ce434064e21d8..341890975929c15f1a289d1599fd0f12b340fd61 100644 (file)
--- a/arch/arm/dts/zynqmp-clk.dtsi
+++ b/arch/arm/dts/zynqmp-clk.dtsi
@@ -39,6 +39,12 @@
                clock-frequency = <300000000>;
        };
 
+       clk600: clk600 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <600000000>;
+       };
+
        dp_aclk: clock0 {
                compatible = "fixed-clock";
                #clock-cells = <0>;
@@ -75,6 +81,38 @@
        clocks = <&clk100 &clk100>;
 };
 
+&fpd_dma_chan1 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan2 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan3 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan4 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan5 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan6 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan7 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan8 {
+       clocks = <&clk600>, <&clk100>;
+};
+
 &nand0 {
        clocks = <&clk100 &clk100>;
 };