mmc: ultrascale_mmc: Add initial SD support

Added initial SD support for xilinx ultrascale.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/include/asm/arch-ultrascale/hardware.h b/arch/arm/include/asm/arch-ultrascale/hardware.h
index b6e55ab558c98bd1a3b4af57c837953d1736ed4c..04074a0a445cf2658eae1cd86ba49adab19a6fa8 100644 (file)
--- a/arch/arm/include/asm/arch-ultrascale/hardware.h
+++ b/arch/arm/include/asm/arch-ultrascale/hardware.h
@@ -22,4 +22,7 @@
 
 #define ZYNQ_QSPI_BASEADDR     0xFF00D000
 
+#define ZYNQ_SDHCI_BASEADDR0   0xFF014000
+#define ZYNQ_SDHCI_BASEADDR1   0xFF015000
+
 #endif /* _ASM_ARCH_HARDWARE_H */

diff --git a/arch/arm/include/asm/arch-ultrascale/sys_proto.h b/arch/arm/include/asm/arch-ultrascale/sys_proto.h
index 534eec2c027f0d23cdae14563056fc507f15b3d8..11fbca459d45b1d96e51f5896d17d4a4ddcb26d7 100644 (file)
--- a/arch/arm/include/asm/arch-ultrascale/sys_proto.h
+++ b/arch/arm/include/asm/arch-ultrascale/sys_proto.h
@@ -13,5 +13,6 @@ static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate)
 {
 }
 
+extern int zynq_sdhci_init(u32 regbase);
 
 #endif /* _ASM_ARCH_SYS_PROTO_H */

diff --git a/board/xilinx/ultrascale/ultrascale.c b/board/xilinx/ultrascale/ultrascale.c
index b759b59bd7a565416f2a75eb1570fcaaa156d355..61539acd6545721f368cc31f47f43ee52ae40aed 100644 (file)
--- a/board/xilinx/ultrascale/ultrascale.c
+++ b/board/xilinx/ultrascale/ultrascale.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <netdev.h>
+#include <asm/arch/sys_proto.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -55,3 +56,20 @@ int board_eth_init(bd_t *bis)
 #endif
        return ret;
 }
+
+#ifdef CONFIG_CMD_MMC
+int board_mmc_init(bd_t *bd)
+{
+        int ret = 0;
+
+#if defined(CONFIG_ZYNQ_SDHCI)
+# if defined(CONFIG_ZYNQ_SDHCI0)
+        ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
+# endif
+# if defined(CONFIG_ZYNQ_SDHCI1)
+        ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
+# endif
+#endif
+        return ret;
+}
+#endif

diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index fdce2c2c10ec85c4a291532f927eae4a0b5627c9..40df4aad3a0daf4afa599ed5a20c7e4c5c352690 100644 (file)
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -12,6 +12,7 @@
 #include <malloc.h>
 #include <sdhci.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/arch/hardware.h>
 
 int zynq_sdhci_init(u32 regbase)
 {

diff --git a/include/configs/xilinx_ultrascale.h b/include/configs/xilinx_ultrascale.h
index 91189930ba47688a56d112cddfe84ba91ab9be9e..634312010c65b99378d12a48c2016b107c593801 100644 (file)
--- a/include/configs/xilinx_ultrascale.h
+++ b/include/configs/xilinx_ultrascale.h
@@ -59,6 +59,7 @@
 #define CONFIG_ZYNQ_SERIAL
 
 #define CONFIG_ZYNQ_QSPI
+#define CONFIG_ZYNQ_SDHCI0
 
 #define CONFIG_CONS_INDEX              0
 #define CONFIG_BAUDRATE                        115200
@@ -106,6 +107,14 @@
 # define CONFIG_CMD_SF
 #endif
 
+#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
+# define CONFIG_MMC
+# define CONFIG_GENERIC_MMC
+# define CONFIG_SDHCI
+# define CONFIG_ZYNQ_SDHCI
+# define CONFIG_CMD_MMC
+#endif
+
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LOAD_ADDR           0x8000000
 
@@ -121,6 +130,7 @@
        "fdt_high=0x10000000\0"         \
        "netboot=tftpboot 10000000 image.ub && bootm\0" \
        "qspiboot=sf probe 0; sf read 10000000 0 1000000; bootm 10080000\0"     \
+       "sdboot=mmcinfo && fatload mmc 0:0 10000000 image.ub && bootm 10000000\0"       \
        "jtagboot=tftpboot 1000000 uImage && "          \
                "tftpboot 20000000 system.dtb && "      \
                "bootm 1000000 - 20000000\0"