]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: errata: Apply workarounds for Neoverse-V3AE
authorMark Rutland <mark.rutland@arm.com>
Fri, 19 Sep 2025 14:58:29 +0000 (15:58 +0100)
committerWill Deacon <will@kernel.org>
Mon, 22 Sep 2025 10:27:14 +0000 (11:27 +0100)
Neoverse-V3AE is also affected by erratum #3312417, as described in its
Software Developer Errata Notice (SDEN) document:

  Neoverse V3AE (MP172) SDEN v9.0, erratum 3312417
  https://developer.arm.com/documentation/SDEN-2615521/9-0/

Enable the workaround for Neoverse-V3AE, and document this.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ryan Roberts <ryan.roberts@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Documentation/arch/arm64/silicon-errata.rst
arch/arm64/Kconfig
arch/arm64/kernel/cpu_errata.c

index b18ef4064bc04672e31d3a53d42ae6055deb12f2..a7ec57060f64f5ae604b218f172e4e6fd791ddcc 100644 (file)
@@ -200,6 +200,8 @@ stable kernels.
 +----------------+-----------------+-----------------+-----------------------------+
 | ARM            | Neoverse-V3     | #3312417        | ARM64_ERRATUM_3194386       |
 +----------------+-----------------+-----------------+-----------------------------+
+| ARM            | Neoverse-V3AE   | #3312417        | ARM64_ERRATUM_3194386       |
++----------------+-----------------+-----------------+-----------------------------+
 | ARM            | MMU-500         | #841119,826419  | ARM_SMMU_MMU_500_CPRE_ERRATA|
 |                |                 | #562869,1047329 |                             |
 +----------------+-----------------+-----------------+-----------------------------+
index e9bbfacc35a64d7ef1793a5d7f7ff8db138f2814..93f391e67af1519a51ea5627635fb1717d2499b6 100644 (file)
@@ -1138,6 +1138,7 @@ config ARM64_ERRATUM_3194386
          * ARM Neoverse-V1 erratum 3324341
          * ARM Neoverse V2 erratum 3324336
          * ARM Neoverse-V3 erratum 3312417
+         * ARM Neoverse-V3AE erratum 3312417
 
          On affected cores "MSR SSBS, #0" instructions may not affect
          subsequent speculative instructions, which may permit unexepected
index 7ff6b49beaaffc3599b2bb59cacca6efd46b923e..8cb3b575a03165681f6c7ab4a741948d01f95881 100644 (file)
@@ -546,6 +546,7 @@ static const struct midr_range erratum_spec_ssbs_list[] = {
        MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),
        MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
        MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),
+       MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3AE),
        {}
 };
 #endif