--- /dev/null
+From baba217d2c4446b6eef309d81d8776cb5c68cb55 Mon Sep 17 00:00:00 2001
+From: Sowjanya Komatineni <skomatineni@nvidia.com>
+Date: Thu, 27 Aug 2020 10:20:59 -0700
+Subject: arm64: tegra: Add missing timeout clock to Tegra186 SDMMC nodes
+
+From: Sowjanya Komatineni <skomatineni@nvidia.com>
+
+commit baba217d2c4446b6eef309d81d8776cb5c68cb55 upstream.
+
+commit 39cb62cb8973 ("arm64: tegra: Add Tegra186 support")
+
+Tegra186 uses separate SDMMC_LEGACY_TM clock for data timeout and
+this clock is not enabled currently which is not recommended.
+
+Tegra186 SDMMC advertises 12Mhz as timeout clock frequency in host
+capability register and uses it by default.
+
+So, this clock should be kept enabled by the SDMMC driver.
+
+Fixes: 39cb62cb8973 ("arm64: tegra: Add Tegra186 support")
+Cc: stable <stable@vger.kernel.org> # 5.4
+Tested-by: Jon Hunter <jonathanh@nvidia.com>
+Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
+Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
+Link: https://lore.kernel.org/r/1598548861-32373-6-git-send-email-skomatineni@nvidia.com
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/nvidia/tegra186.dtsi | 20 ++++++++++++--------
+ 1 file changed, 12 insertions(+), 8 deletions(-)
+
+--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
++++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+@@ -331,8 +331,9 @@
+ compatible = "nvidia,tegra186-sdhci";
+ reg = <0x0 0x03400000 0x0 0x10000>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&bpmp TEGRA186_CLK_SDMMC1>;
+- clock-names = "sdhci";
++ clocks = <&bpmp TEGRA186_CLK_SDMMC1>,
++ <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
++ clock-names = "sdhci", "tmclk";
+ resets = <&bpmp TEGRA186_RESET_SDMMC1>;
+ reset-names = "sdhci";
+ iommus = <&smmu TEGRA186_SID_SDMMC1>;
+@@ -357,8 +358,9 @@
+ compatible = "nvidia,tegra186-sdhci";
+ reg = <0x0 0x03420000 0x0 0x10000>;
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&bpmp TEGRA186_CLK_SDMMC2>;
+- clock-names = "sdhci";
++ clocks = <&bpmp TEGRA186_CLK_SDMMC2>,
++ <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
++ clock-names = "sdhci", "tmclk";
+ resets = <&bpmp TEGRA186_RESET_SDMMC2>;
+ reset-names = "sdhci";
+ iommus = <&smmu TEGRA186_SID_SDMMC2>;
+@@ -378,8 +380,9 @@
+ compatible = "nvidia,tegra186-sdhci";
+ reg = <0x0 0x03440000 0x0 0x10000>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&bpmp TEGRA186_CLK_SDMMC3>;
+- clock-names = "sdhci";
++ clocks = <&bpmp TEGRA186_CLK_SDMMC3>,
++ <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
++ clock-names = "sdhci", "tmclk";
+ resets = <&bpmp TEGRA186_RESET_SDMMC3>;
+ reset-names = "sdhci";
+ iommus = <&smmu TEGRA186_SID_SDMMC3>;
+@@ -401,8 +404,9 @@
+ compatible = "nvidia,tegra186-sdhci";
+ reg = <0x0 0x03460000 0x0 0x10000>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
+- clock-names = "sdhci";
++ clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
++ <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
++ clock-names = "sdhci", "tmclk";
+ assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
+ <&bpmp TEGRA186_CLK_PLLC4_VCO>;
+ assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>;
--- /dev/null
+From c956c0cd4f6f4aac4f095621b1c4e1c5ee1df877 Mon Sep 17 00:00:00 2001
+From: Sowjanya Komatineni <skomatineni@nvidia.com>
+Date: Thu, 27 Aug 2020 10:21:00 -0700
+Subject: arm64: tegra: Add missing timeout clock to Tegra194 SDMMC nodes
+
+From: Sowjanya Komatineni <skomatineni@nvidia.com>
+
+commit c956c0cd4f6f4aac4f095621b1c4e1c5ee1df877 upstream.
+
+commit 5425fb15d8ee ("arm64: tegra: Add Tegra194 chip device tree")
+
+Tegra194 uses separate SDMMC_LEGACY_TM clock for data timeout and
+this clock is not enabled currently which is not recommended.
+
+Tegra194 SDMMC advertises 12Mhz as timeout clock frequency in host
+capability register.
+
+So, this clock should be kept enabled by SDMMC driver.
+
+Fixes: 5425fb15d8ee ("arm64: tegra: Add Tegra194 chip device tree")
+Cc: stable <stable@vger.kernel.org> # 5.4
+Tested-by: Jon Hunter <jonathanh@nvidia.com>
+Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
+Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
+Link: https://lore.kernel.org/r/1598548861-32373-7-git-send-email-skomatineni@nvidia.com
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/nvidia/tegra194.dtsi | 15 +++++++++------
+ 1 file changed, 9 insertions(+), 6 deletions(-)
+
+--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
++++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+@@ -453,8 +453,9 @@
+ compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
+ reg = <0x03400000 0x10000>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&bpmp TEGRA194_CLK_SDMMC1>;
+- clock-names = "sdhci";
++ clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
++ <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
++ clock-names = "sdhci", "tmclk";
+ resets = <&bpmp TEGRA194_RESET_SDMMC1>;
+ reset-names = "sdhci";
+ nvidia,pad-autocal-pull-up-offset-3v3-timeout =
+@@ -475,8 +476,9 @@
+ compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
+ reg = <0x03440000 0x10000>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&bpmp TEGRA194_CLK_SDMMC3>;
+- clock-names = "sdhci";
++ clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
++ <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
++ clock-names = "sdhci", "tmclk";
+ resets = <&bpmp TEGRA194_RESET_SDMMC3>;
+ reset-names = "sdhci";
+ nvidia,pad-autocal-pull-up-offset-1v8 = <0x00>;
+@@ -498,8 +500,9 @@
+ compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
+ reg = <0x03460000 0x10000>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&bpmp TEGRA194_CLK_SDMMC4>;
+- clock-names = "sdhci";
++ clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
++ <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
++ clock-names = "sdhci", "tmclk";
+ assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
+ <&bpmp TEGRA194_CLK_PLLC4>;
+ assigned-clock-parents =
--- /dev/null
+From 679f71fa0db2d777f39c7a5af7f7c0689fc713fa Mon Sep 17 00:00:00 2001
+From: Sowjanya Komatineni <skomatineni@nvidia.com>
+Date: Thu, 27 Aug 2020 10:20:58 -0700
+Subject: arm64: tegra: Add missing timeout clock to Tegra210 SDMMC
+
+From: Sowjanya Komatineni <skomatineni@nvidia.com>
+
+commit 679f71fa0db2d777f39c7a5af7f7c0689fc713fa upstream.
+
+commit 742af7e7a0a1 ("arm64: tegra: Add Tegra210 support")
+
+Tegra210 uses separate SDMMC_LEGACY_TM clock for data timeout and
+this clock is not enabled currently which is not recommended.
+
+Tegra SDMMC advertises 12Mhz as timeout clock frequency in host
+capability register.
+
+So, this clock should be kept enabled by SDMMC driver.
+
+Fixes: 742af7e7a0a1 ("arm64: tegra: Add Tegra210 support")
+Cc: stable <stable@vger.kernel.org> # 5.4
+Tested-by: Jon Hunter <jonathanh@nvidia.com>
+Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
+Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
+Link: https://lore.kernel.org/r/1598548861-32373-5-git-send-email-skomatineni@nvidia.com
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/nvidia/tegra210.dtsi | 20 ++++++++++++--------
+ 1 file changed, 12 insertions(+), 8 deletions(-)
+
+--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
++++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+@@ -1180,8 +1180,9 @@
+ compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
+ reg = <0x0 0x700b0000 0x0 0x200>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
+- clock-names = "sdhci";
++ clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
++ <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
++ clock-names = "sdhci", "tmclk";
+ resets = <&tegra_car 14>;
+ reset-names = "sdhci";
+ pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
+@@ -1208,8 +1209,9 @@
+ compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
+ reg = <0x0 0x700b0200 0x0 0x200>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
+- clock-names = "sdhci";
++ clocks = <&tegra_car TEGRA210_CLK_SDMMC2>,
++ <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
++ clock-names = "sdhci", "tmclk";
+ resets = <&tegra_car 9>;
+ reset-names = "sdhci";
+ pinctrl-names = "sdmmc-1v8-drv";
+@@ -1225,8 +1227,9 @@
+ compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
+ reg = <0x0 0x700b0400 0x0 0x200>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
+- clock-names = "sdhci";
++ clocks = <&tegra_car TEGRA210_CLK_SDMMC3>,
++ <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
++ clock-names = "sdhci", "tmclk";
+ resets = <&tegra_car 69>;
+ reset-names = "sdhci";
+ pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
+@@ -1248,8 +1251,9 @@
+ compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
+ reg = <0x0 0x700b0600 0x0 0x200>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
+- clock-names = "sdhci";
++ clocks = <&tegra_car TEGRA210_CLK_SDMMC4>,
++ <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
++ clock-names = "sdhci", "tmclk";
+ resets = <&tegra_car 15>;
+ reset-names = "sdhci";
+ pinctrl-names = "sdmmc-3v3-drv", "sdmmc-1v8-drv";
--- /dev/null
+From 391d89dba8c290859a3e29430d0b9e32c358bb0d Mon Sep 17 00:00:00 2001
+From: Sowjanya Komatineni <skomatineni@nvidia.com>
+Date: Thu, 27 Aug 2020 10:20:56 -0700
+Subject: sdhci: tegra: Remove SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK for Tegra186
+
+From: Sowjanya Komatineni <skomatineni@nvidia.com>
+
+commit 391d89dba8c290859a3e29430d0b9e32c358bb0d upstream.
+
+commit 4346b7c7941d ("mmc: tegra: Add Tegra186 support")
+
+SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK is set for Tegra186 from the
+beginning of its support in driver.
+
+Tegra186 SDMMC hardware by default uses timeout clock (TMCLK) instead
+of SDCLK and this quirk should not be set.
+
+So, this patch remove this quirk for Tegra186.
+
+Fixes: 4346b7c7941d ("mmc: tegra: Add Tegra186 support")
+Cc: stable <stable@vger.kernel.org> # 5.4
+Tested-by: Jon Hunter <jonathanh@nvidia.com>
+Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
+Acked-by: Adrian Hunter <adrian.hunter@intel.com>
+Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
+Link: https://lore.kernel.org/r/1598548861-32373-3-git-send-email-skomatineni@nvidia.com
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-tegra.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/mmc/host/sdhci-tegra.c
++++ b/drivers/mmc/host/sdhci-tegra.c
+@@ -1446,7 +1446,6 @@ static const struct sdhci_ops tegra186_s
+
+ static const struct sdhci_pltfm_data sdhci_tegra186_pdata = {
+ .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
+- SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
+ SDHCI_QUIRK_SINGLE_POWER_WRITE |
+ SDHCI_QUIRK_NO_HISPD_BIT |
+ SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC |
--- /dev/null
+From e33588adcaa925c18ee2ea253161fb0317fa2329 Mon Sep 17 00:00:00 2001
+From: Sowjanya Komatineni <skomatineni@nvidia.com>
+Date: Thu, 27 Aug 2020 10:20:55 -0700
+Subject: sdhci: tegra: Remove SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK for Tegra210
+
+From: Sowjanya Komatineni <skomatineni@nvidia.com>
+
+commit e33588adcaa925c18ee2ea253161fb0317fa2329 upstream.
+
+commit b5a84ecf025a ("mmc: tegra: Add Tegra210 support")
+
+SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK is set for Tegra210 from the
+beginning of Tegra210 support in the driver.
+
+Tegra210 SDMMC hardware by default uses timeout clock (TMCLK)
+instead of SDCLK and this quirk should not be set.
+
+So, this patch remove this quirk for Tegra210.
+
+Fixes: b5a84ecf025a ("mmc: tegra: Add Tegra210 support")
+Cc: stable <stable@vger.kernel.org> # 5.4
+Tested-by: Jon Hunter <jonathanh@nvidia.com>
+Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
+Acked-by: Adrian Hunter <adrian.hunter@intel.com>
+Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
+Link: https://lore.kernel.org/r/1598548861-32373-2-git-send-email-skomatineni@nvidia.com
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-tegra.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/mmc/host/sdhci-tegra.c
++++ b/drivers/mmc/host/sdhci-tegra.c
+@@ -1409,7 +1409,6 @@ static const struct sdhci_ops tegra210_s
+
+ static const struct sdhci_pltfm_data sdhci_tegra210_pdata = {
+ .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
+- SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
+ SDHCI_QUIRK_SINGLE_POWER_WRITE |
+ SDHCI_QUIRK_NO_HISPD_BIT |
+ SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC |
kvm-arm64-add-kvm_extable-for-vaxorcism-code.patch
kvm-arm64-survive-synchronous-exceptions-caused-by-at-instructions.patch
dt-bindings-mmc-tegra-add-tmclk-for-tegra210-and-later.patch
+arm64-tegra-add-missing-timeout-clock-to-tegra194-sdmmc-nodes.patch
+arm64-tegra-add-missing-timeout-clock-to-tegra186-sdmmc-nodes.patch
+arm64-tegra-add-missing-timeout-clock-to-tegra210-sdmmc.patch
+sdhci-tegra-remove-sdhci_quirk_data_timeout_uses_sdclk-for-tegra210.patch
+sdhci-tegra-remove-sdhci_quirk_data_timeout_uses_sdclk-for-tegra186.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
