localbus: localbus@0 {
#address-cells = <2>;
#size-cells = <1>;
- ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
- 1 0 0x4000000 0x4000010>; /* addsel1 */
+ ranges = <0 0 0x0000000 0x3ffffff>, /* addrsel0 */
+ <1 0 0x4000000 0x4000010>; /* addsel1 */
compatible = "lantiq,localbus", "simple-bus";
};
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,icu";
- reg = <0x80200 0xc8 /* icu0 */
- 0x80300 0xc8>; /* icu1 */
+ reg = <0x80200 0xc8>, /* icu0 */
+ <0x80300 0xc8>; /* icu1 */
};
watchdog@803f0 {
localbus: localbus@0 {
#address-cells = <2>;
#size-cells = <1>;
- ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
- 1 0 0x4000000 0x4000010>; /* addsel1 */
+ ranges = <0 0 0x0000000 0x3ffffff>, /* addrsel0 */
+ <1 0 0x4000000 0x4000010>; /* addsel1 */
compatible = "lantiq,localbus", "simple-bus";
};
#interrupt-cells = <1>;
compatible = "lantiq,pci-xway";
bus-range = <0x0 0x0>;
- ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
- 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
- reg = <0x7000000 0x8000 /* config space */
- 0xe105400 0x400>; /* pci bridge */
+ ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000>, /* pci memory */
+ <0x1000000 0 0x0000000 0xae00000 0 0x200000>; /* io space */
+ reg = <0x7000000 0x8000>, /* config space */
+ <0xe105400 0x400>; /* pci bridge */
lantiq,bus-clock = <33333333>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <0x7000 0 0 1 &icu0 30 1>;
localbus: localbus@0 {
#address-cells = <2>;
#size-cells = <1>;
- ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
- 1 0 0x4000000 0x4000010>; /* addsel1 */
+ ranges = <0 0 0x0000000 0x3ffffff>, /* addrsel0 */
+ <1 0 0x4000000 0x4000010>; /* addsel1 */
compatible = "lantiq,localbus", "simple-bus";
};
#interrupt-cells = <1>;
compatible = "lantiq,pci-xway";
bus-range = <0x0 0x0>;
- ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
- 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
- reg = <0x7000000 0x8000 /* config space */
- 0xe105400 0x400>; /* pci bridge */
+ ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000>, /* pci memory */
+ <0x1000000 0 0x0000000 0xae00000 0 0x0200000>; /* io space */
+ reg = <0x7000000 0x8000>, /* config space */
+ <0xe105400 0x400>; /* pci bridge */
lantiq,bus-clock = <33333333>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,icu";
- reg = <0x80200 0xc8 /* icu0 */
- 0x80300 0xc8>; /* icu1 */
+ reg = <0x80200 0xc8>, /* icu0 */
+ <0x80300 0xc8>; /* icu1 */
};
watchdog@803f0 {
localbus: localbus@0 {
#address-cells = <2>;
#size-cells = <1>;
- ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
- 1 0 0x4000000 0x4000010>; /* addsel1 */
+ ranges = <0 0 0x0000000 0x3ffffff>, /* addrsel0 */
+ <1 0 0x4000000 0x4000010>; /* addsel1 */
compatible = "lantiq,localbus", "simple-bus";
};
compatible = "lantiq,xrx200-gswip";
#address-cells = <1>;
#size-cells = <0>;
- reg = < 0xe108000 0x3000 /* switch */
- 0xe10b100 0x70 /* mdio */
- 0xe10b1d8 0x30 /* mii */
- >;
+ reg = <0xe108000 0x3000>, /* switch */
+ <0xe10b100 0x70>, /* mdio */
+ <0xe10b1d8 0x30>; /* mii */
dsa,member = <0 0>;
#interrupt-cells = <1>;
compatible = "lantiq,pci-xway";
bus-range = <0x0 0x0>;
- ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
- 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
- reg = <0x7000000 0x8000 /* config space */
- 0xe105400 0x400>; /* pci bridge */
+ ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000>, /* pci memory */
+ <0x1000000 0 0x0000000 0xae00000 0 0x200000>; /* io space */
+ reg = <0x7000000 0x8000>, /* config space */
+ <0xe105400 0x400>; /* pci bridge */
lantiq,bus-clock = <33333333>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
pci0: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>;
- ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
status = "disabled";
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
pci1: pcie@ffe0a000 {
reg = <0x0 0xffe0a000 0x0 0x1000>;
- ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
pcie@0 {
ranges = <0x2000000 0x0 0xc0000000
0x2000000 0x0 0xc0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
reg = <0x0 0xffe1e000 0 0x2000>;
/* NOR, NAND Flashes and CPLD on board */
- ranges = <0x0 0x0 0x0 0xee000000 0x02000000
- 0x1 0x0 0x0 0xff800000 0x00010000
- 0x3 0x0 0x0 0xffb00000 0x00000020>;
+ ranges = <0x0 0x0 0x0 0xee000000 0x02000000>,
+ <0x1 0x0 0x0 0xff800000 0x00010000>,
+ <0x3 0x0 0x0 0xffb00000 0x00000020>;
nand@100000000 {
compatible = "fsl,ifc-nand";
reg = <0x0 0xffe1e000 0 0x2000>;
/* NOR, NAND Flashes and CPLD on board */
- ranges = <0x0 0x0 0x0 0xee000000 0x02000000
- 0x1 0x0 0x0 0xff800000 0x00010000
- 0x3 0x0 0x0 0xffb00000 0x00000020>;
+ ranges = <0x0 0x0 0x0 0xee000000 0x02000000>,
+ <0x1 0x0 0x0 0xff800000 0x00010000>,
+ <0x3 0x0 0x0 0xffb00000 0x00000020>;
nand@100000000 {
compatible = "fsl,ifc-nand";
pci0: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>;
- ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
status = "disabled";
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
- ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
lbc: localbus@ffe05000 {
reg = <0 0xffe05000 0 0x1000>;
- ranges = <0x0 0x0 0x0 0xec000000 0x04000000
- 0x1 0x0 0x0 0xff800000 0x00040000
- 0x2 0x0 0x0 0xffa00000 0x00020000
- 0x3 0x0 0x0 0xffb00000 0x00020000>;
+ ranges = <0x0 0x0 0x0 0xec000000 0x04000000>,
+ <0x1 0x0 0x0 0xff800000 0x00040000>,
+ <0x2 0x0 0x0 0xffa00000 0x00020000>,
+ <0x3 0x0 0x0 0xffb00000 0x00020000>;
nand@1,0 {
compatible = "fsl,p1020-fcm-nand", "fsl,elbc-fcm-nand";
};
pci0: pcie@ffe09000 {
- ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
reg = <0 0xffe09000 0 0x1000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
- ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
lbc: localbus@ffe05000 {
reg = <0 0xffe05000 0 0x1000>;
- ranges = <0x0 0x0 0x0 0xec000000 0x04000000
- 0x1 0x0 0x0 0xff800000 0x00040000
- 0x2 0x0 0x0 0xffa00000 0x00020000
- 0x3 0x0 0x0 0xffb00000 0x00020000>;
+ ranges = <0x0 0x0 0x0 0xec000000 0x04000000>,
+ <0x1 0x0 0x0 0xff800000 0x00040000>,
+ <0x2 0x0 0x0 0xffa00000 0x00020000>,
+ <0x3 0x0 0x0 0xffb00000 0x00020000>;
nand@100000000 {
compatible = "fsl,p1020-fcm-nand", "fsl,elbc-fcm-nand";
};
pci0: pcie@ffe09000 {
- ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
reg = <0 0xffe09000 0 0x1000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
- ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
reg = <0x0 0xffe1e000 0 0x2000>;
/* NOR, NAND Flashes and CPLD on board */
- ranges = <0x0 0x0 0x0 0xee000000 0x02000000
- 0x1 0x0 0x0 0xff800000 0x00010000
- 0x3 0x0 0x0 0xffb00000 0x00000020>;
+ ranges = <0x0 0x0 0x0 0xee000000 0x02000000>,
+ <0x1 0x0 0x0 0xff800000 0x00010000>,
+ <0x3 0x0 0x0 0xffb00000 0x00000020>;
nand@100000000 {
compatible = "fsl,ifc-nand";
pci0: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>;
- ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
status = "disabled";
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
- ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
pci0: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>;
- ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
- ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
pci0: pcie@ffe09000 {
- ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
reg = <0 0xffe09000 0 0x1000>;
/* Filled by U-Boot */
bus-range = <0x00 0x01>;
- dma-ranges = <0x2000000 0x00 0xfff00000 0x00 0xffe00000
- 0x00 0x100000 0x42000000 0x00 0x00 0x00
- 0x00 0x00 0x10000000>;
+ dma-ranges = <0x2000000 0x00 0xfff00000 0x00 0xffe00000 0x00 0x100000>,
+ <0x42000000 0x00 0x00 0x00 0x00 0x00 0x10000000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
- ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
/* Filled by U-Boot */
bus-range = <0x00 0x01>;
- dma-ranges = <0x2000000 0x00 0xfff00000 0x00
- 0xffe00000 0x00 0x100000 0x42000000
- 0x00 0x00 0x00 0x00 0x00 0x10000000>;
+ dma-ranges = <0x2000000 0x00 0xfff00000 0x00 0xffe00000 0x00 0x100000>,
+ <0x42000000 0x00 0x00 0x00 0x00 0x00 0x10000000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
pci0: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>;
- ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
- ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
pci0: pcie@ffe09000 {
- ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
reg = <0 0xffe09000 0 0x1000>;
/* Filled by U-Boot */
bus-range = <0x00 0x01>;
- dma-ranges = <0x2000000 0x00 0xfff00000 0x00 0xffe00000
- 0x00 0x100000 0x42000000 0x00 0x00 0x00
- 0x00 0x00 0x10000000>;
+ dma-ranges = <0x2000000 0x00 0xfff00000 0x00 0xffe00000 0x00 0x100000>,
+ <0x42000000 0x00 0x00 0x00 0x00 0x00 0x10000000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
- ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
/* Filled by U-Boot */
bus-range = <0x00 0x01>;
- dma-ranges = <0x2000000 0x00 0xfff00000 0x00
- 0xffe00000 0x00 0x100000 0x42000000
- 0x00 0x00 0x00 0x00 0x00 0x10000000>;
+ dma-ranges = <0x2000000 0x00 0xfff00000 0x00 0xffe00000 0x00 0x100000>,
+ <0x42000000 0x00 0x00 0x00 0x00 0x00 0x10000000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
reg = <0 0xffe05000 0 0x1000>;
/* NOR and NAND Flashes */
- ranges = < 0x0 0x0 0x0 0xefe00000 0x00200000
- 0x1 0x0 0x0 0xffa00000 0x00040000 >;
+ ranges = <0x0 0x0 0x0 0xefe00000 0x00200000>,
+ <0x1 0x0 0x0 0xffa00000 0x00040000>;
nor@0,0 {
compatible = "cfi-flash";
pci0: pcie@ffe08000 {
reg = <0 0xffe08000 0 0x1000>;
- ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
status = "disabled";
pcie@0 {
- ranges = < 0x2000000 0x0 0xc0000000
- 0x2000000 0x0 0xc0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
- 0x1000000 0x0 0x0
- 0x0 0x100000>;
+ ranges = <0x2000000 0x0 0xc0000000
+ 0x2000000 0x0 0xc0000000
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
};
};
pci1: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>;
- ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
status = "disabled";
pcie@0 {
- ranges = < 0x2000000 0x0 0xa0000000
- 0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
- 0x1000000 0x0 0x0
- 0x0 0x100000>;
+ ranges = <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
};
};
pci2: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
- ranges = <0x2000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000>,
+ <0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
pcie@0 {
- ranges = < 0x2000000 0x0 0x80000000
- 0x2000000 0x0 0x80000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
- 0x1000000 0x0 0x0
- 0x0 0x10000>;
+ ranges = <0x2000000 0x0 0x80000000
+ 0x2000000 0x0 0x80000000
+ 0x0 0x20000000>,
+ <0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x10000>;
};
};
};
};
soc {
- ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
- MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
- MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>,
+ <MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>,
+ <MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
};
system_fan: gpio_fan {
};
soc {
- ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
- MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
- MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>,
+ <MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>,
+ <MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
};
system_fan: gpio_fan {
};
soc {
- ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
- MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
- MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
- MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
- MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>,
+ <MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>,
+ <MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000>,
+ <MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>,
+ <MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
pcie {
status = "okay";
};
soc {
- ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
- MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
- MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
- MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
- MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
+ <MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>,
+ <MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000>,
+ <MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>,
+ <MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
};
gpio-keys {
};
soc {
- ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
- MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
- MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
- MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
- MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
+ <MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>,
+ <MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000>,
+ <MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>,
+ <MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
};
gpio-keys {
};
soc {
- ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
- MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
- MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
- MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
- MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
+ <MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>,
+ <MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000>,
+ <MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>,
+ <MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
internal-regs {
timer@c200 {
device_type = "pci";
bus-range = <0 255>;
- ranges = <
- 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
- 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
- >;
+ ranges = <0x02000000 0 0x00000000 0x20000000 0 0x10000000>, /* pci memory */
+ <0x01000000 0 0x00000000 0x10160000 0 0x00010000>; /* io space */
status = "disabled";
device_type = "pci";
bus-range = <0 255>;
- ranges = <
- 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
- 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
- >;
+ ranges = <0x02000000 0 0x00000000 0x20000000 0 0x10000000>, /* pci memory */
+ <0x01000000 0 0x00000000 0x10160000 0 0x00010000>; /* io space */
pcie0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
bus-range = <0 255>;
- ranges = <
- 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
- 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
- >;
+ ranges = <0x02000000 0 0x00000000 0x20000000 0 0x10000000>, /* pci memory */
+ <0x01000000 0 0x00000000 0x10160000 0 0x00010000>; /* io space */
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
- ranges = <0x81000000 0x0 0xa0080000 0x0 0xa0080000 0x0 0x00080000 /* downstream I/O 256KB */
- 0x82000000 0x0 0xa0100000 0x0 0xa0100000 0x0 0x2ff00000>; /* non-prefetchable memory */
+ ranges = <0x81000000 0x0 0xa0080000 0x0 0xa0080000 0x0 0x00080000>, /* downstream I/O 256KB */
+ <0x82000000 0x0 0xa0100000 0x0 0xa0100000 0x0 0x2ff00000>; /* non-prefetchable memory */
siflower,ctlr-idx = <0>;
num-viewport = <8>;
interrupts = <124 IRQ_TYPE_LEVEL_HIGH>,
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
- ranges = <0x81000000 0x0 0xd0080000 0x0 0xd0080000 0x0 0x00080000 /* downstream I/O 256KB */
- 0x82000000 0x0 0xd0100000 0x0 0xd0100000 0x0 0x2ff00000>; /* non-prefetchable memory */
+ ranges = <0x81000000 0x0 0xd0080000 0x0 0xd0080000 0x0 0x00080000>, /* downstream I/O 256KB */
+ <0x82000000 0x0 0xd0100000 0x0 0xd0100000 0x0 0x2ff00000>; /* non-prefetchable memory */
siflower,ctlr-idx = <1>;
num-viewport = <8>;
interrupts = <125 IRQ_TYPE_LEVEL_HIGH>,