[AArch64] Implement vbsl_f64 arm_neon.h intrinsic.

[gcc/]
	* config/aarch64/arm_neon.h (vbsl_f64): New intrinsic.

[testsuite/]
	* gcc.target/aarch64/simd/vbsl_f64_1.c: New test.

From-SVN: r212910

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8a6219e435e895e9b54da49eda88adce8701fa91..2d7f1e0168def9f2d55a6b0254324c38d8dc95c3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2014-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/aarch64/arm_neon.h (vbsl_f64): New intrinsic.
+
 2014-07-22  Roman Gareev  <gareevroman@gmail.com>
 
        * graphite-isl-ast-to-gimple.c:

diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index 80d1ca6b5763ec6826842e9c47458fd6be78a971..66968e8d198f11ea9667f689924618e1b389c2c1 100644 (file)
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -13657,6 +13657,13 @@ vbsl_f32 (uint32x2_t __a, float32x2_t __b, float32x2_t __c)
   return __builtin_aarch64_simd_bslv2sf_suss (__a, __b, __c);
 }
 
+__extension__ static __inline float64x1_t __attribute__ ((__always_inline__))
+vbsl_f64 (uint64x1_t __a, float64x1_t __b, float64x1_t __c)
+{
+  return (float64x1_t)
+    { __builtin_aarch64_simd_bsldf_suss (__a[0], __b[0], __c[0]) };
+}
+
 __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
 vbsl_p8 (uint8x8_t __a, poly8x8_t __b, poly8x8_t __c)
 {

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2563fb5d576d5017186fcabca96da24f17d90bea..14af70506d0d94a24426dcce9af71606e80c2c68 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2014-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * gcc.target/aarch64/simd/vbsl_f64_1.c: New test.
+
 2014-07-22  Uros Bizjak  <ubizjak@gmail.com>
 
        * gcc.target/i386/fuse-caller-save-xmm.c (dg-options): Use

diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vbsl_f64_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vbsl_f64_1.c
new file mode 100644 (file)
index 0000000..537c5bd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vbsl_f64_1.c
@@ -0,0 +1,32 @@
+/* Test the vbsl_f64 AArch64 SIMD intrinsic.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+
+#include "arm_neon.h"
+
+extern void abort (void);
+
+int
+main (void)
+{
+  float64x1_t expected, actual;
+  float64_t expected_scalar, actual_scalar;
+  float64x1_t arg1, arg2;
+  uint64_t mask = 0xf0fc00fbf000fa0fULL;
+  uint64_t arg1_uint = 0xdeadbeefbada9832ULL;
+  uint64_t arg2_uint = 0xcafe3254deed7111ULL;
+
+  arg1 = vcreate_f64 (arg1_uint);
+  arg2 = vcreate_f64 (arg2_uint);
+  expected = vcreate_f64 ((arg1_uint & mask) | (arg2_uint & ~mask));
+  actual = vbsl_f64 (vcreate_u64 (mask), arg1, arg2);
+
+  expected_scalar = vget_lane_f64 (expected, 0);
+  actual_scalar = vget_lane_f64 (actual, 0);
+
+  if (expected_scalar != actual_scalar)
+    abort ();
+
+  return 0;
+}