drm/amd/display: Fix watermark calculation

commit 9799702360d51a714e888fef4ab5fb9123dfb41f upstream.

Watermark calculation was incorrect due to missing brackets.

Fixes: 85f4bc0c333c ("drm/amd/display: Add SubVP required code")
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.0
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 52a61b3e5a8b06a54ca13f1ca02627fe882794cf..76c05ff12e954f714c2ae67c78fcfb29498ec29a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -719,7 +719,7 @@ void dc_dmub_setup_subvp_dmub_command(struct dc *dc,
                // Store the original watermark value for this SubVP config so we can lower it when the
                // MCLK switch starts
                wm_val_refclk = context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns *
-                               dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000 / 1000;
+                               (dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000) / 1000;
 
                cmd.fw_assisted_mclk_switch_v2.config_data.watermark_a_cache = wm_val_refclk < 0xFFFF ? wm_val_refclk : 0xFFFF;
        }