]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
rockchip: rk3036: use rockchip_stimer_init from spl_common.o
authorQuentin Schulz <quentin.schulz@cherry.de>
Tue, 28 Oct 2025 16:57:35 +0000 (17:57 +0100)
committerTom Rini <trini@konsulko.com>
Sun, 2 Nov 2025 18:15:23 +0000 (12:15 -0600)
The only difference with the implementation in spl_common.c is that we
check whether the timer has already been enabled. Considering this is
running in SPL, the first stage on RK3036, I feel like it's guaranteed
to not be enabled by default. No public TRM though and I don't have
access to an RK3036 device so take this as a guess.

Size of SPL binary increases by 8B for evb-rk3036.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/mach-rockchip/Makefile
arch/arm/mach-rockchip/rk3036-board-spl.c

index 4c424091585eac92872fc3d26d00e8df54e148cc..06fb527b21a0fd5921cc4a758a569bc08c7fc74c 100644 (file)
@@ -13,7 +13,7 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o spl_common.o
 obj-tpl-$(CONFIG_ROCKCHIP_PX30) += px30-board-tpl.o spl_common.o
 
-obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o spl_common.o
 
 ifeq ($(CONFIG_XPL_BUILD)$(CONFIG_TPL_BUILD),)
 
index 64e100172fac5f3383733dee0aac19395332d222..d69139278a8afd8d7cbc4dbfc02781d5aac787a2 100644 (file)
@@ -5,28 +5,9 @@
 
 #include <debug_uart.h>
 #include <init.h>
-#include <asm/io.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/arch-rockchip/sdram_rk3036.h>
-
-#define TIMER_LOAD_COUNT_L     0x00
-#define TIMER_LOAD_COUNT_H     0x04
-#define TIMER_CONTROL_REG      0x10
-#define TIMER_EN       0x1
-#define        TIMER_FMODE     (0 << 1)
-#define        TIMER_RMODE     (1 << 1)
-
-void rockchip_stimer_init(void)
-{
-       asm volatile("mcr p15, 0, %0, c14, c0, 0"
-                    : : "r"(CONFIG_COUNTER_FREQUENCY));
-
-       writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
-       writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
-       writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
-       writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
-              TIMER_CONTROL_REG);
-}
+#include <asm/arch-rockchip/timer.h>
 
 void board_init_f(ulong dummy)
 {