drm/i915/display: Introduce dp/psr_compute_config_late()

Introduce intel_dp_compute_config_late() to handle late-stage
configuration checks for DP/eDP features. For now, it paves path for
psr_compute_config_late() to handle psr parameters that need to be
computed late.

Move the handling of psr_flag for Wa_18037818876 and setting of non-psr
pipes to intel_psr_compute_config_late() as these are the last things
to be configured for PSR features.

v2: Update dp_compute_config_late() to return int.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com> (#v1)
Link: https://lore.kernel.org/r/20251016055415.2101347-8-ankit.k.nautiyal@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index c09aa759f4d4f41b861ad0bb67882cb4c5140cc6..870140340342583bf454f48fb22284fe770f327b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4559,6 +4559,13 @@ static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
        struct intel_display *display = to_intel_display(encoder);
        struct drm_connector *connector = conn_state->connector;
        u8 port_sync_transcoders = 0;
+       int ret = 0;
+
+       if (intel_crtc_has_dp_encoder(crtc_state))
+               ret = intel_dp_compute_config_late(encoder, crtc_state, conn_state);
+
+       if (ret)
+               return ret;
 
        drm_dbg_kms(display->drm, "[ENCODER:%d:%s] [CRTC:%d:%s]\n",
                    encoder->base.base.id, encoder->base.name,

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a723e846321fd563c937207c864b3ada8b944de4..7059d55687cf75afd63a635745ad1dd6f188a4ec 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6979,3 +6979,14 @@ void intel_dp_mst_resume(struct intel_display *display)
                }
        }
 }
+
+int intel_dp_compute_config_late(struct intel_encoder *encoder,
+                                struct intel_crtc_state *crtc_state,
+                                struct drm_connector_state *conn_state)
+{
+       struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+
+       intel_psr_compute_config_late(intel_dp, crtc_state);
+
+       return 0;
+}

diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index b379443e0211e16d842668f6ec349bf9470289f2..281ced3a3b39a01aad2eda448a728f3543b08458 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -218,5 +218,8 @@ int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state,
 int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector);
 void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool force_on_external);
 bool intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state);
+int intel_dp_compute_config_late(struct intel_encoder *encoder,
+                                struct intel_crtc_state *crtc_state,
+                                struct drm_connector_state *conn_state);
 
 #endif /* __INTEL_DP_H__ */

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index e97dcfa7673c287bcda6eda9ed1ebc71acd5c5b8..383e6dc1ed6370ae5be203dc154ede8e41f0fbee 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1785,15 +1785,6 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
                return;
 
        crtc_state->has_sel_update = intel_sel_update_config_valid(intel_dp, crtc_state);
-
-       /* Wa_18037818876 */
-       if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) {
-               crtc_state->has_psr = false;
-               drm_dbg_kms(display->drm,
-                           "PSR disabled to workaround PSR FSM hang issue\n");
-       }
-
-       intel_psr_set_non_psr_pipes(intel_dp, crtc_state);
 }
 
 void intel_psr_get_config(struct intel_encoder *encoder,
@@ -4355,3 +4346,18 @@ bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
 {
        return intel_dp_is_edp(intel_dp) && crtc_state->has_panel_replay;
 }
+
+void intel_psr_compute_config_late(struct intel_dp *intel_dp,
+                                  struct intel_crtc_state *crtc_state)
+{
+       struct intel_display *display = to_intel_display(intel_dp);
+
+       /* Wa_18037818876 */
+       if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) {
+               crtc_state->has_psr = false;
+               drm_dbg_kms(display->drm,
+                           "PSR disabled to workaround PSR FSM hang issue\n");
+       }
+
+       intel_psr_set_non_psr_pipes(intel_dp, crtc_state);
+}

diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index 9147996d6c9eee629f60475bbf27759010f1b2aa..b17ce312dc3750c6e16d490de2f8994d739921a4 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -83,5 +83,7 @@ void intel_psr_debugfs_register(struct intel_display *display);
 bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state);
 bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
                                   const struct intel_crtc_state *crtc_state);
+void intel_psr_compute_config_late(struct intel_dp *intel_dp,
+                                  struct intel_crtc_state *crtc_state);
 
 #endif /* __INTEL_PSR_H__ */