iio-fix-scale-application-in-iio_convert_raw_to_processed_unlocked.patch
iio-adc-ad7606-remove-frstdata-check-for-serial-mode.patch
iio-adc-ad7124-fix-chip-id-mismatch.patch
-usb-dwc3-core-update-lc-timer-as-per-usb-spec-v3.2.patch
binder-fix-uaf-caused-by-offsets-overwrite.patch
nvmem-fix-return-type-of-devm_nvmem_device_get-in-kerneldoc.patch
uio_hv_generic-fix-kernel-null-pointer-dereference-in-hv_uio_rescind.patch
+++ /dev/null
-From 9149c9b0c7e046273141e41eebd8a517416144ac Mon Sep 17 00:00:00 2001
-From: Faisal Hassan <quic_faisalh@quicinc.com>
-Date: Thu, 29 Aug 2024 15:15:02 +0530
-Subject: usb: dwc3: core: update LC timer as per USB Spec V3.2
-
-From: Faisal Hassan <quic_faisalh@quicinc.com>
-
-commit 9149c9b0c7e046273141e41eebd8a517416144ac upstream.
-
-This fix addresses STAR 9001285599, which only affects DWC_usb3 version
-3.20a. The timer value for PM_LC_TIMER in DWC_usb3 3.20a for the Link
-ECN changes is incorrect. If the PM TIMER ECN is enabled via GUCTL2[19],
-the link compliance test (TD7.21) may fail. If the ECN is not enabled
-(GUCTL2[19] = 0), the controller will use the old timer value (5us),
-which is still acceptable for the link compliance test. Therefore, clear
-GUCTL2[19] to pass the USB link compliance test: TD 7.21.
-
-Cc: stable@vger.kernel.org
-Signed-off-by: Faisal Hassan <quic_faisalh@quicinc.com>
-Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
-Link: https://lore.kernel.org/r/20240829094502.26502-1-quic_faisalh@quicinc.com
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/usb/dwc3/core.c | 15 +++++++++++++++
- drivers/usb/dwc3/core.h | 2 ++
- 2 files changed, 17 insertions(+)
-
---- a/drivers/usb/dwc3/core.c
-+++ b/drivers/usb/dwc3/core.c
-@@ -1422,6 +1422,21 @@ static void dwc3_check_params(struct dwc
- }
-
- /*
-+ * STAR 9001285599: This issue affects DWC_usb3 version 3.20a
-+ * only. If the PM TIMER ECM is enabled through GUCTL2[19], the
-+ * link compliance test (TD7.21) may fail. If the ECN is not
-+ * enabled (GUCTL2[19] = 0), the controller will use the old timer
-+ * value (5us), which is still acceptable for the link compliance
-+ * test. Therefore, do not enable PM TIMER ECM in 3.20a by
-+ * setting GUCTL2[19] by default; instead, use GUCTL2[19] = 0.
-+ */
-+ if (DWC3_VER_IS(DWC3, 320A)) {
-+ reg = dwc3_readl(dwc->regs, DWC3_GUCTL2);
-+ reg &= ~DWC3_GUCTL2_LC_TIMER;
-+ dwc3_writel(dwc->regs, DWC3_GUCTL2, reg);
-+ }
-+
-+ /*
- * Workaround for STAR 9000961433 which affects only version
- * 3.00a of the DWC_usb3 core. This prevents the controller
- * interrupt from being masked while handling events. IMOD
---- a/drivers/usb/dwc3/core.h
-+++ b/drivers/usb/dwc3/core.h
-@@ -379,6 +379,7 @@
-
- /* Global User Control Register 2 */
- #define DWC3_GUCTL2_RST_ACTBITLATER BIT(14)
-+#define DWC3_GUCTL2_LC_TIMER BIT(19)
-
- /* Global User Control Register 3 */
- #define DWC3_GUCTL3_SPLITDISABLE BIT(14)
-@@ -1162,6 +1163,7 @@ struct dwc3 {
- #define DWC3_REVISION_290A 0x5533290a
- #define DWC3_REVISION_300A 0x5533300a
- #define DWC3_REVISION_310A 0x5533310a
-+#define DWC3_REVISION_320A 0x5533320a
- #define DWC3_REVISION_330A 0x5533330a
-
- #define DWC31_REVISION_ANY 0x0
iio-buffer-dmaengine-fix-releasing-dma-channel-on-error.patch
iio-fix-scale-application-in-iio_convert_raw_to_processed_unlocked.patch
iio-adc-ad7606-remove-frstdata-check-for-serial-mode.patch
-usb-dwc3-core-update-lc-timer-as-per-usb-spec-v3.2.patch
binder-fix-uaf-caused-by-offsets-overwrite.patch
nvmem-fix-return-type-of-devm_nvmem_device_get-in-kerneldoc.patch
uio_hv_generic-fix-kernel-null-pointer-dereference-in-hv_uio_rescind.patch
+++ /dev/null
-From 9149c9b0c7e046273141e41eebd8a517416144ac Mon Sep 17 00:00:00 2001
-From: Faisal Hassan <quic_faisalh@quicinc.com>
-Date: Thu, 29 Aug 2024 15:15:02 +0530
-Subject: usb: dwc3: core: update LC timer as per USB Spec V3.2
-
-From: Faisal Hassan <quic_faisalh@quicinc.com>
-
-commit 9149c9b0c7e046273141e41eebd8a517416144ac upstream.
-
-This fix addresses STAR 9001285599, which only affects DWC_usb3 version
-3.20a. The timer value for PM_LC_TIMER in DWC_usb3 3.20a for the Link
-ECN changes is incorrect. If the PM TIMER ECN is enabled via GUCTL2[19],
-the link compliance test (TD7.21) may fail. If the ECN is not enabled
-(GUCTL2[19] = 0), the controller will use the old timer value (5us),
-which is still acceptable for the link compliance test. Therefore, clear
-GUCTL2[19] to pass the USB link compliance test: TD 7.21.
-
-Cc: stable@vger.kernel.org
-Signed-off-by: Faisal Hassan <quic_faisalh@quicinc.com>
-Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
-Link: https://lore.kernel.org/r/20240829094502.26502-1-quic_faisalh@quicinc.com
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/usb/dwc3/core.c | 15 +++++++++++++++
- drivers/usb/dwc3/core.h | 2 ++
- 2 files changed, 17 insertions(+)
-
---- a/drivers/usb/dwc3/core.c
-+++ b/drivers/usb/dwc3/core.c
-@@ -1377,6 +1377,21 @@ static void dwc3_check_params(struct dwc
- }
-
- /*
-+ * STAR 9001285599: This issue affects DWC_usb3 version 3.20a
-+ * only. If the PM TIMER ECM is enabled through GUCTL2[19], the
-+ * link compliance test (TD7.21) may fail. If the ECN is not
-+ * enabled (GUCTL2[19] = 0), the controller will use the old timer
-+ * value (5us), which is still acceptable for the link compliance
-+ * test. Therefore, do not enable PM TIMER ECM in 3.20a by
-+ * setting GUCTL2[19] by default; instead, use GUCTL2[19] = 0.
-+ */
-+ if (DWC3_VER_IS(DWC3, 320A)) {
-+ reg = dwc3_readl(dwc->regs, DWC3_GUCTL2);
-+ reg &= ~DWC3_GUCTL2_LC_TIMER;
-+ dwc3_writel(dwc->regs, DWC3_GUCTL2, reg);
-+ }
-+
-+ /*
- * Workaround for STAR 9000961433 which affects only version
- * 3.00a of the DWC_usb3 core. This prevents the controller
- * interrupt from being masked while handling events. IMOD
---- a/drivers/usb/dwc3/core.h
-+++ b/drivers/usb/dwc3/core.h
-@@ -373,6 +373,7 @@
-
- /* Global User Control Register 2 */
- #define DWC3_GUCTL2_RST_ACTBITLATER BIT(14)
-+#define DWC3_GUCTL2_LC_TIMER BIT(19)
-
- /* Global User Control Register 3 */
- #define DWC3_GUCTL3_SPLITDISABLE BIT(14)
-@@ -1140,6 +1141,7 @@ struct dwc3 {
- #define DWC3_REVISION_290A 0x5533290a
- #define DWC3_REVISION_300A 0x5533300a
- #define DWC3_REVISION_310A 0x5533310a
-+#define DWC3_REVISION_320A 0x5533320a
- #define DWC3_REVISION_330A 0x5533330a
-
- /*