3.14-stable patches

added patches:
	powerpc-perf-add-ppmu_arch_207s-define.patch

diff --git a/queue-3.14/powerpc-perf-add-ppmu_arch_207s-define.patch b/queue-3.14/powerpc-perf-add-ppmu_arch_207s-define.patch
new file mode 100644 (file)
index 0000000..9a97bac
--- /dev/null
+++ b/queue-3.14/powerpc-perf-add-ppmu_arch_207s-define.patch
@@ -0,0 +1,68 @@
+From 4d9690dd56b0d18f2af8a9d4a279cb205aae3345 Mon Sep 17 00:00:00 2001
+From: Joel Stanley <joel@jms.id.au>
+Date: Tue, 8 Jul 2014 16:08:21 +0930
+Subject: powerpc/perf: Add PPMU_ARCH_207S define
+
+From: Joel Stanley <joel@jms.id.au>
+
+commit 4d9690dd56b0d18f2af8a9d4a279cb205aae3345 upstream.
+
+Instead of separate bits for every POWER8 PMU feature, have a single one
+for v2.07 of the architecture.
+
+This saves us adding a MMCR2 define for a future patch.
+
+Signed-off-by: Joel Stanley <joel@jms.id.au>
+Acked-by: Michael Ellerman <mpe@ellerman.id.au>
+Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/powerpc/include/asm/perf_event_server.h |    3 +--
+ arch/powerpc/perf/core-book3s.c              |    4 ++--
+ arch/powerpc/perf/power8-pmu.c               |    2 +-
+ 3 files changed, 4 insertions(+), 5 deletions(-)
+
+--- a/arch/powerpc/include/asm/perf_event_server.h
++++ b/arch/powerpc/include/asm/perf_event_server.h
+@@ -60,8 +60,7 @@ struct power_pmu {
+ #define PPMU_SIAR_VALID               0x00000010 /* Processor has SIAR Valid bit */
+ #define PPMU_HAS_SSLOT                0x00000020 /* Has sampled slot in MMCRA */
+ #define PPMU_HAS_SIER         0x00000040 /* Has SIER */
+-#define PPMU_BHRB             0x00000080 /* has BHRB feature enabled */
+-#define PPMU_EBB              0x00000100 /* supports event based branch */
++#define PPMU_ARCH_207S                0x00000080 /* PMC is architecture v2.07S */
+ 
+ /*
+  * Values for flags to get_alternatives()
+--- a/arch/powerpc/perf/core-book3s.c
++++ b/arch/powerpc/perf/core-book3s.c
+@@ -483,7 +483,7 @@ static bool is_ebb_event(struct perf_eve
+        * check that the PMU supports EBB, meaning those that don't can still
+        * use bit 63 of the event code for something else if they wish.
+        */
+-      return (ppmu->flags & PPMU_EBB) &&
++      return (ppmu->flags & PPMU_ARCH_207S) &&
+              ((event->attr.config >> PERF_EVENT_CONFIG_EBB_SHIFT) & 1);
+ }
+ 
+@@ -1563,7 +1563,7 @@ static int power_pmu_event_init(struct p
+ 
+       if (has_branch_stack(event)) {
+               /* PMU has BHRB enabled */
+-              if (!(ppmu->flags & PPMU_BHRB))
++              if (!(ppmu->flags & PPMU_ARCH_207S))
+                       return -EOPNOTSUPP;
+       }
+ 
+--- a/arch/powerpc/perf/power8-pmu.c
++++ b/arch/powerpc/perf/power8-pmu.c
+@@ -751,7 +751,7 @@ static struct power_pmu power8_pmu = {
+       .get_constraint         = power8_get_constraint,
+       .get_alternatives       = power8_get_alternatives,
+       .disable_pmc            = power8_disable_pmc,
+-      .flags                  = PPMU_HAS_SSLOT | PPMU_HAS_SIER | PPMU_BHRB | PPMU_EBB,
++      .flags                  = PPMU_HAS_SSLOT | PPMU_HAS_SIER | PPMU_ARCH_207S,
+       .n_generic              = ARRAY_SIZE(power8_generic_events),
+       .generic_events         = power8_generic_events,
+       .cache_events           = &power8_cache_events,

diff --git a/queue-3.14/series b/queue-3.14/series
index caacf24a11dc888c932239199e00bde88a7758c7..a536c1038ca840267f11e1690ae4cee0a938fd18 100644 (file)
--- a/queue-3.14/series
+++ b/queue-3.14/series
@@ -23,6 +23,7 @@ acpi-ec-add-asynchronous-command-byte-write-support.patch
 acpi-ec-remove-duplicated-ec_wait_ibf0-waiter.patch
 acpi-ec-fix-race-condition-in-ec_transaction_completed.patch
 powerpc-perf-never-program-book3s-pmcs-with-values-0x80000000.patch
+powerpc-perf-add-ppmu_arch_207s-define.patch
 powerpc-perf-clear-mmcr2-when-enabling-pmu.patch
 cpufreq-makefile-fix-compilation-for-davinci-platform.patch
 crypto-sha512_ssse3-fix-byte-count-to-bit-count-conversion.patch