spi: airoha: add support of dual/quad wires spi modes to exec_op() handler

[ Upstream commit edd2e261b1babb92213089b5feadca12e3459322 ]

Booting without this patch and disabled dirmap support results in

[    2.980719] spi-nand spi0.0: Micron SPI NAND was found.
[    2.986040] spi-nand spi0.0: 256 MiB, block size: 128 KiB, page size: 2048, OOB size: 128
[    2.994709] 2 fixed-partitions partitions found on MTD device spi0.0
[    3.001075] Creating 2 MTD partitions on "spi0.0":
[    3.005862] 0x000000000000-0x000000020000 : "bl2"
[    3.011272] 0x000000020000-0x000010000000 : "ubi"
...
[    6.195594] ubi0: attaching mtd1
[   13.338398] ubi0: scanning is finished
[   13.342188] ubi0 error: ubi_read_volume_table: the layout volume was not found
[   13.349784] ubi0 error: ubi_attach_mtd_dev: failed to attach mtd1, error -22
[   13.356897] UBI error: cannot attach mtd1

If dirmap is disabled or not supported in the spi driver, the dirmap requests
will be executed via exec_op() handler. Thus, if the hardware supports
dual/quad spi modes, then corresponding requests will be sent to exec_op()
handler. Current driver does not support such requests, so error is arrised.
As result the flash can't be read/write.

This patch adds support of dual and quad wires spi modes to exec_op() handler.

Fixes: a403997c12019 ("spi: airoha: add SPI-NAND Flash controller driver")
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patch.msgid.link/20251012121707.2296160-4-mikhail.kshevetskiy@iopsys.eu
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/spi/spi-airoha-snfi.c b/drivers/spi/spi-airoha-snfi.c
index 043a03cd90a199ba3a3106b6e1974f686d6ea86c..0b89dc42545b12e2ae4da6a03d7b0cda7f0d415f 100644 (file)
--- a/drivers/spi/spi-airoha-snfi.c
+++ b/drivers/spi/spi-airoha-snfi.c
@@ -192,6 +192,14 @@
 #define SPI_NAND_OP_RESET                      0xff
 #define SPI_NAND_OP_DIE_SELECT                 0xc2
 
+/* SNAND FIFO commands */
+#define SNAND_FIFO_TX_BUSWIDTH_SINGLE          0x08
+#define SNAND_FIFO_TX_BUSWIDTH_DUAL            0x09
+#define SNAND_FIFO_TX_BUSWIDTH_QUAD            0x0a
+#define SNAND_FIFO_RX_BUSWIDTH_SINGLE          0x0c
+#define SNAND_FIFO_RX_BUSWIDTH_DUAL            0x0e
+#define SNAND_FIFO_RX_BUSWIDTH_QUAD            0x0f
+
 #define SPI_NAND_CACHE_SIZE                    (SZ_4K + SZ_256)
 #define SPI_MAX_TRANSFER_SIZE                  511
 
@@ -387,10 +395,26 @@ static int airoha_snand_set_mode(struct airoha_snand_ctrl *as_ctrl,
        return regmap_write(as_ctrl->regmap_ctrl, REG_SPI_CTRL_DUMMY, 0);
 }
 
-static int airoha_snand_write_data(struct airoha_snand_ctrl *as_ctrl, u8 cmd,
-                                  const u8 *data, int len)
+static int airoha_snand_write_data(struct airoha_snand_ctrl *as_ctrl,
+                                  const u8 *data, int len, int buswidth)
 {
        int i, data_len;
+       u8 cmd;
+
+       switch (buswidth) {
+       case 0:
+       case 1:
+               cmd = SNAND_FIFO_TX_BUSWIDTH_SINGLE;
+               break;
+       case 2:
+               cmd = SNAND_FIFO_TX_BUSWIDTH_DUAL;
+               break;
+       case 4:
+               cmd = SNAND_FIFO_TX_BUSWIDTH_QUAD;
+               break;
+       default:
+               return -EINVAL;
+       }
 
        for (i = 0; i < len; i += data_len) {
                int err;
@@ -409,16 +433,32 @@ static int airoha_snand_write_data(struct airoha_snand_ctrl *as_ctrl, u8 cmd,
        return 0;
 }
 
-static int airoha_snand_read_data(struct airoha_snand_ctrl *as_ctrl, u8 *data,
-                                 int len)
+static int airoha_snand_read_data(struct airoha_snand_ctrl *as_ctrl,
+                                 u8 *data, int len, int buswidth)
 {
        int i, data_len;
+       u8 cmd;
+
+       switch (buswidth) {
+       case 0:
+       case 1:
+               cmd = SNAND_FIFO_RX_BUSWIDTH_SINGLE;
+               break;
+       case 2:
+               cmd = SNAND_FIFO_RX_BUSWIDTH_DUAL;
+               break;
+       case 4:
+               cmd = SNAND_FIFO_RX_BUSWIDTH_QUAD;
+               break;
+       default:
+               return -EINVAL;
+       }
 
        for (i = 0; i < len; i += data_len) {
                int err;
 
                data_len = min(len - i, SPI_MAX_TRANSFER_SIZE);
-               err = airoha_snand_set_fifo_op(as_ctrl, 0xc, data_len);
+               err = airoha_snand_set_fifo_op(as_ctrl, cmd, data_len);
                if (err)
                        return err;
 
@@ -902,12 +942,28 @@ error_dma_unmap:
 static int airoha_snand_exec_op(struct spi_mem *mem,
                                const struct spi_mem_op *op)
 {
-       u8 data[8], cmd, opcode = op->cmd.opcode;
        struct airoha_snand_ctrl *as_ctrl;
+       int op_len, addr_len, dummy_len;
+       u8 buf[20], *data;
        int i, err;
 
        as_ctrl = spi_controller_get_devdata(mem->spi->controller);
 
+       op_len = op->cmd.nbytes;
+       addr_len = op->addr.nbytes;
+       dummy_len = op->dummy.nbytes;
+
+       if (op_len + dummy_len + addr_len > sizeof(buf))
+               return -EIO;
+
+       data = buf;
+       for (i = 0; i < op_len; i++)
+               *data++ = op->cmd.opcode >> (8 * (op_len - i - 1));
+       for (i = 0; i < addr_len; i++)
+               *data++ = op->addr.val >> (8 * (addr_len - i - 1));
+       for (i = 0; i < dummy_len; i++)
+               *data++ = 0xff;
+
        /* switch to manual mode */
        err = airoha_snand_set_mode(as_ctrl, SPI_MODE_MANUAL);
        if (err < 0)
@@ -918,40 +974,40 @@ static int airoha_snand_exec_op(struct spi_mem *mem,
                return err;
 
        /* opcode */
-       err = airoha_snand_write_data(as_ctrl, 0x8, &opcode, sizeof(opcode));
+       data = buf;
+       err = airoha_snand_write_data(as_ctrl, data, op_len,
+                                     op->cmd.buswidth);
        if (err)
                return err;
 
        /* addr part */
-       cmd = opcode == SPI_NAND_OP_GET_FEATURE ? 0x11 : 0x8;
-       put_unaligned_be64(op->addr.val, data);
-
-       for (i = ARRAY_SIZE(data) - op->addr.nbytes;
-            i < ARRAY_SIZE(data); i++) {
-               err = airoha_snand_write_data(as_ctrl, cmd, &data[i],
-                                             sizeof(data[0]));
+       data += op_len;
+       if (addr_len) {
+               err = airoha_snand_write_data(as_ctrl, data, addr_len,
+                                             op->addr.buswidth);
                if (err)
                        return err;
        }
 
        /* dummy */
-       data[0] = 0xff;
-       for (i = 0; i < op->dummy.nbytes; i++) {
-               err = airoha_snand_write_data(as_ctrl, 0x8, &data[0],
-                                             sizeof(data[0]));
+       data += addr_len;
+       if (dummy_len) {
+               err = airoha_snand_write_data(as_ctrl, data, dummy_len,
+                                             op->dummy.buswidth);
                if (err)
                        return err;
        }
 
        /* data */
-       if (op->data.dir == SPI_MEM_DATA_IN) {
-               err = airoha_snand_read_data(as_ctrl, op->data.buf.in,
-                                            op->data.nbytes);
-               if (err)
-                       return err;
-       } else {
-               err = airoha_snand_write_data(as_ctrl, 0x8, op->data.buf.out,
-                                             op->data.nbytes);
+       if (op->data.nbytes) {
+               if (op->data.dir == SPI_MEM_DATA_IN)
+                       err = airoha_snand_read_data(as_ctrl, op->data.buf.in,
+                                                    op->data.nbytes,
+                                                    op->data.buswidth);
+               else
+                       err = airoha_snand_write_data(as_ctrl, op->data.buf.out,
+                                                     op->data.nbytes,
+                                                     op->data.buswidth);
                if (err)
                        return err;
        }