--- /dev/null
+From stable-owner@vger.kernel.org Fri Jul 7 17:08:18 2023
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 7 Jul 2023 11:07:31 -0400
+Subject: drm/amd/pm: add abnormal fan detection for smu 13.0.0
+To: <stable@vger.kernel.org>
+Cc: <mario.limonciello@amd.com>, Kenneth Feng <kenneth.feng@amd.com>, "Evan Quan" <evan.quan@amd.com>, Alex Deucher <alexander.deucher@amd.com>
+Message-ID: <20230707150734.746135-6-alexander.deucher@amd.com>
+
+From: Kenneth Feng <kenneth.feng@amd.com>
+
+commit 2da0036ea99bccb27f7fe3cf2aa2900860e9be46 upstream
+
+add abnormal fan detection for smu 13.0.0
+
+Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
+Reviewed-by: Evan Quan <evan.quan@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org # 6.1.x
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+@@ -1300,6 +1300,7 @@ static int smu_v13_0_0_get_thermal_tempe
+ range->mem_emergency_max = (pptable->SkuTable.TemperatureLimit[TEMP_MEM] + CTF_OFFSET_MEM)*
+ SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+ range->software_shutdown_temp = powerplay_table->software_shutdown_temp;
++ range->software_shutdown_temp_offset = pptable->SkuTable.FanAbnormalTempLimitOffset;
+
+ return 0;
+ }
--- /dev/null
+From stable-owner@vger.kernel.org Fri Jul 7 17:08:25 2023
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 7 Jul 2023 11:07:29 -0400
+Subject: drm/amd/pm: revise the ASPM settings for thunderbolt attached scenario
+To: <stable@vger.kernel.org>
+Cc: <mario.limonciello@amd.com>, Evan Quan <evan.quan@amd.com>, Alex Deucher <alexander.deucher@amd.com>
+Message-ID: <20230707150734.746135-4-alexander.deucher@amd.com>
+
+From: Evan Quan <evan.quan@amd.com>
+
+commit fd21987274463a439c074b8f3c93d3b132e4c031 upstream
+
+Also, correct the comment for NAVI10_PCIE__LC_L1_INACTIVITY_TBT_DEFAULT
+as 0x0000000E stands for 400ms instead of 4ms.
+
+Signed-off-by: Evan Quan <evan.quan@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 11 +++++++----
+ 1 file changed, 7 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
++++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
+@@ -346,7 +346,7 @@ static void nbio_v2_3_init_registers(str
+
+ #define NAVI10_PCIE__LC_L0S_INACTIVITY_DEFAULT 0x00000000 // off by default, no gains over L1
+ #define NAVI10_PCIE__LC_L1_INACTIVITY_DEFAULT 0x00000009 // 1=1us, 9=1ms
+-#define NAVI10_PCIE__LC_L1_INACTIVITY_TBT_DEFAULT 0x0000000E // 4ms
++#define NAVI10_PCIE__LC_L1_INACTIVITY_TBT_DEFAULT 0x0000000E // 400ms
+
+ static void nbio_v2_3_enable_aspm(struct amdgpu_device *adev,
+ bool enable)
+@@ -479,9 +479,12 @@ static void nbio_v2_3_program_aspm(struc
+ WREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP5, data);
+
+ def = data = RREG32_PCIE(smnPCIE_LC_CNTL);
+- data &= ~PCIE_LC_CNTL__LC_L0S_INACTIVITY_MASK;
+- data |= 0x9 << PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT;
+- data |= 0x1 << PCIE_LC_CNTL__LC_PMI_TO_L1_DIS__SHIFT;
++ data |= NAVI10_PCIE__LC_L0S_INACTIVITY_DEFAULT << PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT;
++ if (pci_is_thunderbolt_attached(adev->pdev))
++ data |= NAVI10_PCIE__LC_L1_INACTIVITY_TBT_DEFAULT << PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT;
++ else
++ data |= NAVI10_PCIE__LC_L1_INACTIVITY_DEFAULT << PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT;
++ data &= ~PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK;
+ if (def != data)
+ WREG32_PCIE(smnPCIE_LC_CNTL, data);
+
--- /dev/null
+From stable-owner@vger.kernel.org Fri Jul 7 17:08:18 2023
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 7 Jul 2023 11:07:32 -0400
+Subject: drm/amdgpu: check RAS irq existence for VCN/JPEG
+To: <stable@vger.kernel.org>
+Cc: <mario.limonciello@amd.com>, Tao Zhou <tao.zhou1@amd.com>, Hawking Zhang <Hawking.Zhang@amd.com>, Alex Deucher <alexander.deucher@amd.com>
+Message-ID: <20230707150734.746135-7-alexander.deucher@amd.com>
+
+From: Tao Zhou <tao.zhou1@amd.com>
+
+commit 4ff96bcc0d40b66bf3ddd6010830e9a4f9b85d53 upstream
+
+No RAS irq is allowed.
+
+Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
+Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org # 6.1.x
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 3 ++-
+ drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 3 ++-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
+@@ -251,7 +251,8 @@ int amdgpu_jpeg_ras_late_init(struct amd
+
+ if (amdgpu_ras_is_supported(adev, ras_block->block)) {
+ for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
+- if (adev->jpeg.harvest_config & (1 << i))
++ if (adev->jpeg.harvest_config & (1 << i) ||
++ !adev->jpeg.inst[i].ras_poison_irq.funcs)
+ continue;
+
+ r = amdgpu_irq_get(adev, &adev->jpeg.inst[i].ras_poison_irq, 0);
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+@@ -1191,7 +1191,8 @@ int amdgpu_vcn_ras_late_init(struct amdg
+
+ if (amdgpu_ras_is_supported(adev, ras_block->block)) {
+ for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
+- if (adev->vcn.harvest_config & (1 << i))
++ if (adev->vcn.harvest_config & (1 << i) ||
++ !adev->vcn.inst[i].ras_poison_irq.funcs)
+ continue;
+
+ r = amdgpu_irq_get(adev, &adev->vcn.inst[i].ras_poison_irq, 0);
--- /dev/null
+From stable-owner@vger.kernel.org Fri Jul 7 17:08:14 2023
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 7 Jul 2023 11:07:26 -0400
+Subject: drm/amdgpu: make sure BOs are locked in amdgpu_vm_get_memory
+To: <stable@vger.kernel.org>
+Cc: mario.limonciello@amd.com, "Christian König" <christian.koenig@amd.com>, "Alex Deucher" <alexander.deucher@amd.com>, "Guchun Chen" <guchun.chen@amd.com>, "Mikhail Gavrilov" <mikhail.v.gavrilov@gmail.com>
+Message-ID: <20230707150734.746135-1-alexander.deucher@amd.com>
+
+From: Christian König <christian.koenig@amd.com>
+
+commit e2ad8e2df432498b1cee2af04df605723f4d75e6 upstream.
+
+We need to grab the lock of the BO or otherwise can run into a crash
+when we try to inspect the current location.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Acked-by: Guchun Chen <guchun.chen@amd.com>
+Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org # 6.3.x
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 69 ++++++++++++++++++---------------
+ 1 file changed, 39 insertions(+), 30 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+@@ -920,42 +920,51 @@ error_unlock:
+ return r;
+ }
+
++static void amdgpu_vm_bo_get_memory(struct amdgpu_bo_va *bo_va,
++ struct amdgpu_mem_stats *stats)
++{
++ struct amdgpu_vm *vm = bo_va->base.vm;
++ struct amdgpu_bo *bo = bo_va->base.bo;
++
++ if (!bo)
++ return;
++
++ /*
++ * For now ignore BOs which are currently locked and potentially
++ * changing their location.
++ */
++ if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv &&
++ !dma_resv_trylock(bo->tbo.base.resv))
++ return;
++
++ amdgpu_bo_get_memory(bo, stats);
++ if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv)
++ dma_resv_unlock(bo->tbo.base.resv);
++}
++
+ void amdgpu_vm_get_memory(struct amdgpu_vm *vm,
+ struct amdgpu_mem_stats *stats)
+ {
+ struct amdgpu_bo_va *bo_va, *tmp;
+
+ spin_lock(&vm->status_lock);
+- list_for_each_entry_safe(bo_va, tmp, &vm->idle, base.vm_status) {
+- if (!bo_va->base.bo)
+- continue;
+- amdgpu_bo_get_memory(bo_va->base.bo, stats);
+- }
+- list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) {
+- if (!bo_va->base.bo)
+- continue;
+- amdgpu_bo_get_memory(bo_va->base.bo, stats);
+- }
+- list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) {
+- if (!bo_va->base.bo)
+- continue;
+- amdgpu_bo_get_memory(bo_va->base.bo, stats);
+- }
+- list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) {
+- if (!bo_va->base.bo)
+- continue;
+- amdgpu_bo_get_memory(bo_va->base.bo, stats);
+- }
+- list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) {
+- if (!bo_va->base.bo)
+- continue;
+- amdgpu_bo_get_memory(bo_va->base.bo, stats);
+- }
+- list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) {
+- if (!bo_va->base.bo)
+- continue;
+- amdgpu_bo_get_memory(bo_va->base.bo, stats);
+- }
++ list_for_each_entry_safe(bo_va, tmp, &vm->idle, base.vm_status)
++ amdgpu_vm_bo_get_memory(bo_va, stats);
++
++ list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status)
++ amdgpu_vm_bo_get_memory(bo_va, stats);
++
++ list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status)
++ amdgpu_vm_bo_get_memory(bo_va, stats);
++
++ list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status)
++ amdgpu_vm_bo_get_memory(bo_va, stats);
++
++ list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status)
++ amdgpu_vm_bo_get_memory(bo_va, stats);
++
++ list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status)
++ amdgpu_vm_bo_get_memory(bo_va, stats);
+ spin_unlock(&vm->status_lock);
+ }
+
--- /dev/null
+From stable-owner@vger.kernel.org Fri Jul 7 17:08:17 2023
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 7 Jul 2023 11:07:27 -0400
+Subject: drm/amdgpu: make sure that BOs have a backing store
+To: <stable@vger.kernel.org>
+Cc: mario.limonciello@amd.com, "Christian König" <christian.koenig@amd.com>, "Alex Deucher" <alexander.deucher@amd.com>, "Guchun Chen" <guchun.chen@amd.com>, "Mikhail Gavrilov" <mikhail.v.gavrilov@gmail.com>
+Message-ID: <20230707150734.746135-2-alexander.deucher@amd.com>
+
+From: Christian König <christian.koenig@amd.com>
+
+commit ca0b954a4315ca2228001c439ae1062561c81989 upstream
+
+It's perfectly possible that the BO is about to be destroyed and doesn't
+have a backing store associated with it.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Acked-by: Guchun Chen <guchun.chen@amd.com>
+Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org # 6.3.x
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+@@ -1266,8 +1266,12 @@ void amdgpu_bo_move_notify(struct ttm_bu
+ void amdgpu_bo_get_memory(struct amdgpu_bo *bo,
+ struct amdgpu_mem_stats *stats)
+ {
+- unsigned int domain;
+ uint64_t size = amdgpu_bo_size(bo);
++ unsigned int domain;
++
++ /* Abort if the BO doesn't currently have a backing store */
++ if (!bo->tbo.resource)
++ return;
+
+ domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);
+ switch (domain) {
--- /dev/null
+From stable-owner@vger.kernel.org Fri Jul 7 17:08:18 2023
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 7 Jul 2023 11:07:30 -0400
+Subject: drm/amdgpu/sdma4: set align mask to 255
+To: <stable@vger.kernel.org>
+Cc: mario.limonciello@amd.com, "Alex Deucher" <alexander.deucher@amd.com>, "Felix Kuehling" <Felix.Kuehling@amd.com>, "Aaron Liu" <aaron.liu@amd.com>, "Christian König" <christian.koenig@amd.com>
+Message-ID: <20230707150734.746135-5-alexander.deucher@amd.com>
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit e5df16d9428f5c6d2d0b1eff244d6c330ba9ef3a upstream
+
+The wptr needs to be incremented at at least 64 dword intervals,
+use 256 to align with windows. This should fix potential hangs
+with unaligned updates.
+
+Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
+Reviewed-by: Aaron Liu <aaron.liu@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 4 ++--
+ drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 4 ++--
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+@@ -2306,7 +2306,7 @@ const struct amd_ip_funcs sdma_v4_0_ip_f
+
+ static const struct amdgpu_ring_funcs sdma_v4_0_ring_funcs = {
+ .type = AMDGPU_RING_TYPE_SDMA,
+- .align_mask = 0xf,
++ .align_mask = 0xff,
+ .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
+ .support_64bit_ptrs = true,
+ .secure_submission_supported = true,
+@@ -2338,7 +2338,7 @@ static const struct amdgpu_ring_funcs sd
+
+ static const struct amdgpu_ring_funcs sdma_v4_0_page_ring_funcs = {
+ .type = AMDGPU_RING_TYPE_SDMA,
+- .align_mask = 0xf,
++ .align_mask = 0xff,
+ .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
+ .support_64bit_ptrs = true,
+ .secure_submission_supported = true,
+--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
+@@ -1740,7 +1740,7 @@ const struct amd_ip_funcs sdma_v4_4_2_ip
+
+ static const struct amdgpu_ring_funcs sdma_v4_4_2_ring_funcs = {
+ .type = AMDGPU_RING_TYPE_SDMA,
+- .align_mask = 0xf,
++ .align_mask = 0xff,
+ .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
+ .support_64bit_ptrs = true,
+ .get_rptr = sdma_v4_4_2_ring_get_rptr,
+@@ -1771,7 +1771,7 @@ static const struct amdgpu_ring_funcs sd
+
+ static const struct amdgpu_ring_funcs sdma_v4_4_2_page_ring_funcs = {
+ .type = AMDGPU_RING_TYPE_SDMA,
+- .align_mask = 0xf,
++ .align_mask = 0xff,
+ .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
+ .support_64bit_ptrs = true,
+ .get_rptr = sdma_v4_4_2_ring_get_rptr,
--- /dev/null
+From stable-owner@vger.kernel.org Fri Jul 7 17:08:14 2023
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 7 Jul 2023 11:07:28 -0400
+Subject: drm/amdgpu: Skip mark offset for high priority rings
+To: <stable@vger.kernel.org>
+Cc: <mario.limonciello@amd.com>, Jiadong Zhu <Jiadong.Zhu@amd.com>, "Alex Deucher" <alexander.deucher@amd.com>
+Message-ID: <20230707150734.746135-3-alexander.deucher@amd.com>
+
+From: Jiadong Zhu <Jiadong.Zhu@amd.com>
+
+commit ef3c36a6e025e9b16ca3321479ba016841fa17a0 upstream
+
+Only low priority rings are using chunks to save the offset.
+Bypass the mark offset callings from high priority rings.
+
+Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit ef3c36a6e025e9b16ca3321479ba016841fa17a0)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c
+@@ -423,6 +423,9 @@ void amdgpu_sw_ring_ib_mark_offset(struc
+ struct amdgpu_ring_mux *mux = &adev->gfx.muxer;
+ unsigned offset;
+
++ if (ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT)
++ return;
++
+ offset = ring->wptr & ring->buf_mask;
+
+ amdgpu_ring_mux_ib_mark_offset(mux, ring, offset, type);
ovl-let-helper-ovl_i_path_real-return-the-realinode.patch
ovl-fix-null-pointer-dereference-in-ovl_get_acl_rcu.patch
loongarch-include-kbuild_cppflags-in-checkflags-invocation.patch
+drm-amdgpu-make-sure-bos-are-locked-in-amdgpu_vm_get_memory.patch
+drm-amdgpu-make-sure-that-bos-have-a-backing-store.patch
+drm-amdgpu-skip-mark-offset-for-high-priority-rings.patch
+drm-amd-pm-revise-the-aspm-settings-for-thunderbolt-attached-scenario.patch
+drm-amdgpu-sdma4-set-align-mask-to-255.patch
+drm-amd-pm-add-abnormal-fan-detection-for-smu-13.0.0.patch
+drm-amdgpu-check-ras-irq-existence-for-vcn-jpeg.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
