spi: zynq_qspi: Clear the TX and RX threshold register

It's safe to clear the TX and RX threshold reg in controller
init, as previous SW might have change this threshold values.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index 2b3e6b90b707ad0ed6afff8471426d121b8c304d..f1fdddace43b33778c0dc286f2ff0008d8abc01d 100644 (file)
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -248,6 +248,10 @@ static void zynq_qspi_init_hw(int is_dual, unsigned int cs)
        /* Disable linear mode as the boot loader may have used it */
        writel(0x0, &zynq_qspi_base->lcr);
 
+       /* Clear the TX and RX threshold reg */
+       writel(0x1, &zynq_qspi_base->txftr);
+       writel(0x1, &zynq_qspi_base->rxftr);
+
        /* Clear the RX FIFO */
        while (readl(&zynq_qspi_base->isr) & ZYNQ_QSPI_IXR_RXNEMTY_MASK)
                readl(&zynq_qspi_base->drxr);