watchdog: at91sam9_wdt.h: Document WDDIS bit position per SoC family

AT91_WDT_WDDIS (bit 15) applies to SAMA5/AT91SAM9261 and
AT91_SAM9X60_WDDIS (bit 12) to SAM9X60/SAMA7G5/SAM9X75. Update
comments to reflect this and add SAMA7G5 and SAM9X75 datasheet
references to the file header.

Signed-off-by: Balakrishnan Sambath <balakrishnan.s@microchip.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20260302113310.133989-3-balakrishnan.s@microchip.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>

diff --git a/drivers/watchdog/at91sam9_wdt.h b/drivers/watchdog/at91sam9_wdt.h
index 298d545df1a157f568f3e2b403dd236014cf3a72..2020694f8f6f3191d4e0dcb990a71c7e0100d683 100644 (file)
--- a/drivers/watchdog/at91sam9_wdt.h
+++ b/drivers/watchdog/at91sam9_wdt.h
@@ -9,6 +9,8 @@
  * Watchdog Timer (WDT) - System peripherals regsters.
  * Based on AT91SAM9261 datasheet revision D.
  * Based on SAM9X60 datasheet.
+ * Based on SAMA7G5 datasheet.
+ * Based on SAM9X75 datasheet.
  *
  */
 
@@ -27,10 +29,10 @@
 #define  AT91_SAM9X60_PERIODRST        BIT(4)          /* Period Reset */
 #define  AT91_SAM9X60_RPTHRST  BIT(5)          /* Minimum Restart Period */
 #define  AT91_WDT_WDFIEN       BIT(12)         /* Fault Interrupt Enable */
-#define  AT91_SAM9X60_WDDIS    BIT(12)         /* Watchdog Disable */
+#define  AT91_SAM9X60_WDDIS    BIT(12)         /* Watchdog Disable (SAM9X60, SAMA7G5, SAM9X75) */
 #define  AT91_WDT_WDRSTEN      BIT(13)         /* Reset Processor */
 #define  AT91_WDT_WDRPROC      BIT(14)         /* Timer Restart */
-#define  AT91_WDT_WDDIS                BIT(15)         /* Watchdog Disable */
+#define  AT91_WDT_WDDIS                BIT(15)         /* Watchdog Disable (SAMA5, AT91SAM9261) */
 #define  AT91_WDT_WDD          (0xfffUL << 16)         /* Delta Value */
 #define  AT91_WDT_SET_WDD(x)   (((x) << 16) & AT91_WDT_WDD)
 #define  AT91_WDT_WDDBGHLT     BIT(28)         /* Debug Halt */