]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/ltphy: Hook up LT Phy Enable & Disable sequences
authorSuraj Kandpal <suraj.kandpal@intel.com>
Sat, 1 Nov 2025 03:25:05 +0000 (08:55 +0530)
committerSuraj Kandpal <suraj.kandpal@intel.com>
Sat, 1 Nov 2025 03:34:10 +0000 (09:04 +0530)
Hook up the LT Phy enable and disable sequences using encoder->
enable/disable_clock and reusing the TBT enable disable sequence from
cx0 PHY since it remains the same.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patch.msgid.link/20251101032513.4171255-18-suraj.kandpal@intel.com
drivers/gpu/drm/i915/display/intel_cx0_phy.c
drivers/gpu/drm/i915/display/intel_cx0_phy.h
drivers/gpu/drm/i915/display/intel_ddi.c
drivers/gpu/drm/i915/display/intel_lt_phy.c
drivers/gpu/drm/i915/display/intel_lt_phy.h

index adfbfd61f35de33dd2f22ed53f83dbfced2c0505..22eea532cd0f95f20bc95c11b977d7de1d74ad55 100644 (file)
@@ -18,6 +18,7 @@
 #include "intel_display_utils.h"
 #include "intel_dp.h"
 #include "intel_hdmi.h"
+#include "intel_lt_phy.h"
 #include "intel_panel.h"
 #include "intel_psr.h"
 #include "intel_snps_hdmi_pll.h"
@@ -3150,8 +3151,8 @@ static int intel_mtl_tbt_clock_select(struct intel_display *display,
        }
 }
 
-static void intel_mtl_tbt_pll_enable(struct intel_encoder *encoder,
-                                    const struct intel_crtc_state *crtc_state)
+void intel_mtl_tbt_pll_enable(struct intel_encoder *encoder,
+                             const struct intel_crtc_state *crtc_state)
 {
        struct intel_display *display = to_intel_display(encoder);
        enum phy phy = intel_encoder_to_phy(encoder);
@@ -3335,7 +3336,7 @@ static bool intel_cx0_pll_is_enabled(struct intel_encoder *encoder)
                             intel_cx0_get_pclk_pll_request(lane);
 }
 
-static void intel_mtl_tbt_pll_disable(struct intel_encoder *encoder)
+void intel_mtl_tbt_pll_disable(struct intel_encoder *encoder)
 {
        struct intel_display *display = to_intel_display(encoder);
        enum phy phy = intel_encoder_to_phy(encoder);
index c9fba91f6c6a6439801f85ed9e56daadd8cc7bc8..84d334b865f77f67fa964bf06ca49e24be3cd934 100644 (file)
@@ -63,5 +63,8 @@ int intel_mtl_tbt_calc_port_clock(struct intel_encoder *encoder);
 void intel_cx0_pll_power_save_wa(struct intel_display *display);
 void intel_lnl_mac_transmit_lfps(struct intel_encoder *encoder,
                                 const struct intel_crtc_state *crtc_state);
+void intel_mtl_tbt_pll_enable(struct intel_encoder *encoder,
+                             const struct intel_crtc_state *crtc_state);
+void intel_mtl_tbt_pll_disable(struct intel_encoder *encoder);
 
 #endif /* __INTEL_CX0_PHY_H__ */
index 1fac0ac6273b8c54badc8e1a0689d8c07315cc0b..b0a58432da570c2b9001d9ae197c390fdb386cce 100644 (file)
@@ -72,6 +72,7 @@
 #include "intel_hotplug.h"
 #include "intel_hti.h"
 #include "intel_lspcon.h"
+#include "intel_lt_phy.h"
 #include "intel_mg_phy_regs.h"
 #include "intel_modeset_lock.h"
 #include "intel_panel.h"
@@ -5231,7 +5232,11 @@ void intel_ddi_init(struct intel_display *display,
        encoder->cloneable = 0;
        encoder->pipe_mask = ~0;
 
-       if (DISPLAY_VER(display) >= 14) {
+       if (HAS_LT_PHY(display)) {
+               encoder->enable_clock = intel_xe3plpd_pll_enable;
+               encoder->disable_clock = intel_xe3plpd_pll_disable;
+               encoder->port_pll_type = intel_mtl_port_pll_type;
+       } else if (DISPLAY_VER(display) >= 14) {
                encoder->enable_clock = intel_mtl_pll_enable;
                encoder->disable_clock = intel_mtl_pll_disable;
                encoder->port_pll_type = intel_mtl_port_pll_type;
index 7ab75ee49269e8c859278ba223a04c7c5e574d5e..c2615c3c6e07d2f6dadad2b9ce9b6add74ce7c7b 100644 (file)
@@ -1705,3 +1705,24 @@ void intel_lt_phy_pll_disable(struct intel_encoder *encoder)
 
        intel_lt_phy_transaction_end(encoder, wakeref);
 }
+
+void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
+                             const struct intel_crtc_state *crtc_state)
+{
+       struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+
+       if (intel_tc_port_in_tbt_alt_mode(dig_port))
+               intel_mtl_tbt_pll_enable(encoder, crtc_state);
+       else
+               intel_lt_phy_pll_enable(encoder, crtc_state);
+}
+
+void intel_xe3plpd_pll_disable(struct intel_encoder *encoder)
+{
+       struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+
+       if (intel_tc_port_in_tbt_alt_mode(dig_port))
+               intel_mtl_tbt_pll_disable(encoder);
+       else
+               intel_lt_phy_pll_disable(encoder);
+}
index 499091e04e82797754b1a74b26f3a8c89237b694..15d3d680871ce1286c9c30172cb0d09b107044ec 100644 (file)
@@ -20,6 +20,9 @@ intel_lt_phy_pll_calc_state(struct intel_crtc_state *crtc_state,
                            struct intel_encoder *encoder);
 int intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
                                 const struct intel_crtc_state *crtc_state);
+void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
+                             const struct intel_crtc_state *crtc_state);
+void intel_xe3plpd_pll_disable(struct intel_encoder *encoder);
 
 #define HAS_LT_PHY(display) (DISPLAY_VER(display) >= 35)