arm64: dts: qcom: sc8280xp: drop broken DP PHY nodes

[ Upstream commit 7cdfb7a54ac88f7cb6d830ebb78bdbcbcb44bb4c ]

The DP PHY register layout of the current binding do not apply to the
newer USB4/USB3/DP PHY which uses a different register layout entirely.

Drop the DP PHY subnodes until the binding has been updated to prevent
the driver from corrupting unrelated registers.

Note that this is also needed in order to not break USB with an upcoming
PHY driver change that checks for overlapping register regions.

Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220919094454.1574-5-johan+linaro@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index cf6d1063bb84a086fec712edb037e55964d4950d..2a702abcf51e35cc279409d4b8d7dd58e3081524 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -1191,16 +1191,6 @@
                                clock-names = "pipe0";
                                clock-output-names = "usb0_phy_pipe_clk_src";
                        };
-
-                       usb_0_dpphy: dp-phy@88ed200 {
-                               reg = <0 0x088ed200 0 0x200>,
-                                     <0 0x088ed400 0 0x200>,
-                                     <0 0x088eda00 0 0x200>,
-                                     <0 0x088ea600 0 0x200>,
-                                     <0 0x088ea800 0 0x200>;
-                               #clock-cells = <1>;
-                               #phy-cells = <0>;
-                       };
                };
 
                usb_1_hsphy: phy@8902000 {
@@ -1253,16 +1243,6 @@
                                clock-names = "pipe0";
                                clock-output-names = "usb1_phy_pipe_clk_src";
                        };
-
-                       usb_1_dpphy: dp-phy@8904200 {
-                               reg = <0 0x08904200 0 0x200>,
-                                     <0 0x08904400 0 0x200>,
-                                     <0 0x08904a00 0 0x200>,
-                                     <0 0x08904600 0 0x200>,
-                                     <0 0x08904800 0 0x200>;
-                               #clock-cells = <1>;
-                               #phy-cells = <0>;
-                       };
                };
 
                system-cache-controller@9200000 {