]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
4.9-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 15 Jul 2021 12:38:47 +0000 (14:38 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 15 Jul 2021 12:38:47 +0000 (14:38 +0200)
added patches:
ata-ahci_sunxi-disable-dipm.patch
drm-radeon-add-the-missed-drm_gem_object_put-in-radeon_user_framebuffer_create.patch
mmc-core-clear-flags-before-allowing-to-retune.patch
mmc-sdhci-fix-warning-message-when-accessing-rpmb-in-hs400-mode.patch
pinctrl-amd-add-device-hid-for-new-amd-gpio-controller.patch

queue-4.9/ata-ahci_sunxi-disable-dipm.patch [new file with mode: 0644]
queue-4.9/drm-radeon-add-the-missed-drm_gem_object_put-in-radeon_user_framebuffer_create.patch [new file with mode: 0644]
queue-4.9/mmc-core-clear-flags-before-allowing-to-retune.patch [new file with mode: 0644]
queue-4.9/mmc-sdhci-fix-warning-message-when-accessing-rpmb-in-hs400-mode.patch [new file with mode: 0644]
queue-4.9/pinctrl-amd-add-device-hid-for-new-amd-gpio-controller.patch [new file with mode: 0644]
queue-4.9/series

diff --git a/queue-4.9/ata-ahci_sunxi-disable-dipm.patch b/queue-4.9/ata-ahci_sunxi-disable-dipm.patch
new file mode 100644 (file)
index 0000000..6e522c5
--- /dev/null
@@ -0,0 +1,43 @@
+From f6bca4d91b2ea052e917cca3f9d866b5cc1d500a Mon Sep 17 00:00:00 2001
+From: Timo Sigurdsson <public_timo.s@silentcreek.de>
+Date: Mon, 14 Jun 2021 09:25:39 +0200
+Subject: ata: ahci_sunxi: Disable DIPM
+
+From: Timo Sigurdsson <public_timo.s@silentcreek.de>
+
+commit f6bca4d91b2ea052e917cca3f9d866b5cc1d500a upstream.
+
+DIPM is unsupported or broken on sunxi. Trying to enable the power
+management policy med_power_with_dipm on an Allwinner A20 SoC based board
+leads to immediate I/O errors and the attached SATA disk disappears from
+the /dev filesystem. A reset (power cycle) is required to make the SATA
+controller or disk work again. The A10 and A20 SoC data sheets and manuals
+don't mention DIPM at all [1], so it's fair to assume that it's simply not
+supported. But even if it was, it should be considered broken and best be
+disabled in the ahci_sunxi driver.
+
+[1] https://github.com/allwinner-zh/documents/tree/master/
+
+Fixes: c5754b5220f0 ("ARM: sunxi: Add support for Allwinner SUNXi SoCs sata to ahci_platform")
+Cc: stable@vger.kernel.org
+Signed-off-by: Timo Sigurdsson <public_timo.s@silentcreek.de>
+Tested-by: Timo Sigurdsson <public_timo.s@silentcreek.de>
+Link: https://lore.kernel.org/r/20210614072539.3307-1-public_timo.s@silentcreek.de
+Signed-off-by: Jens Axboe <axboe@kernel.dk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/ata/ahci_sunxi.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/ata/ahci_sunxi.c
++++ b/drivers/ata/ahci_sunxi.c
+@@ -165,7 +165,7 @@ static void ahci_sunxi_start_engine(stru
+ }
+ static const struct ata_port_info ahci_sunxi_port_info = {
+-      .flags          = AHCI_FLAG_COMMON | ATA_FLAG_NCQ,
++      .flags          = AHCI_FLAG_COMMON | ATA_FLAG_NCQ | ATA_FLAG_NO_DIPM,
+       .pio_mask       = ATA_PIO4,
+       .udma_mask      = ATA_UDMA6,
+       .port_ops       = &ahci_platform_ops,
diff --git a/queue-4.9/drm-radeon-add-the-missed-drm_gem_object_put-in-radeon_user_framebuffer_create.patch b/queue-4.9/drm-radeon-add-the-missed-drm_gem_object_put-in-radeon_user_framebuffer_create.patch
new file mode 100644 (file)
index 0000000..d800009
--- /dev/null
@@ -0,0 +1,35 @@
+From 9ba85914c36c8fed9bf3e8b69c0782908c1247b7 Mon Sep 17 00:00:00 2001
+From: Jing Xiangfeng <jingxiangfeng@huawei.com>
+Date: Tue, 29 Jun 2021 19:44:55 +0800
+Subject: drm/radeon: Add the missed drm_gem_object_put() in radeon_user_framebuffer_create()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Jing Xiangfeng <jingxiangfeng@huawei.com>
+
+commit 9ba85914c36c8fed9bf3e8b69c0782908c1247b7 upstream.
+
+radeon_user_framebuffer_create() misses to call drm_gem_object_put() in
+an error path. Add the missed function call to fix it.
+
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Jing Xiangfeng <jingxiangfeng@huawei.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_display.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/radeon/radeon_display.c
++++ b/drivers/gpu/drm/radeon/radeon_display.c
+@@ -1359,6 +1359,7 @@ radeon_user_framebuffer_create(struct dr
+       /* Handle is imported dma-buf, so cannot be migrated to VRAM for scanout */
+       if (obj->import_attach) {
+               DRM_DEBUG_KMS("Cannot create framebuffer from imported dma_buf\n");
++              drm_gem_object_put(obj);
+               return ERR_PTR(-EINVAL);
+       }
diff --git a/queue-4.9/mmc-core-clear-flags-before-allowing-to-retune.patch b/queue-4.9/mmc-core-clear-flags-before-allowing-to-retune.patch
new file mode 100644 (file)
index 0000000..f445ef6
--- /dev/null
@@ -0,0 +1,56 @@
+From 77347eda64ed5c9383961d1de9165f9d0b7d8df6 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Thu, 24 Jun 2021 17:16:14 +0200
+Subject: mmc: core: clear flags before allowing to retune
+
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+
+commit 77347eda64ed5c9383961d1de9165f9d0b7d8df6 upstream.
+
+It might be that something goes wrong during tuning so the MMC core will
+immediately trigger a retune. In our case it was:
+
+ - we sent a tuning block
+ - there was an error so we need to send an abort cmd to the eMMC
+ - the abort cmd had a CRC error
+ - retune was set by the MMC core
+
+This lead to a vicious circle causing a performance regression of 75%.
+So, clear retuning flags before we enable retuning to start with a known
+cleared state.
+
+Reported-by Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Suggested-by: Adrian Hunter <adrian.hunter@intel.com>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Adrian Hunter <adrian.hunter@intel.com>
+Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Fixes: bd11e8bd03ca ("mmc: core: Flag re-tuning is needed on CRC errors")
+Cc: stable@vger.kernel.org
+Link: https://lore.kernel.org/r/20210624151616.38770-2-wsa+renesas@sang-engineering.com
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/core/core.c |    7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/drivers/mmc/core/core.c
++++ b/drivers/mmc/core/core.c
+@@ -1171,11 +1171,14 @@ int mmc_execute_tuning(struct mmc_card *
+       err = host->ops->execute_tuning(host, opcode);
+-      if (err)
++      if (err) {
+               pr_err("%s: tuning execution failed: %d\n",
+                       mmc_hostname(host), err);
+-      else
++      } else {
++              host->retune_now = 0;
++              host->need_retune = 0;
+               mmc_retune_enable(host);
++      }
+       return err;
+ }
diff --git a/queue-4.9/mmc-sdhci-fix-warning-message-when-accessing-rpmb-in-hs400-mode.patch b/queue-4.9/mmc-sdhci-fix-warning-message-when-accessing-rpmb-in-hs400-mode.patch
new file mode 100644 (file)
index 0000000..70b7a37
--- /dev/null
@@ -0,0 +1,61 @@
+From d0244847f9fc5e20df8b7483c8a4717fe0432d38 Mon Sep 17 00:00:00 2001
+From: Al Cooper <alcooperx@gmail.com>
+Date: Thu, 24 Jun 2021 12:30:45 -0400
+Subject: mmc: sdhci: Fix warning message when accessing RPMB in HS400 mode
+
+From: Al Cooper <alcooperx@gmail.com>
+
+commit d0244847f9fc5e20df8b7483c8a4717fe0432d38 upstream.
+
+When an eMMC device is being run in HS400 mode, any access to the
+RPMB device will cause the error message "mmc1: Invalid UHS-I mode
+selected". This happens as a result of tuning being disabled before
+RPMB access and then re-enabled after the RPMB access is complete.
+When tuning is re-enabled, the system has to switch from HS400
+to HS200 to do the tuning and then back to HS400. As part of
+sequence to switch from HS400 to HS200 the system is temporarily
+put into HS mode. When switching to HS mode, sdhci_get_preset_value()
+is called and does not have support for HS mode and prints the warning
+message and returns the preset for SDR12. The fix is to add support
+for MMC and SD HS modes to sdhci_get_preset_value().
+
+This can be reproduced on any system running eMMC in HS400 mode
+(not HS400ES) by using the "mmc" utility to run the following
+command: "mmc rpmb read-counter /dev/mmcblk0rpmb".
+
+Signed-off-by: Al Cooper <alcooperx@gmail.com>
+Acked-by: Adrian Hunter <adrian.hunter@intel.com>
+Fixes: 52983382c74f ("mmc: sdhci: enhance preset value function")
+Cc: stable@vger.kernel.org
+Link: https://lore.kernel.org/r/20210624163045.33651-1-alcooperx@gmail.com
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci.c |    4 ++++
+ drivers/mmc/host/sdhci.h |    1 +
+ 2 files changed, 5 insertions(+)
+
+--- a/drivers/mmc/host/sdhci.c
++++ b/drivers/mmc/host/sdhci.c
+@@ -1219,6 +1219,10 @@ static u16 sdhci_get_preset_value(struct
+       u16 preset = 0;
+       switch (host->timing) {
++      case MMC_TIMING_MMC_HS:
++      case MMC_TIMING_SD_HS:
++              preset = sdhci_readw(host, SDHCI_PRESET_FOR_HIGH_SPEED);
++              break;
+       case MMC_TIMING_UHS_SDR12:
+               preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR12);
+               break;
+--- a/drivers/mmc/host/sdhci.h
++++ b/drivers/mmc/host/sdhci.h
+@@ -237,6 +237,7 @@
+ /* 60-FB reserved */
++#define SDHCI_PRESET_FOR_HIGH_SPEED   0x64
+ #define SDHCI_PRESET_FOR_SDR12 0x66
+ #define SDHCI_PRESET_FOR_SDR25 0x68
+ #define SDHCI_PRESET_FOR_SDR50 0x6A
diff --git a/queue-4.9/pinctrl-amd-add-device-hid-for-new-amd-gpio-controller.patch b/queue-4.9/pinctrl-amd-add-device-hid-for-new-amd-gpio-controller.patch
new file mode 100644 (file)
index 0000000..25558b7
--- /dev/null
@@ -0,0 +1,34 @@
+From 1ca46d3e43569186bd1decfb02a6b4c4ddb4304b Mon Sep 17 00:00:00 2001
+From: Maximilian Luz <luzmaximilian@gmail.com>
+Date: Wed, 12 May 2021 23:03:16 +0200
+Subject: pinctrl/amd: Add device HID for new AMD GPIO controller
+
+From: Maximilian Luz <luzmaximilian@gmail.com>
+
+commit 1ca46d3e43569186bd1decfb02a6b4c4ddb4304b upstream.
+
+Add device HID AMDI0031 to the AMD GPIO controller driver match table.
+This controller can be found on Microsoft Surface Laptop 4 devices and
+seems similar enough that we can just copy the existing AMDI0030 entry.
+
+Cc: <stable@vger.kernel.org> # 5.10+
+Tested-by: Sachi King <nakato@nakato.io>
+Signed-off-by: Maximilian Luz <luzmaximilian@gmail.com>
+Link: https://lore.kernel.org/r/20210512210316.1982416-1-luzmaximilian@gmail.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pinctrl/pinctrl-amd.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/pinctrl/pinctrl-amd.c
++++ b/drivers/pinctrl/pinctrl-amd.c
+@@ -896,6 +896,7 @@ static int amd_gpio_remove(struct platfo
+ static const struct acpi_device_id amd_gpio_acpi_match[] = {
+       { "AMD0030", 0 },
+       { "AMDI0030", 0},
++      { "AMDI0031", 0},
+       { },
+ };
+ MODULE_DEVICE_TABLE(acpi, amd_gpio_acpi_match);
index f8dc9418f565ab95a358af62bb4a3f59f0766723..a2bca789716840936089aa39fb3467ffce5614a0 100644 (file)
@@ -160,3 +160,8 @@ can-gw-synchronize-rcu-operations-before-removing-gw-job-entry.patch
 can-bcm-delay-release-of-struct-bcm_op-after-synchronize_rcu.patch
 mac80211-fix-memory-corruption-in-eapol-handling.patch
 powerpc-barrier-avoid-collision-with-clang-s-__lwsync-macro.patch
+drm-radeon-add-the-missed-drm_gem_object_put-in-radeon_user_framebuffer_create.patch
+pinctrl-amd-add-device-hid-for-new-amd-gpio-controller.patch
+mmc-sdhci-fix-warning-message-when-accessing-rpmb-in-hs400-mode.patch
+mmc-core-clear-flags-before-allowing-to-retune.patch
+ata-ahci_sunxi-disable-dipm.patch