clk: mediatek: set CLK_PARENT_XTAL on fixed factor clocks

Explicitly set the CLK_PARENT_XTAL flag for fixed factor clocks.

Prior to this, it was assumed that clock ID 0 was CLK_XTAL and other
IDs used a different clock tree when no parent was explicitly set.
Making the parent explicit will allow us to remove this confusing
behavior in the future.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-8-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>

diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c
index 077820550a5493e33c8e447b6fb1c5637f7989e7..44d2836710e67c8f5d3a4b6634581d0f0cab4161 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -95,7 +95,7 @@ static const struct mtk_gate apmixed_cgs[] = {
        FACTOR(_id, _parent, _mult, _div, CLK_PARENT_TOPCKGEN)
 
 #define FACTOR2(_id, _parent, _mult, _div)                     \
-       FACTOR(_id, _parent, _mult, _div, 0)
+       FACTOR(_id, _parent, _mult, _div, CLK_PARENT_XTAL)
 
 static const struct mtk_fixed_clk top_fixed_clks[] = {
        FIXED_CLK0(CLK_TOP_TO_U2_PHY, 31250000),

diff --git a/drivers/clk/mediatek/clk-mt7623.c b/drivers/clk/mediatek/clk-mt7623.c
index 4d16610f4d0d0da0921948990f05a7e0205d966e..d52555283d2f9aa487bf0a2695b8a209573804cc 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7623.c
+++ b/drivers/clk/mediatek/clk-mt7623.c
@@ -269,7 +269,7 @@ static const int top_id_offs_map[CLK_TOP_NR + 1] = {
        FACTOR(_id, _parent, _mult, _div, CLK_PARENT_TOPCKGEN)
 
 #define FACTOR2(_id, _parent, _mult, _div)                     \
-       FACTOR(_id, _parent, _mult, _div, 0)
+       FACTOR(_id, _parent, _mult, _div, CLK_PARENT_XTAL)
 
 static const struct mtk_fixed_clk top_fixed_clks[] = {
        FIXED_CLK0(CLK_TOP_DPI, 108 * MHZ),

diff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c
index 85011f5327b81e2c5935f5872ca28365584f0e99..1d697539ce2e28c9c20244d546d6d176c408effa 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7629.c
+++ b/drivers/clk/mediatek/clk-mt7629.c
@@ -71,7 +71,7 @@ static const struct mtk_pll_data apmixed_plls[] = {
        FACTOR(_id, _parent, _mult, _div, CLK_PARENT_TOPCKGEN)
 
 #define FACTOR2(_id, _parent, _mult, _div)                     \
-       FACTOR(_id, _parent, _mult, _div, 0)
+       FACTOR(_id, _parent, _mult, _div, CLK_PARENT_XTAL)
 
 static const struct mtk_fixed_clk top_fixed_clks[] = {
        FIXED_CLK0(CLK_TOP_TO_U2_PHY, 31250000),

diff --git a/drivers/clk/mediatek/clk-mt8512.c b/drivers/clk/mediatek/clk-mt8512.c
index 69576304f2f966f2de2410bb11def7d50676994c..7af5858286c7e48951d566ba4d74142bb0fc8946 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8512.c
+++ b/drivers/clk/mediatek/clk-mt8512.c
@@ -69,7 +69,7 @@ static const struct mtk_pll_data apmixed_plls[] = {
        FACTOR(_id, _parent, _mult, _div, CLK_PARENT_TOPCKGEN)
 
 #define FACTOR2(_id, _parent, _mult, _div)     \
-       FACTOR(_id, _parent, _mult, _div, 0)
+       FACTOR(_id, _parent, _mult, _div, CLK_PARENT_XTAL)
 
 static const struct mtk_fixed_clk top_fixed_clks[] = {
        FIXED_CLK0(CLK_TOP_CLK_NULL, 26000000),

diff --git a/drivers/clk/mediatek/clk-mt8516.c b/drivers/clk/mediatek/clk-mt8516.c
index dac4aad61ef84cf220df0a837b1960885edb07f5..9d03e2458860a5e5de5b5f461cd97400cc13ca16 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8516.c
+++ b/drivers/clk/mediatek/clk-mt8516.c
@@ -62,7 +62,7 @@ static const struct mtk_pll_data apmixed_plls[] = {
        FACTOR(_id, _parent, _mult, _div, CLK_PARENT_TOPCKGEN)
 
 #define FACTOR2(_id, _parent, _mult, _div)     \
-       FACTOR(_id, _parent, _mult, _div, 0)
+       FACTOR(_id, _parent, _mult, _div, CLK_PARENT_XTAL)
 
 static const struct mtk_fixed_clk top_fixed_clks[] = {
        FIXED_CLK0(CLK_TOP_CLK_NULL, 26000000),

diff --git a/drivers/clk/mediatek/clk-mt8518.c b/drivers/clk/mediatek/clk-mt8518.c
index c19828def064dff593e08f834678853df9bfd9aa..e7de9d33e003af768c3aeacb8ce06cb258633619 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8518.c
+++ b/drivers/clk/mediatek/clk-mt8518.c
@@ -64,7 +64,7 @@ static const struct mtk_pll_data apmixed_plls[] = {
        FACTOR(_id, _parent, _mult, _div, CLK_PARENT_TOPCKGEN)
 
 #define FACTOR2(_id, _parent, _mult, _div)     \
-       FACTOR(_id, _parent, _mult, _div, 0)
+       FACTOR(_id, _parent, _mult, _div, CLK_PARENT_XTAL)
 
 static const struct mtk_fixed_clk top_fixed_clks[] = {
        FIXED_CLK0(CLK_TOP_CLK_NULL, 26000000),