static void fsl_imx6_init(Object *obj)
{
- MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6State *s = FSL_IMX6(obj);
char name[NAME_SIZE];
int i;
- for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) {
- snprintf(name, NAME_SIZE, "cpu%d", i);
- object_initialize_child(obj, name, &s->cpu[i],
- ARM_CPU_TYPE_NAME("cortex-a9"));
- }
-
object_initialize_child(obj, "a9mpcore", &s->a9mpcore, TYPE_A9MPCORE_PRIV);
object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX6_CCM);
unsigned int smp_cpus = ms->smp.cpus;
DeviceState *mpcore = DEVICE(&s->a9mpcore);
DeviceState *gic;
+ char name[NAME_SIZE];
if (smp_cpus > FSL_IMX6_NUM_CPUS) {
error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
return;
}
+ for (i = 0; i < smp_cpus; i++) {
+ snprintf(name, NAME_SIZE, "cpu%d", i);
+ object_initialize_child(OBJECT(dev), name, &s->cpu[i],
+ ARM_CPU_TYPE_NAME("cortex-a9"));
+ }
+
for (i = 0; i < smp_cpus; i++) {
/* On uniprocessor, the CBAR is set to 0 */