[Why]
Newer DCN bandwidth calculations require new definitions.
[How]
Add new fields cpu_id and vram_bit_width for
atom_integrated_system_info_v2_3, and add a memtype for LpDDR5x.
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
uint8_t gpu_package_id;
struct edp_info_table edp1_info;
struct edp_info_table edp2_info;
- uint32_t reserved2[8];
+ uint32_t cpuid;
+ uint32_t vram_bit_width;
+ uint32_t reserved2[6];
struct atom_external_display_connection_info extdispconninfo;
uint8_t UMACarveoutVersion;
uint8_t UMACarveoutIndexMax;
Hbm2MemType, ///< Assign 33 to HBM2
Ddr5MemType, ///< Assign 34 to DDR5
LpDdr5MemType, ///< Assign 35 to LPDDR5
+ LpDdr5xMemType, ///< Assign 36 to LPDDR5x
};