rockchip: rk3399: fix TIMER_FMODE constant

The free running mode is 0 at bit offset 1. User mode is 1 at bit offset
1. Currently, free running mode is 1 at offset 0, which is already the
case thanks to TIME_EN.

So, this essentially does not change the actual value written to the
register as it is TIME_EN | TIMER_FMODE which currently is 0x1 | BIT(0)
= 0b1, and will become 0x1 | (0 << 1) = 0b1.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 43d151708e478b81f3d3447059ec983fa3b48c2a..8687a9347ec29a62d6d403577f73606756388cf0 100644 (file)
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -61,8 +61,8 @@ struct mm_region *mem_map = rk3399_mem_map;
 #define TIMER_CONTROL_REG      0x1c
 
 #define TIMER_EN       0x1
-#define TIMER_FMODE    BIT(0)
-#define TIMER_RMODE    BIT(1)
+#define TIMER_FMODE    (0 << 1)
+#define TIMER_RMODE    (1 << 1)
 
 void rockchip_stimer_init(void)
 {