]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: renesas: r9a09g056: Add I3C node
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Thu, 4 Sep 2025 16:59:09 +0000 (17:59 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 12 Sep 2025 09:15:00 +0000 (11:15 +0200)
Add I3C node to RZ/V2N ("R9A09G056") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20250904165909.281131-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a09g056.dtsi

index 50a3d42d192c3c6c9ee5a1ea62c852bb954ff280..8871108789060893eab90a93a4e6bc1a2c43fa9b 100644 (file)
                        status = "disabled";
                };
 
+               i3c: i3c@12400000 {
+                       compatible = "renesas,r9a09g056-i3c", "renesas,r9a09g047-i3c";
+                       reg = <0 0x12400000 0 0x10000>;
+                       clocks = <&cpg CPG_MOD 0x91>, <&cpg CPG_MOD 0x92>, <&cpg CPG_MOD 0x90>;
+                       clock-names = "pclk", "tclk", "pclkrw";
+                       interrupts = <GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 675 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 677 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 678 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 679 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 680 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 681 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 682 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ierr", "terr", "abort", "resp",
+                                         "cmd", "ibi", "rx", "tx", "rcv",
+                                         "st", "sp", "tend", "nack",
+                                         "al", "tmo", "wu";
+                       resets = <&cpg 0x96>, <&cpg 0x97>;
+                       reset-names = "presetn", "tresetn";
+                       power-domains = <&cpg>;
+                       #address-cells = <3>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                i2c0: i2c@14400400 {
                        compatible = "renesas,riic-r9a09g056", "renesas,riic-r9a09g057";
                        reg = <0 0x14400400 0 0x400>;