KVM: arm64: vgic-v5: Transfer edge pending state to ICH_PPI_PENDRx_EL2

While it is perfectly correct to leave the pending state of a level
interrupt as is when queuing it (it is, after all, only driven by
the line), edge pending state must be transfered, as nothing will
lower it.

Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Fixes: 4d591252bacb2 ("KVM: arm64: gic-v5: Implement PPI interrupt injection")
Link: https://sashiko.dev/#/patchset/20260319154937.3619520-1-sascha.bischoff%40arm.com
Link: https://patch.msgid.link/20260401103611.357092-8-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --git a/arch/arm64/kvm/vgic/vgic-v5.c b/arch/arm64/kvm/vgic/vgic-v5.c
index 119d7d01d0e773872d1ea0d878608043fd8d81c7..422741c86c6a8940bcbbbbad6f77198e7a0a08f8 100644 (file)
--- a/arch/arm64/kvm/vgic/vgic-v5.c
+++ b/arch/arm64/kvm/vgic/vgic-v5.c
@@ -445,8 +445,11 @@ void vgic_v5_flush_ppi_state(struct kvm_vcpu *vcpu)
 
                irq = vgic_get_vcpu_irq(vcpu, intid);
 
-               scoped_guard(raw_spinlock_irqsave, &irq->irq_lock)
+               scoped_guard(raw_spinlock_irqsave, &irq->irq_lock) {
                        __assign_bit(i, pendr, irq_is_pending(irq));
+                       if (irq->config == VGIC_CONFIG_EDGE)
+                               irq->pending_latch = false;
+               }
 
                vgic_put_irq(vcpu->kvm, irq);
        }