]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
6.6-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 24 Nov 2023 11:41:28 +0000 (11:41 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 24 Nov 2023 11:41:28 +0000 (11:41 +0000)
added patches:
parisc-fix-mmap_base-calculation-when-stack-grows-upwards.patch
parisc-pgtable-do-not-drop-upper-5-address-bits-of-physical-address.patch
parisc-power-fix-power-soft-off-when-running-on-qemu.patch
parisc-prevent-booting-64-bit-kernels-on-pa1.x-machines.patch
xhci-enable-rpm-on-controllers-that-support-low-power-states.patch

queue-6.6/parisc-fix-mmap_base-calculation-when-stack-grows-upwards.patch [new file with mode: 0644]
queue-6.6/parisc-pgtable-do-not-drop-upper-5-address-bits-of-physical-address.patch [new file with mode: 0644]
queue-6.6/parisc-power-fix-power-soft-off-when-running-on-qemu.patch [new file with mode: 0644]
queue-6.6/parisc-prevent-booting-64-bit-kernels-on-pa1.x-machines.patch [new file with mode: 0644]
queue-6.6/series
queue-6.6/xhci-enable-rpm-on-controllers-that-support-low-power-states.patch [new file with mode: 0644]

diff --git a/queue-6.6/parisc-fix-mmap_base-calculation-when-stack-grows-upwards.patch b/queue-6.6/parisc-fix-mmap_base-calculation-when-stack-grows-upwards.patch
new file mode 100644 (file)
index 0000000..e496cda
--- /dev/null
@@ -0,0 +1,120 @@
+From 5f74f820f6fc844b95f9e5e406e0a07d97510420 Mon Sep 17 00:00:00 2001
+From: Helge Deller <deller@gmx.de>
+Date: Mon, 13 Nov 2023 11:12:57 +0100
+Subject: parisc: fix mmap_base calculation when stack grows upwards
+
+From: Helge Deller <deller@gmx.de>
+
+commit 5f74f820f6fc844b95f9e5e406e0a07d97510420 upstream.
+
+Matoro reported various userspace crashes on the parisc platform with kernel
+6.6 and bisected it to commit 3033cd430768 ("parisc: Use generic mmap top-down
+layout and brk randomization").
+
+That commit switched parisc to use the common infrastructure to calculate
+mmap_base, but missed that the mmap_base() function takes care for
+architectures where the stack grows downwards only.
+
+Fix the mmap_base() calculation to include the stack-grows-upwards case
+and thus fix the userspace crashes on parisc.
+
+Link: https://lkml.kernel.org/r/ZVH2qeS1bG7/1J/l@p100
+Fixes: 3033cd430768 ("parisc: Use generic mmap top-down layout and brk randomization")
+Signed-off-by: Helge Deller <deller@gmx.de>
+Reported-by: matoro <matoro_mailinglist_kernel@matoro.tk>
+Tested-by: matoro <matoro_mailinglist_kernel@matoro.tk>
+Cc: <stable@vger.kernel.org>   [6.6+]
+Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/parisc/Kconfig                 |    6 +++---
+ arch/parisc/include/asm/elf.h       |   10 +---------
+ arch/parisc/include/asm/processor.h |    2 ++
+ arch/parisc/kernel/sys_parisc.c     |    2 +-
+ mm/util.c                           |   10 ++++++++++
+ 5 files changed, 17 insertions(+), 13 deletions(-)
+
+--- a/arch/parisc/Kconfig
++++ b/arch/parisc/Kconfig
+@@ -138,11 +138,11 @@ config ARCH_MMAP_RND_COMPAT_BITS_MIN
+       default 8
+ config ARCH_MMAP_RND_BITS_MAX
+-      default 24 if 64BIT
+-      default 17
++      default 18 if 64BIT
++      default 13
+ config ARCH_MMAP_RND_COMPAT_BITS_MAX
+-      default 17
++      default 13
+ # unless you want to implement ACPI on PA-RISC ... ;-)
+ config PM
+--- a/arch/parisc/include/asm/elf.h
++++ b/arch/parisc/include/asm/elf.h
+@@ -349,15 +349,7 @@ struct pt_regs;   /* forward declaration..
+ #define ELF_HWCAP     0
+-/* Masks for stack and mmap randomization */
+-#define BRK_RND_MASK  (is_32bit_task() ? 0x07ffUL : 0x3ffffUL)
+-#define MMAP_RND_MASK (is_32bit_task() ? 0x1fffUL : 0x3ffffUL)
+-#define STACK_RND_MASK        MMAP_RND_MASK
+-
+-struct mm_struct;
+-extern unsigned long arch_randomize_brk(struct mm_struct *);
+-#define arch_randomize_brk arch_randomize_brk
+-
++#define STACK_RND_MASK        0x7ff   /* 8MB of VA */
+ #define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
+ struct linux_binprm;
+--- a/arch/parisc/include/asm/processor.h
++++ b/arch/parisc/include/asm/processor.h
+@@ -47,6 +47,8 @@
+ #ifndef __ASSEMBLY__
++struct rlimit;
++unsigned long mmap_upper_limit(struct rlimit *rlim_stack);
+ unsigned long calc_max_stack_size(unsigned long stack_max);
+ /*
+--- a/arch/parisc/kernel/sys_parisc.c
++++ b/arch/parisc/kernel/sys_parisc.c
+@@ -77,7 +77,7 @@ unsigned long calc_max_stack_size(unsign
+  * indicating that "current" should be used instead of a passed-in
+  * value from the exec bprm as done with arch_pick_mmap_layout().
+  */
+-static unsigned long mmap_upper_limit(struct rlimit *rlim_stack)
++unsigned long mmap_upper_limit(struct rlimit *rlim_stack)
+ {
+       unsigned long stack_base;
+--- a/mm/util.c
++++ b/mm/util.c
+@@ -414,6 +414,15 @@ static int mmap_is_legacy(struct rlimit
+ static unsigned long mmap_base(unsigned long rnd, struct rlimit *rlim_stack)
+ {
++#ifdef CONFIG_STACK_GROWSUP
++      /*
++       * For an upwards growing stack the calculation is much simpler.
++       * Memory for the maximum stack size is reserved at the top of the
++       * task. mmap_base starts directly below the stack and grows
++       * downwards.
++       */
++      return PAGE_ALIGN_DOWN(mmap_upper_limit(rlim_stack) - rnd);
++#else
+       unsigned long gap = rlim_stack->rlim_cur;
+       unsigned long pad = stack_guard_gap;
+@@ -431,6 +440,7 @@ static unsigned long mmap_base(unsigned
+               gap = MAX_GAP;
+       return PAGE_ALIGN(STACK_TOP - gap - rnd);
++#endif
+ }
+ void arch_pick_mmap_layout(struct mm_struct *mm, struct rlimit *rlim_stack)
diff --git a/queue-6.6/parisc-pgtable-do-not-drop-upper-5-address-bits-of-physical-address.patch b/queue-6.6/parisc-pgtable-do-not-drop-upper-5-address-bits-of-physical-address.patch
new file mode 100644 (file)
index 0000000..58563ad
--- /dev/null
@@ -0,0 +1,49 @@
+From 166b0110d1ee53290bd11618df6e3991c117495a Mon Sep 17 00:00:00 2001
+From: Helge Deller <deller@gmx.de>
+Date: Tue, 7 Nov 2023 14:33:32 +0100
+Subject: parisc/pgtable: Do not drop upper 5 address bits of physical address
+
+From: Helge Deller <deller@gmx.de>
+
+commit 166b0110d1ee53290bd11618df6e3991c117495a upstream.
+
+When calculating the pfn for the iitlbt/idtlbt instruction, do not
+drop the upper 5 address bits. This doesn't seem to have an effect
+on physical hardware which uses less physical address bits, but in
+qemu the missing bits are visible.
+
+Signed-off-by: Helge Deller <deller@gmx.de>
+Cc:  <stable@vger.kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/parisc/kernel/entry.S |    7 +++----
+ 1 file changed, 3 insertions(+), 4 deletions(-)
+
+--- a/arch/parisc/kernel/entry.S
++++ b/arch/parisc/kernel/entry.S
+@@ -475,13 +475,13 @@
+        * to a CPU TLB 4k PFN (4k => 12 bits to shift) */
+       #define PAGE_ADD_SHIFT          (PAGE_SHIFT-12)
+       #define PAGE_ADD_HUGE_SHIFT     (REAL_HPAGE_SHIFT-12)
++      #define PFN_START_BIT   (63-ASM_PFN_PTE_SHIFT+(63-58)-PAGE_ADD_SHIFT)
+       /* Drop prot bits and convert to page addr for iitlbt and idtlbt */
+       .macro          convert_for_tlb_insert20 pte,tmp
+ #ifdef CONFIG_HUGETLB_PAGE
+       copy            \pte,\tmp
+-      extrd,u         \tmp,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\
+-                              64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte
++      extrd,u         \tmp,PFN_START_BIT,PFN_START_BIT+1,\pte
+       depdi           _PAGE_SIZE_ENCODING_DEFAULT,63,\
+                               (63-58)+PAGE_ADD_SHIFT,\pte
+@@ -489,8 +489,7 @@
+       depdi           _HUGE_PAGE_SIZE_ENCODING_DEFAULT,63,\
+                               (63-58)+PAGE_ADD_HUGE_SHIFT,\pte
+ #else /* Huge pages disabled */
+-      extrd,u         \pte,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\
+-                              64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte
++      extrd,u         \pte,PFN_START_BIT,PFN_START_BIT+1,\pte
+       depdi           _PAGE_SIZE_ENCODING_DEFAULT,63,\
+                               (63-58)+PAGE_ADD_SHIFT,\pte
+ #endif
diff --git a/queue-6.6/parisc-power-fix-power-soft-off-when-running-on-qemu.patch b/queue-6.6/parisc-power-fix-power-soft-off-when-running-on-qemu.patch
new file mode 100644 (file)
index 0000000..9b8e9cf
--- /dev/null
@@ -0,0 +1,31 @@
+From 6ad6e15a9c46b8f0932cd99724f26f3db4db1cdf Mon Sep 17 00:00:00 2001
+From: Helge Deller <deller@gmx.de>
+Date: Fri, 17 Nov 2023 16:43:52 +0100
+Subject: parisc/power: Fix power soft-off when running on qemu
+
+From: Helge Deller <deller@gmx.de>
+
+commit 6ad6e15a9c46b8f0932cd99724f26f3db4db1cdf upstream.
+
+Firmware returns the physical address of the power switch,
+so need to use gsc_writel() instead of direct memory access.
+
+Fixes: d0c219472980 ("parisc/power: Add power soft-off when running on qemu")
+Signed-off-by: Helge Deller <deller@gmx.de>
+Cc: stable@vger.kernel.org # v6.0+
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/parisc/power.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/parisc/power.c
++++ b/drivers/parisc/power.c
+@@ -201,7 +201,7 @@ static struct notifier_block parisc_pani
+ static int qemu_power_off(struct sys_off_data *data)
+ {
+       /* this turns the system off via SeaBIOS */
+-      *(int *)data->cb_data = 0;
++      gsc_writel(0, (unsigned long) data->cb_data);
+       pdc_soft_power_button(1);
+       return NOTIFY_DONE;
+ }
diff --git a/queue-6.6/parisc-prevent-booting-64-bit-kernels-on-pa1.x-machines.patch b/queue-6.6/parisc-prevent-booting-64-bit-kernels-on-pa1.x-machines.patch
new file mode 100644 (file)
index 0000000..01c98a9
--- /dev/null
@@ -0,0 +1,35 @@
+From a406b8b424fa01f244c1aab02ba186258448c36b Mon Sep 17 00:00:00 2001
+From: Helge Deller <deller@gmx.de>
+Date: Fri, 10 Nov 2023 16:13:15 +0100
+Subject: parisc: Prevent booting 64-bit kernels on PA1.x machines
+
+From: Helge Deller <deller@gmx.de>
+
+commit a406b8b424fa01f244c1aab02ba186258448c36b upstream.
+
+Bail out early with error message when trying to boot a 64-bit kernel on
+32-bit machines. This fixes the previous commit to include the check for
+true 64-bit kernels as well.
+
+Signed-off-by: Helge Deller <deller@gmx.de>
+Fixes: 591d2108f3abc ("parisc: Add runtime check to prevent PA2.0 kernels on PA1.x machines")
+Cc:  <stable@vger.kernel.org> # v6.0+
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/parisc/kernel/head.S |    5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+--- a/arch/parisc/kernel/head.S
++++ b/arch/parisc/kernel/head.S
+@@ -70,9 +70,8 @@ $bss_loop:
+       stw,ma          %arg2,4(%r1)
+       stw,ma          %arg3,4(%r1)
+-#if !defined(CONFIG_64BIT) && defined(CONFIG_PA20)
+-      /* This 32-bit kernel was compiled for PA2.0 CPUs. Check current CPU
+-       * and halt kernel if we detect a PA1.x CPU. */
++#if defined(CONFIG_PA20)
++      /* check for 64-bit capable CPU as required by current kernel */
+       ldi             32,%r10
+       mtctl           %r10,%cr11
+       .level 2.0
index 9a1c35cc7b9aa18d7d40db8c593eab4bf353d702..06e99e93123da562fa9325e852f9e94930387704 100644 (file)
@@ -409,3 +409,8 @@ selftests-resctrl-remove-bw_report-and-bm_type-from-.patch
 selftests-resctrl-simplify-span-lifetime.patch
 selftests-resctrl-make-benchmark-command-const-and-b.patch
 selftests-resctrl-extend-signal-handler-coverage-to-.patch
+parisc-prevent-booting-64-bit-kernels-on-pa1.x-machines.patch
+parisc-pgtable-do-not-drop-upper-5-address-bits-of-physical-address.patch
+parisc-power-fix-power-soft-off-when-running-on-qemu.patch
+parisc-fix-mmap_base-calculation-when-stack-grows-upwards.patch
+xhci-enable-rpm-on-controllers-that-support-low-power-states.patch
diff --git a/queue-6.6/xhci-enable-rpm-on-controllers-that-support-low-power-states.patch b/queue-6.6/xhci-enable-rpm-on-controllers-that-support-low-power-states.patch
new file mode 100644 (file)
index 0000000..2a71c73
--- /dev/null
@@ -0,0 +1,37 @@
+From a5d6264b638efeca35eff72177fd28d149e0764b Mon Sep 17 00:00:00 2001
+From: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
+Date: Thu, 19 Oct 2023 13:29:20 +0300
+Subject: xhci: Enable RPM on controllers that support low-power states
+
+From: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
+
+commit a5d6264b638efeca35eff72177fd28d149e0764b upstream.
+
+Use the low-power states of the underlying platform to enable runtime PM.
+If the platform doesn't support runtime D3, then enabling default RPM will
+result in the controller malfunctioning, as in the case of hotplug devices
+not being detected because of a failed interrupt generation.
+
+Cc: Mario Limonciello <mario.limonciello@amd.com>
+Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Link: https://lore.kernel.org/r/20231019102924.2797346-16-mathias.nyman@linux.intel.com
+Cc: Oleksandr Natalenko <oleksandr@natalenko.name>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/host/xhci-pci.c |    4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/usb/host/xhci-pci.c
++++ b/drivers/usb/host/xhci-pci.c
+@@ -695,7 +695,9 @@ static int xhci_pci_probe(struct pci_dev
+       /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */
+       pm_runtime_put_noidle(&dev->dev);
+-      if (xhci->quirks & XHCI_DEFAULT_PM_RUNTIME_ALLOW)
++      if (pci_choose_state(dev, PMSG_SUSPEND) == PCI_D0)
++              pm_runtime_forbid(&dev->dev);
++      else if (xhci->quirks & XHCI_DEFAULT_PM_RUNTIME_ALLOW)
+               pm_runtime_allow(&dev->dev);
+       dma_set_max_seg_size(&dev->dev, UINT_MAX);