]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
ARM: dts: exynos: correct PMIC interrupt trigger level on Midas family
authorKrzysztof Kozlowski <krzk@kernel.org>
Thu, 10 Dec 2020 21:25:21 +0000 (22:25 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 22 May 2021 08:59:27 +0000 (10:59 +0200)
[ Upstream commit e52dcd6e70fab51f53292e53336ecb007bb60889 ]

The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: 15dfdfad2d4a ("ARM: dts: Add basic dts for Exynos4412-based Trats 2 board")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-5-krzk@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/boot/dts/exynos4412-midas.dtsi

index c6cc3d2a1121ae874c1184dd881cfee37633c6ce..60fbad25b5f26bdc33205edf52d96b233176508e 100644 (file)
        max77686: max77686_pmic@9 {
                compatible = "maxim,max77686";
                interrupt-parent = <&gpx0>;
-               interrupts = <7 IRQ_TYPE_NONE>;
+               interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
                pinctrl-0 = <&max77686_irq>;
                pinctrl-names = "default";
                reg = <0x09>;