]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
Merge branch kvm-arm64/misc-6.18 into kvmarm-master/next
authorMarc Zyngier <maz@kernel.org>
Sat, 20 Sep 2025 11:26:29 +0000 (12:26 +0100)
committerMarc Zyngier <maz@kernel.org>
Sat, 20 Sep 2025 11:26:29 +0000 (12:26 +0100)
* kvm-arm64/misc-6.18:
  : .
  : .
  : Misc improvements and bug fixes:
  :
  : - Fix XN handling in the S2 page table dumper
  :   (20250809135356.1003520-1-r09922117@csie.ntu.edu.tw)
  :
  : - Fix sanitity checks for huge mapping with pKVM running np guests
  :   (20250815162655.121108-1-ben.horgan@arm.com)
  :
  : - Fix use of TRBE when KVM is disabled, and Linux running under
  :   a lesser hypervisor (20250902-etm_crash-v2-1-aa9713a7306b@oss.qualcomm.com)
  :
  : - Fix out of date MTE-related comments (20250915155234.196288-1-alexandru.elisei@arm.com)
  :
  : - Fix PSCI BE support when running a NV guest (20250916161103.1040727-1-maz@kernel.org)
  :
  : - Fix page reference leak when refusing to map a page due to mismatched attributes
  :   (20250917130737.2139403-1-tabba@google.com)
  :
  : - Add trap handling for PMSDSFR_EL1
  :   (20250901-james-perf-feat_spe_eft-v8-7-2e2738f24559@linaro.org)
  :
  : - Add advertisement from FEAT_LSFE (Large System Float Extension)
  :   (20250918-arm64-lsfe-v4-1-0abc712101c7@kernel.org)
  : .
  KVM: arm64: Expose FEAT_LSFE to guests
  KVM: arm64: Add trap configs for PMSDSFR_EL1
  KVM: arm64: Fix page leak in user_mem_abort()
  KVM: arm64: Fix kvm_vcpu_{set,is}_be() to deal with EL2 state
  KVM: arm64: Update stale comment for sanitise_mte_tags()
  KVM: arm64: Return early from trace helpers when KVM isn't available
  KVM: arm64: Fix debug checking for np-guests using huge mappings
  KVM: arm64: ptdump: Don't test PTE_VALID alongside other attributes

Signed-off-by: Marc Zyngier <maz@kernel.org>
1  2 
arch/arm64/include/asm/kvm_emulate.h
arch/arm64/kvm/debug.c
arch/arm64/kvm/emulate-nested.c
arch/arm64/kvm/mmu.c
arch/arm64/kvm/sys_regs.c

Simple merge
Simple merge
Simple merge
Simple merge
index 4bb877e4280f360802daa204463313ab92c7dd3e,1099b815cd61c9dabab2b047fdc97ff70b91855b..91053aa832d081bb6df63036ad01465dccef49bf
@@@ -1750,14 -1635,15 +1750,15 @@@ static u64 __kvm_read_sanitised_id_reg(
                break;
        case SYS_ID_AA64ISAR2_EL1:
                if (!vcpu_has_ptrauth(vcpu))
 -                      val &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_APA3) |
 -                               ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_GPA3));
 +                      val &= ~(ID_AA64ISAR2_EL1_APA3 |
 +                               ID_AA64ISAR2_EL1_GPA3);
                if (!cpus_have_final_cap(ARM64_HAS_WFXT) ||
                    has_broken_cntvoff())
 -                      val &= ~ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_WFxT);
 +                      val &= ~ID_AA64ISAR2_EL1_WFxT;
                break;
        case SYS_ID_AA64ISAR3_EL1:
-               val &= ID_AA64ISAR3_EL1_FPRCVT | ID_AA64ISAR3_EL1_FAMINMAX;
+               val &= ID_AA64ISAR3_EL1_FPRCVT | ID_AA64ISAR3_EL1_LSFE |
+                       ID_AA64ISAR3_EL1_FAMINMAX;
                break;
        case SYS_ID_AA64MMFR2_EL1:
                val &= ~ID_AA64MMFR2_EL1_CCIDX_MASK;