--- /dev/null
+From 45d65c0f09aaa6cdd21fe0743f317d4bbdfd1466 Mon Sep 17 00:00:00 2001
+From: "Liu, Zhan" <Zhan.Liu@amd.com>
+Date: Thu, 9 Sep 2021 13:26:37 -0400
+Subject: drm/amd/display: Fix B0 USB-C DP Alt mode
+
+From: Liu, Zhan <Zhan.Liu@amd.com>
+
+commit 45d65c0f09aaa6cdd21fe0743f317d4bbdfd1466 upstream.
+
+[Why]
+Starting from B0, along with RDPCSTX, RDPCSPIPE registers are also used.
+
+[How]
+Make sure RDPCSPIPE registers are programmed correctly.
+
+Reviewed-by: Charlene Liu <charlene.liu@amd.com>
+Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
+Signed-off-by: Zhan Liu <Zhan.Liu@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+(cherry picked from commit bdd1a21b52557ea8f61d0a5dc2f77151b576eb70)
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h | 1
+ drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c | 33 +++++++++-
+ drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h | 11 +++
+ drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_0_offset.h | 27 ++++++++
+ 4 files changed, 70 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h
+@@ -118,6 +118,7 @@ struct dcn10_link_enc_registers {
+ uint32_t RDPCSTX_PHY_CNTL4;
+ uint32_t RDPCSTX_PHY_CNTL5;
+ uint32_t RDPCSTX_PHY_CNTL6;
++ uint32_t RDPCSPIPE_PHY_CNTL6;
+ uint32_t RDPCSTX_PHY_CNTL7;
+ uint32_t RDPCSTX_PHY_CNTL8;
+ uint32_t RDPCSTX_PHY_CNTL9;
+--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
+@@ -37,6 +37,7 @@
+
+ #include "link_enc_cfg.h"
+ #include "dc_dmub_srv.h"
++#include "dal_asic_id.h"
+
+ #define CTX \
+ enc10->base.ctx
+@@ -215,7 +216,7 @@ static const struct link_encoder_funcs d
+ .fec_is_active = enc2_fec_is_active,
+ .get_dig_frontend = dcn10_get_dig_frontend,
+ .get_dig_mode = dcn10_get_dig_mode,
+- .is_in_alt_mode = dcn20_link_encoder_is_in_alt_mode,
++ .is_in_alt_mode = dcn31_link_encoder_is_in_alt_mode,
+ .get_max_link_cap = dcn20_link_encoder_get_max_link_cap,
+ .set_dio_phy_mux = dcn31_link_encoder_set_dio_phy_mux,
+ };
+@@ -404,3 +405,33 @@ void dcn31_link_encoder_disable_output(
+ }
+ }
+
++bool dcn31_link_encoder_is_in_alt_mode(struct link_encoder *enc)
++{
++ struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
++ uint32_t dp_alt_mode_disable;
++ bool is_usb_c_alt_mode = false;
++
++ if (enc->features.flags.bits.DP_IS_USB_C) {
++ if (enc->ctx->asic_id.hw_internal_rev != YELLOW_CARP_B0) {
++ // [Note] no need to check hw_internal_rev once phy mux selection is ready
++ REG_GET(RDPCSTX_PHY_CNTL6, RDPCS_PHY_DPALT_DISABLE, &dp_alt_mode_disable);
++ } else {
++ /*
++ * B0 phys use a new set of registers to check whether alt mode is disabled.
++ * if value == 1 alt mode is disabled, otherwise it is enabled.
++ */
++ if ((enc10->base.transmitter == TRANSMITTER_UNIPHY_A)
++ || (enc10->base.transmitter == TRANSMITTER_UNIPHY_B)
++ || (enc10->base.transmitter == TRANSMITTER_UNIPHY_E)) {
++ REG_GET(RDPCSTX_PHY_CNTL6, RDPCS_PHY_DPALT_DISABLE, &dp_alt_mode_disable);
++ } else {
++ // [Note] need to change TRANSMITTER_UNIPHY_C/D to F/G once phy mux selection is ready
++ REG_GET(RDPCSPIPE_PHY_CNTL6, RDPCS_PHY_DPALT_DISABLE, &dp_alt_mode_disable);
++ }
++ }
++
++ is_usb_c_alt_mode = (dp_alt_mode_disable == 0);
++ }
++
++ return is_usb_c_alt_mode;
++}
+--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h
++++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h
+@@ -69,6 +69,7 @@
+ SRI(RDPCSTX_PHY_CNTL4, RDPCSTX, id), \
+ SRI(RDPCSTX_PHY_CNTL5, RDPCSTX, id), \
+ SRI(RDPCSTX_PHY_CNTL6, RDPCSTX, id), \
++ SRI(RDPCSPIPE_PHY_CNTL6, RDPCSPIPE, id), \
+ SRI(RDPCSTX_PHY_CNTL7, RDPCSTX, id), \
+ SRI(RDPCSTX_PHY_CNTL8, RDPCSTX, id), \
+ SRI(RDPCSTX_PHY_CNTL9, RDPCSTX, id), \
+@@ -115,7 +116,9 @@
+ LE_SF(RDPCSTX0_RDPCSTX_PHY_CNTL6, RDPCS_PHY_DP_TX2_MPLL_EN, mask_sh),\
+ LE_SF(RDPCSTX0_RDPCSTX_PHY_CNTL6, RDPCS_PHY_DP_TX3_MPLL_EN, mask_sh),\
+ LE_SF(RDPCSTX0_RDPCSTX_PHY_CNTL6, RDPCS_PHY_DPALT_DP4, mask_sh),\
+- LE_SF(RDPCSTX0_RDPCSTX_PHY_CNTL6, RDPCS_PHY_DPALT_DISABLE, mask_sh),\
++ LE_SF(RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6, RDPCS_PHY_DPALT_DP4, mask_sh),\
++ LE_SF(RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6, RDPCS_PHY_DPALT_DISABLE, mask_sh),\
++ LE_SF(RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6, RDPCS_PHY_DPALT_DISABLE_ACK, mask_sh),\
+ LE_SF(RDPCSTX0_RDPCSTX_PHY_CNTL7, RDPCS_PHY_DP_MPLLB_FRACN_QUOT, mask_sh),\
+ LE_SF(RDPCSTX0_RDPCSTX_PHY_CNTL7, RDPCS_PHY_DP_MPLLB_FRACN_DEN, mask_sh),\
+ LE_SF(RDPCSTX0_RDPCSTX_PHY_CNTL8, RDPCS_PHY_DP_MPLLB_SSC_PEAK, mask_sh),\
+@@ -243,4 +246,10 @@ void dcn31_link_encoder_disable_output(
+ struct link_encoder *enc,
+ enum signal_type signal);
+
++/*
++ * Check whether USB-C DP Alt mode is disabled
++ */
++bool dcn31_link_encoder_is_in_alt_mode(
++ struct link_encoder *enc);
++
+ #endif /* __DC_LINK_ENCODER__DCN31_H__ */
+--- a/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_0_offset.h
++++ b/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_0_offset.h
+@@ -11932,5 +11932,32 @@
+ #define ixDPCSSYS_CR4_RAWLANEX_DIG_PCS_XF_RX_OVRD_OUT_2 0xe0c7
+ #define ixDPCSSYS_CR4_RAWLANEX_DIG_PCS_XF_TX_OVRD_IN_2 0xe0c8
+
++//RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6
++#define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4__SHIFT 0x10
++#define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DISABLE__SHIFT 0x11
++#define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DISABLE_ACK__SHIFT 0x12
++#define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4_MASK 0x00010000L
++#define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DISABLE_MASK 0x00020000L
++#define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DISABLE_ACK_MASK 0x00040000L
++
++//RDPCSPIPE1_RDPCSPIPE_PHY_CNTL6
++#define RDPCSPIPE1_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4__SHIFT 0x10
++#define RDPCSPIPE1_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DISABLE__SHIFT 0x11
++#define RDPCSPIPE1_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DISABLE_ACK__SHIFT 0x12
++#define RDPCSPIPE1_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4_MASK 0x00010000L
++#define RDPCSPIPE1_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DISABLE_MASK 0x00020000L
++#define RDPCSPIPE1_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DISABLE_ACK_MASK 0x00040000L
++
++//[Note] Hack. RDPCSPIPE only has 2 instances.
++#define regRDPCSPIPE0_RDPCSPIPE_PHY_CNTL6 0x2d73
++#define regRDPCSPIPE0_RDPCSPIPE_PHY_CNTL6_BASE_IDX 2
++#define regRDPCSPIPE1_RDPCSPIPE_PHY_CNTL6 0x2e4b
++#define regRDPCSPIPE1_RDPCSPIPE_PHY_CNTL6_BASE_IDX 2
++#define regRDPCSPIPE2_RDPCSPIPE_PHY_CNTL6 0x2d73
++#define regRDPCSPIPE2_RDPCSPIPE_PHY_CNTL6_BASE_IDX 2
++#define regRDPCSPIPE3_RDPCSPIPE_PHY_CNTL6 0x2e4b
++#define regRDPCSPIPE3_RDPCSPIPE_PHY_CNTL6_BASE_IDX 2
++#define regRDPCSPIPE4_RDPCSPIPE_PHY_CNTL6 0x2d73
++#define regRDPCSPIPE4_RDPCSPIPE_PHY_CNTL6_BASE_IDX 2
+
+ #endif
--- /dev/null
+From 2fe9a0e1173f4805669e7af34ea25af835274426 Mon Sep 17 00:00:00 2001
+From: "Liu, Zhan" <Zhan.Liu@amd.com>
+Date: Thu, 2 Sep 2021 15:08:29 -0400
+Subject: drm/amd/display: Fix DCN3 B0 DP Alt Mapping
+
+From: Liu, Zhan <Zhan.Liu@amd.com>
+
+commit 2fe9a0e1173f4805669e7af34ea25af835274426 upstream.
+
+[Why]
+DCN3 B0 has a mux, which redirects PHYC and PHYD to PHYF and PHYG.
+
+[How]
+Fix DIG mapping.
+
+Reviewed-by: Charlene Liu <charlene.liu@amd.com>
+Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
+Signed-off-by: Zhan Liu <Zhan.Liu@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+(cherry picked from commit 4b7786d87fb3adf3e534c4f1e4f824d8700b786b)
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
+@@ -1284,6 +1284,12 @@ static struct stream_encoder *dcn31_stre
+ if (!enc1 || !vpg || !afmt)
+ return NULL;
+
++ if (ctx->asic_id.chip_family == FAMILY_YELLOW_CARP &&
++ ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) {
++ if ((eng_id == ENGINE_ID_DIGC) || (eng_id == ENGINE_ID_DIGD))
++ eng_id = eng_id + 3; // For B0 only. C->F, D->G.
++ }
++
+ dcn30_dio_stream_encoder_construct(enc1, ctx, ctx->dc_bios,
+ eng_id, vpg, afmt,
+ &stream_enc_regs[eng_id],
--- /dev/null
+From 5a1fef027846e7635b9d320b2cc0b416fd11a3be Mon Sep 17 00:00:00 2001
+From: Hansen <Hansen.Dsouza@amd.com>
+Date: Fri, 1 Oct 2021 22:36:15 +0800
+Subject: drm/amd/display: Fix detection of 4 lane for DPALT
+
+From: Hansen <Hansen.Dsouza@amd.com>
+
+commit 5a1fef027846e7635b9d320b2cc0b416fd11a3be upstream.
+
+[Why]
+DPALT detection for B0 PHY has its own set of RDPCSPIPE registers
+
+[How]
+Use RDPCSPIPE registers to detect if DPALT lane is 4 lane
+
+Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
+Acked-by: Solomon Chiu <solomon.chiu@amd.com>
+Signed-off-by: Hansen <Hansen.Dsouza@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c | 33 +++++++++-
+ drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h | 3
+ 2 files changed, 35 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
+@@ -63,6 +63,10 @@
+ #define AUX_REG_WRITE(reg_name, val) \
+ dm_write_reg(CTX, AUX_REG(reg_name), val)
+
++#ifndef MIN
++#define MIN(X, Y) ((X) < (Y) ? (X) : (Y))
++#endif
++
+ void dcn31_link_encoder_set_dio_phy_mux(
+ struct link_encoder *enc,
+ enum encoder_type_select sel,
+@@ -217,7 +221,7 @@ static const struct link_encoder_funcs d
+ .get_dig_frontend = dcn10_get_dig_frontend,
+ .get_dig_mode = dcn10_get_dig_mode,
+ .is_in_alt_mode = dcn31_link_encoder_is_in_alt_mode,
+- .get_max_link_cap = dcn20_link_encoder_get_max_link_cap,
++ .get_max_link_cap = dcn31_link_encoder_get_max_link_cap,
+ .set_dio_phy_mux = dcn31_link_encoder_set_dio_phy_mux,
+ };
+
+@@ -435,3 +439,30 @@ bool dcn31_link_encoder_is_in_alt_mode(s
+
+ return is_usb_c_alt_mode;
+ }
++
++void dcn31_link_encoder_get_max_link_cap(struct link_encoder *enc,
++ struct dc_link_settings *link_settings)
++{
++ struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
++ uint32_t is_in_usb_c_dp4_mode = 0;
++
++ dcn10_link_encoder_get_max_link_cap(enc, link_settings);
++
++ /* in usb c dp2 mode, max lane count is 2 */
++ if (enc->funcs->is_in_alt_mode && enc->funcs->is_in_alt_mode(enc)) {
++ if (enc->ctx->asic_id.hw_internal_rev != YELLOW_CARP_B0) {
++ // [Note] no need to check hw_internal_rev once phy mux selection is ready
++ REG_GET(RDPCSTX_PHY_CNTL6, RDPCS_PHY_DPALT_DP4, &is_in_usb_c_dp4_mode);
++ } else {
++ if ((enc10->base.transmitter == TRANSMITTER_UNIPHY_A)
++ || (enc10->base.transmitter == TRANSMITTER_UNIPHY_B)
++ || (enc10->base.transmitter == TRANSMITTER_UNIPHY_E)) {
++ REG_GET(RDPCSTX_PHY_CNTL6, RDPCS_PHY_DPALT_DP4, &is_in_usb_c_dp4_mode);
++ } else {
++ REG_GET(RDPCSPIPE_PHY_CNTL6, RDPCS_PHY_DPALT_DP4, &is_in_usb_c_dp4_mode);
++ }
++ }
++ if (!is_in_usb_c_dp4_mode)
++ link_settings->lane_count = MIN(LANE_COUNT_TWO, link_settings->lane_count);
++ }
++}
+--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h
++++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h
+@@ -252,4 +252,7 @@ void dcn31_link_encoder_disable_output(
+ bool dcn31_link_encoder_is_in_alt_mode(
+ struct link_encoder *enc);
+
++void dcn31_link_encoder_get_max_link_cap(struct link_encoder *enc,
++ struct dc_link_settings *link_settings);
++
+ #endif /* __DC_LINK_ENCODER__DCN31_H__ */
--- /dev/null
+From a7e397b7c45377e20542146be10231b8afa948d1 Mon Sep 17 00:00:00 2001
+From: Nikola Cornij <nikola.cornij@amd.com>
+Date: Fri, 1 Oct 2021 22:36:14 +0800
+Subject: drm/amd/display: Limit display scaling to up to 4k for DCN 3.1
+
+From: Nikola Cornij <nikola.cornij@amd.com>
+
+commit a7e397b7c45377e20542146be10231b8afa948d1 upstream.
+
+[why]
+The existing limit was mistakenly bigger than 4k for DCN 3.1
+
+Reviewed-by: Zhan Liu <Zhan.Liu@amd.com>
+Acked-by: Solomon Chiu <solomon.chiu@amd.com>
+Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
+@@ -928,7 +928,7 @@ static const struct dc_debug_options deb
+ .disable_dcc = DCC_ENABLE,
+ .vsr_support = true,
+ .performance_trace = false,
+- .max_downscale_src_width = 7680,/*upto 8K*/
++ .max_downscale_src_width = 3840,/*upto 4K*/
+ .disable_pplib_wm_range = false,
+ .scl_reset_length10 = true,
+ .sanity_checks = false,
--- /dev/null
+From 7ab0965079bbc0e39fe0e1df4dcdf931c9d25372 Mon Sep 17 00:00:00 2001
+From: Jude Shih <shenshih@amd.com>
+Date: Mon, 4 Oct 2021 22:40:50 +0800
+Subject: drm/amd/display: USB4 bring up set correct address
+
+From: Jude Shih <shenshih@amd.com>
+
+commit 7ab0965079bbc0e39fe0e1df4dcdf931c9d25372 upstream.
+
+[Why]
+YELLOW_CARP_B0 address was not correct
+
+[How]
+Set YELLOW_CARP_B0 to 0x1A.
+
+Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
+Acked-by: Wayne Lin <Wayne.Lin@amd.com>
+Signed-off-by: Jude Shih <shenshih@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/include/dal_asic_id.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h
++++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
+@@ -227,7 +227,7 @@ enum {
+ #define FAMILY_YELLOW_CARP 146
+
+ #define YELLOW_CARP_A0 0x01
+-#define YELLOW_CARP_B0 0x02 // TODO: DCN31 - update with correct B0 ID
++#define YELLOW_CARP_B0 0x1A
+ #define YELLOW_CARP_UNKNOWN 0xFF
+
+ #ifndef ASICREV_IS_YELLOW_CARP
--- /dev/null
+From 1d617c029fd9c960f8ba7a8d1a10699d820bd6b9 Mon Sep 17 00:00:00 2001
+From: Lijo Lazar <lijo.lazar@amd.com>
+Date: Fri, 1 Oct 2021 16:49:07 +0800
+Subject: drm/amdgpu: During s0ix don't wait to signal GFXOFF
+
+From: Lijo Lazar <lijo.lazar@amd.com>
+
+commit 1d617c029fd9c960f8ba7a8d1a10699d820bd6b9 upstream.
+
+In the rare event when GFX IP suspend coincides with a s0ix entry, don't
+schedule a delayed work, instead signal PMFW immediately to allow GFXOFF
+entry. GFXOFF is a prerequisite for s0ix entry. PMFW needs to be
+signaled about GFXOFF status before amd-pmc module passes OS HINT
+to PMFW telling that everything is ready for a safe s0ix entry.
+
+Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1712
+
+Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Mario Limonciello <mario.limonciell@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 14 ++++++++++++--
+ 1 file changed, 12 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+@@ -31,6 +31,8 @@
+ /* delay 0.1 second to enable gfx off feature */
+ #define GFX_OFF_DELAY_ENABLE msecs_to_jiffies(100)
+
++#define GFX_OFF_NO_DELAY 0
++
+ /*
+ * GPU GFX IP block helpers function.
+ */
+@@ -558,6 +560,8 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_
+
+ void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable)
+ {
++ unsigned long delay = GFX_OFF_DELAY_ENABLE;
++
+ if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
+ return;
+
+@@ -573,8 +577,14 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_d
+
+ adev->gfx.gfx_off_req_count--;
+
+- if (adev->gfx.gfx_off_req_count == 0 && !adev->gfx.gfx_off_state)
+- schedule_delayed_work(&adev->gfx.gfx_off_delay_work, GFX_OFF_DELAY_ENABLE);
++ if (adev->gfx.gfx_off_req_count == 0 &&
++ !adev->gfx.gfx_off_state) {
++ /* If going to s2idle, no need to wait */
++ if (adev->in_s0ix)
++ delay = GFX_OFF_NO_DELAY;
++ schedule_delayed_work(&adev->gfx.gfx_off_delay_work,
++ delay);
++ }
+ } else {
+ if (adev->gfx.gfx_off_req_count == 0) {
+ cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work);
--- /dev/null
+From b2d73debfdc16b742e64948dc4461876af3f8c10 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
+Date: Thu, 30 Sep 2021 22:09:42 +0300
+Subject: drm/i915: Extend the async flip VT-d w/a to skl/bxt
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Ville Syrjälä <ville.syrjala@linux.intel.com>
+
+commit b2d73debfdc16b742e64948dc4461876af3f8c10 upstream.
+
+Looks like skl/bxt/derivatives also need the plane stride
+stretch w/a when using async flips and VT-d is enabled, or
+else we get corruption on screen. To my surprise this was
+even documented in bspec, but only as a note on the
+CHICHKEN_PIPESL register description rather than on the
+w/a list.
+
+So very much the same thing as on HSW/BDW, except the bits
+moved yet again.
+
+Cc: stable@vger.kernel.org
+Cc: Karthik B S <karthik.b.s@intel.com>
+Fixes: 55ea1cb178ef ("drm/i915: Enable async flips in i915")
+Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210930190943.17547-1-ville.syrjala@linux.intel.com
+Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
+(cherry picked from commit d08df3b0bdb25546e86dc9a6c4e3ec0c43832299)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/i915/i915_reg.h | 5 +++++
+ drivers/gpu/drm/i915/intel_pm.c | 12 ++++++++++++
+ 2 files changed, 17 insertions(+)
+
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -8150,6 +8150,11 @@ enum {
+ #define HSW_SPR_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 3)
+ #define HSW_FBCQ_DIS (1 << 22)
+ #define BDW_DPRS_MASK_VBLANK_SRD (1 << 0)
++#define SKL_PLANE1_STRETCH_MAX_MASK REG_GENMASK(1, 0)
++#define SKL_PLANE1_STRETCH_MAX_X8 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 0)
++#define SKL_PLANE1_STRETCH_MAX_X4 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 1)
++#define SKL_PLANE1_STRETCH_MAX_X2 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 2)
++#define SKL_PLANE1_STRETCH_MAX_X1 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 3)
+ #define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
+
+ #define _CHICKEN_TRANS_A 0x420c0
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -76,6 +76,8 @@ struct intel_wm_config {
+
+ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
+ {
++ enum pipe pipe;
++
+ if (HAS_LLC(dev_priv)) {
+ /*
+ * WaCompressedResourceDisplayNewHashMode:skl,kbl
+@@ -89,6 +91,16 @@ static void gen9_init_clock_gating(struc
+ SKL_DE_COMPRESSED_HASH_MODE);
+ }
+
++ for_each_pipe(dev_priv, pipe) {
++ /*
++ * "Plane N strech max must be programmed to 11b (x1)
++ * when Async flips are enabled on that plane."
++ */
++ if (!IS_GEMINILAKE(dev_priv) && intel_vtd_active())
++ intel_uncore_rmw(&dev_priv->uncore, CHICKEN_PIPESL_1(pipe),
++ SKL_PLANE1_STRETCH_MAX_MASK, SKL_PLANE1_STRETCH_MAX_X1);
++ }
++
+ /* See Bspec note for PSR2_CTL bit 31, Wa#828:skl,bxt,kbl,cfl */
+ intel_uncore_write(&dev_priv->uncore, CHICKEN_PAR1_1,
+ intel_uncore_read(&dev_priv->uncore, CHICKEN_PAR1_1) | SKL_EDP_PSR_FIX_RDWRAP);
--- /dev/null
+From 0c94777386495d6e0a9735d48ffd2abb8d680d7f Mon Sep 17 00:00:00 2001
+From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Date: Wed, 28 Jul 2021 14:41:31 +0200
+Subject: drm/i915: Fix runtime pm handling in i915_gem_shrink
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+
+commit 0c94777386495d6e0a9735d48ffd2abb8d680d7f upstream.
+
+We forgot to call intel_runtime_pm_put on error, fix it!
+
+Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Fixes: cf41a8f1dc1e ("drm/i915: Finally remove obj->mm.lock.")
+Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
+Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
+Cc: <stable@vger.kernel.org> # v5.13+
+Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
+Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210830121006.2978297-9-maarten.lankhorst@linux.intel.com
+(cherry picked from commit 239f3c2ee18376587026efecaea5250fa5926d20)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
++++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+@@ -118,7 +118,7 @@ i915_gem_shrink(struct i915_gem_ww_ctx *
+ intel_wakeref_t wakeref = 0;
+ unsigned long count = 0;
+ unsigned long scanned = 0;
+- int err;
++ int err = 0;
+
+ /* CHV + VTD workaround use stop_machine(); need to trylock vm->mutex */
+ bool trylock_vm = !ww && intel_vm_no_concurrent_access_wa(i915);
+@@ -242,12 +242,15 @@ skip:
+ list_splice_tail(&still_in_list, phase->list);
+ spin_unlock_irqrestore(&i915->mm.obj_lock, flags);
+ if (err)
+- return err;
++ break;
+ }
+
+ if (shrink & I915_SHRINK_BOUND)
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+
++ if (err)
++ return err;
++
+ if (nr_scanned)
+ *nr_scanned += scanned;
+ return count;
--- /dev/null
+From 49b2dfc081826874705b27f7970631319628ee7f Mon Sep 17 00:00:00 2001
+From: Ben Skeggs <bskeggs@redhat.com>
+Date: Fri, 17 Sep 2021 08:04:06 +1000
+Subject: drm/nouveau/ga102-: support ttm buffer moves via copy engine
+
+From: Ben Skeggs <bskeggs@redhat.com>
+
+commit 49b2dfc081826874705b27f7970631319628ee7f upstream.
+
+We don't currently have any kind of real acceleration on Ampere GPUs,
+but the TTM memcpy() fallback paths aren't really designed to handle
+copies between different devices, such as on Optimus systems, and
+result in a kernel OOPS.
+
+A few options were investigated to try and fix this, but didn't work
+out, and likely would have resulted in a very unpleasant experience
+for users anyway.
+
+This commit adds just enough support for setting up a single channel
+connected to a copy engine, which the kernel can use to accelerate
+the buffer copies between devices. Userspace has no access to this
+incomplete channel support, but it's suitable for TTM's needs.
+
+A more complete implementation of host(fifo) for Ampere GPUs is in
+the works, but the required changes are far too invasive that they
+would be unsuitable to backport to fix this issue on current kernels.
+
+v2: fix GPFIFO length in RAMFC (reported by Karol)
+
+Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
+Cc: Lyude Paul <lyude@redhat.com>
+Cc: Karol Herbst <kherbst@redhat.com>
+Cc: <stable@vger.kernel.org> # v5.12+
+Reviewed-by: Karol Herbst <kherbst@redhat.com>
+Tested-by: Karol Herbst <kherbst@redhat.com>
+Signed-off-by: Karol Herbst <kherbst@redhat.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210916220406.666454-1-skeggsb@gmail.com
+Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/nouveau/include/nvif/class.h | 2
+ drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h | 1
+ drivers/gpu/drm/nouveau/nouveau_bo.c | 1
+ drivers/gpu/drm/nouveau/nouveau_chan.c | 6
+ drivers/gpu/drm/nouveau/nouveau_drm.c | 4
+ drivers/gpu/drm/nouveau/nv84_fence.c | 2
+ drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 3
+ drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild | 1
+ drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga102.c | 308 +++++++++++++++++++++
+ drivers/gpu/drm/nouveau/nvkm/subdev/top/ga100.c | 7
+ 10 files changed, 329 insertions(+), 6 deletions(-)
+ create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga102.c
+
+--- a/drivers/gpu/drm/nouveau/include/nvif/class.h
++++ b/drivers/gpu/drm/nouveau/include/nvif/class.h
+@@ -71,6 +71,7 @@
+ #define PASCAL_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000c06f
+ #define VOLTA_CHANNEL_GPFIFO_A /* clc36f.h */ 0x0000c36f
+ #define TURING_CHANNEL_GPFIFO_A /* clc36f.h */ 0x0000c46f
++#define AMPERE_CHANNEL_GPFIFO_B /* clc36f.h */ 0x0000c76f
+
+ #define NV50_DISP /* cl5070.h */ 0x00005070
+ #define G82_DISP /* cl5070.h */ 0x00008270
+@@ -200,6 +201,7 @@
+ #define PASCAL_DMA_COPY_B 0x0000c1b5
+ #define VOLTA_DMA_COPY_A 0x0000c3b5
+ #define TURING_DMA_COPY_A 0x0000c5b5
++#define AMPERE_DMA_COPY_B 0x0000c7b5
+
+ #define FERMI_DECOMPRESS 0x000090b8
+
+--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
++++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
+@@ -77,4 +77,5 @@ int gp100_fifo_new(struct nvkm_device *,
+ int gp10b_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+ int gv100_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+ int tu102_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
++int ga102_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+ #endif
+--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
++++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
+@@ -844,6 +844,7 @@ nouveau_bo_move_init(struct nouveau_drm
+ struct ttm_resource *, struct ttm_resource *);
+ int (*init)(struct nouveau_channel *, u32 handle);
+ } _methods[] = {
++ { "COPY", 4, 0xc7b5, nve0_bo_move_copy, nve0_bo_move_init },
+ { "COPY", 4, 0xc5b5, nve0_bo_move_copy, nve0_bo_move_init },
+ { "GRCE", 0, 0xc5b5, nve0_bo_move_copy, nvc0_bo_move_init },
+ { "COPY", 4, 0xc3b5, nve0_bo_move_copy, nve0_bo_move_init },
+--- a/drivers/gpu/drm/nouveau/nouveau_chan.c
++++ b/drivers/gpu/drm/nouveau/nouveau_chan.c
+@@ -250,7 +250,8 @@ static int
+ nouveau_channel_ind(struct nouveau_drm *drm, struct nvif_device *device,
+ u64 runlist, bool priv, struct nouveau_channel **pchan)
+ {
+- static const u16 oclasses[] = { TURING_CHANNEL_GPFIFO_A,
++ static const u16 oclasses[] = { AMPERE_CHANNEL_GPFIFO_B,
++ TURING_CHANNEL_GPFIFO_A,
+ VOLTA_CHANNEL_GPFIFO_A,
+ PASCAL_CHANNEL_GPFIFO_A,
+ MAXWELL_CHANNEL_GPFIFO_A,
+@@ -386,7 +387,8 @@ nouveau_channel_init(struct nouveau_chan
+
+ nvif_object_map(&chan->user, NULL, 0);
+
+- if (chan->user.oclass >= FERMI_CHANNEL_GPFIFO) {
++ if (chan->user.oclass >= FERMI_CHANNEL_GPFIFO &&
++ chan->user.oclass < AMPERE_CHANNEL_GPFIFO_B) {
+ ret = nvif_notify_ctor(&chan->user, "abi16ChanKilled",
+ nouveau_channel_killed,
+ true, NV906F_V0_NTFY_KILLED,
+--- a/drivers/gpu/drm/nouveau/nouveau_drm.c
++++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
+@@ -345,6 +345,9 @@ nouveau_accel_gr_init(struct nouveau_drm
+ u32 arg0, arg1;
+ int ret;
+
++ if (device->info.family >= NV_DEVICE_INFO_V0_AMPERE)
++ return;
++
+ /* Allocate channel that has access to the graphics engine. */
+ if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
+ arg0 = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR);
+@@ -469,6 +472,7 @@ nouveau_accel_init(struct nouveau_drm *d
+ case PASCAL_CHANNEL_GPFIFO_A:
+ case VOLTA_CHANNEL_GPFIFO_A:
+ case TURING_CHANNEL_GPFIFO_A:
++ case AMPERE_CHANNEL_GPFIFO_B:
+ ret = nvc0_fence_create(drm);
+ break;
+ default:
+--- a/drivers/gpu/drm/nouveau/nv84_fence.c
++++ b/drivers/gpu/drm/nouveau/nv84_fence.c
+@@ -204,7 +204,7 @@ nv84_fence_create(struct nouveau_drm *dr
+ priv->base.context_new = nv84_fence_context_new;
+ priv->base.context_del = nv84_fence_context_del;
+
+- priv->base.uevent = true;
++ priv->base.uevent = drm->client.device.info.family < NV_DEVICE_INFO_V0_AMPERE;
+
+ mutex_init(&priv->mutex);
+
+--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
++++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+@@ -2602,6 +2602,7 @@ nv172_chipset = {
+ .top = { 0x00000001, ga100_top_new },
+ .disp = { 0x00000001, ga102_disp_new },
+ .dma = { 0x00000001, gv100_dma_new },
++ .fifo = { 0x00000001, ga102_fifo_new },
+ };
+
+ static const struct nvkm_device_chip
+@@ -2622,6 +2623,7 @@ nv174_chipset = {
+ .top = { 0x00000001, ga100_top_new },
+ .disp = { 0x00000001, ga102_disp_new },
+ .dma = { 0x00000001, gv100_dma_new },
++ .fifo = { 0x00000001, ga102_fifo_new },
+ };
+
+ static const struct nvkm_device_chip
+@@ -2642,6 +2644,7 @@ nv177_chipset = {
+ .top = { 0x00000001, ga100_top_new },
+ .disp = { 0x00000001, ga102_disp_new },
+ .dma = { 0x00000001, gv100_dma_new },
++ .fifo = { 0x00000001, ga102_fifo_new },
+ };
+
+ static int
+--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild
++++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild
+@@ -18,6 +18,7 @@ nvkm-y += nvkm/engine/fifo/gp100.o
+ nvkm-y += nvkm/engine/fifo/gp10b.o
+ nvkm-y += nvkm/engine/fifo/gv100.o
+ nvkm-y += nvkm/engine/fifo/tu102.o
++nvkm-y += nvkm/engine/fifo/ga102.o
+
+ nvkm-y += nvkm/engine/fifo/chan.o
+ nvkm-y += nvkm/engine/fifo/channv50.o
+--- /dev/null
++++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga102.c
+@@ -0,0 +1,308 @@
++/*
++ * Copyright 2021 Red Hat Inc.
++ *
++ * Permission is hereby granted, free of charge, to any person obtaining a
++ * copy of this software and associated documentation files (the "Software"),
++ * to deal in the Software without restriction, including without limitation
++ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
++ * and/or sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following conditions:
++ *
++ * The above copyright notice and this permission notice shall be included in
++ * all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ */
++#define ga102_fifo(p) container_of((p), struct ga102_fifo, base.engine)
++#define ga102_chan(p) container_of((p), struct ga102_chan, object)
++#include <engine/fifo.h>
++#include "user.h"
++
++#include <core/memory.h>
++#include <subdev/mmu.h>
++#include <subdev/timer.h>
++#include <subdev/top.h>
++
++#include <nvif/cl0080.h>
++#include <nvif/clc36f.h>
++#include <nvif/class.h>
++
++struct ga102_fifo {
++ struct nvkm_fifo base;
++};
++
++struct ga102_chan {
++ struct nvkm_object object;
++
++ struct {
++ u32 runl;
++ u32 chan;
++ } ctrl;
++
++ struct nvkm_memory *mthd;
++ struct nvkm_memory *inst;
++ struct nvkm_memory *user;
++ struct nvkm_memory *runl;
++
++ struct nvkm_vmm *vmm;
++};
++
++static int
++ga102_chan_sclass(struct nvkm_object *object, int index, struct nvkm_oclass *oclass)
++{
++ if (index == 0) {
++ oclass->ctor = nvkm_object_new;
++ oclass->base = (struct nvkm_sclass) { -1, -1, AMPERE_DMA_COPY_B };
++ return 0;
++ }
++
++ return -EINVAL;
++}
++
++static int
++ga102_chan_map(struct nvkm_object *object, void *argv, u32 argc,
++ enum nvkm_object_map *type, u64 *addr, u64 *size)
++{
++ struct ga102_chan *chan = ga102_chan(object);
++ struct nvkm_device *device = chan->object.engine->subdev.device;
++ u64 bar2 = nvkm_memory_bar2(chan->user);
++
++ if (bar2 == ~0ULL)
++ return -EFAULT;
++
++ *type = NVKM_OBJECT_MAP_IO;
++ *addr = device->func->resource_addr(device, 3) + bar2;
++ *size = 0x1000;
++ return 0;
++}
++
++static int
++ga102_chan_fini(struct nvkm_object *object, bool suspend)
++{
++ struct ga102_chan *chan = ga102_chan(object);
++ struct nvkm_device *device = chan->object.engine->subdev.device;
++
++ nvkm_wr32(device, chan->ctrl.chan, 0x00000003);
++
++ nvkm_wr32(device, chan->ctrl.runl + 0x098, 0x01000000);
++ nvkm_msec(device, 2000,
++ if (!(nvkm_rd32(device, chan->ctrl.runl + 0x098) & 0x00100000))
++ break;
++ );
++
++ nvkm_wr32(device, chan->ctrl.runl + 0x088, 0);
++
++ nvkm_wr32(device, chan->ctrl.chan, 0xffffffff);
++ return 0;
++}
++
++static int
++ga102_chan_init(struct nvkm_object *object)
++{
++ struct ga102_chan *chan = ga102_chan(object);
++ struct nvkm_device *device = chan->object.engine->subdev.device;
++
++ nvkm_mask(device, chan->ctrl.runl + 0x300, 0x80000000, 0x80000000);
++
++ nvkm_wr32(device, chan->ctrl.runl + 0x080, lower_32_bits(nvkm_memory_addr(chan->runl)));
++ nvkm_wr32(device, chan->ctrl.runl + 0x084, upper_32_bits(nvkm_memory_addr(chan->runl)));
++ nvkm_wr32(device, chan->ctrl.runl + 0x088, 2);
++
++ nvkm_wr32(device, chan->ctrl.chan, 0x00000002);
++ nvkm_wr32(device, chan->ctrl.runl + 0x0090, 0);
++ return 0;
++}
++
++static void *
++ga102_chan_dtor(struct nvkm_object *object)
++{
++ struct ga102_chan *chan = ga102_chan(object);
++
++ if (chan->vmm) {
++ nvkm_vmm_part(chan->vmm, chan->inst);
++ nvkm_vmm_unref(&chan->vmm);
++ }
++
++ nvkm_memory_unref(&chan->runl);
++ nvkm_memory_unref(&chan->user);
++ nvkm_memory_unref(&chan->inst);
++ nvkm_memory_unref(&chan->mthd);
++ return chan;
++}
++
++static const struct nvkm_object_func
++ga102_chan = {
++ .dtor = ga102_chan_dtor,
++ .init = ga102_chan_init,
++ .fini = ga102_chan_fini,
++ .map = ga102_chan_map,
++ .sclass = ga102_chan_sclass,
++};
++
++static int
++ga102_chan_new(struct nvkm_device *device,
++ const struct nvkm_oclass *oclass, void *argv, u32 argc, struct nvkm_object **pobject)
++{
++ struct volta_channel_gpfifo_a_v0 *args = argv;
++ struct nvkm_top_device *tdev;
++ struct nvkm_vmm *vmm;
++ struct ga102_chan *chan;
++ int ret;
++
++ if (argc != sizeof(*args))
++ return -ENOSYS;
++
++ vmm = nvkm_uvmm_search(oclass->client, args->vmm);
++ if (IS_ERR(vmm))
++ return PTR_ERR(vmm);
++
++ if (!(chan = kzalloc(sizeof(*chan), GFP_KERNEL)))
++ return -ENOMEM;
++
++ nvkm_object_ctor(&ga102_chan, oclass, &chan->object);
++ *pobject = &chan->object;
++
++ list_for_each_entry(tdev, &device->top->device, head) {
++ if (tdev->type == NVKM_ENGINE_CE) {
++ chan->ctrl.runl = tdev->runlist;
++ break;
++ }
++ }
++
++ if (!chan->ctrl.runl)
++ return -ENODEV;
++
++ chan->ctrl.chan = nvkm_rd32(device, chan->ctrl.runl + 0x004) & 0xfffffff0;
++ args->token = nvkm_rd32(device, chan->ctrl.runl + 0x008) & 0xffff0000;
++
++ ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 0x1000, true, &chan->mthd);
++ if (ret)
++ return ret;
++
++ ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 0x1000, true, &chan->inst);
++ if (ret)
++ return ret;
++
++ nvkm_kmap(chan->inst);
++ nvkm_wo32(chan->inst, 0x010, 0x0000face);
++ nvkm_wo32(chan->inst, 0x030, 0x7ffff902);
++ nvkm_wo32(chan->inst, 0x048, lower_32_bits(args->ioffset));
++ nvkm_wo32(chan->inst, 0x04c, upper_32_bits(args->ioffset) |
++ (order_base_2(args->ilength / 8) << 16));
++ nvkm_wo32(chan->inst, 0x084, 0x20400000);
++ nvkm_wo32(chan->inst, 0x094, 0x30000001);
++ nvkm_wo32(chan->inst, 0x0ac, 0x00020000);
++ nvkm_wo32(chan->inst, 0x0e4, 0x00000000);
++ nvkm_wo32(chan->inst, 0x0e8, 0);
++ nvkm_wo32(chan->inst, 0x0f4, 0x00001000);
++ nvkm_wo32(chan->inst, 0x0f8, 0x10003080);
++ nvkm_mo32(chan->inst, 0x218, 0x00000000, 0x00000000);
++ nvkm_wo32(chan->inst, 0x220, lower_32_bits(nvkm_memory_bar2(chan->mthd)));
++ nvkm_wo32(chan->inst, 0x224, upper_32_bits(nvkm_memory_bar2(chan->mthd)));
++ nvkm_done(chan->inst);
++
++ ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 0x1000, true, &chan->user);
++ if (ret)
++ return ret;
++
++ ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 0x1000, true, &chan->runl);
++ if (ret)
++ return ret;
++
++ nvkm_kmap(chan->runl);
++ nvkm_wo32(chan->runl, 0x00, 0x80030001);
++ nvkm_wo32(chan->runl, 0x04, 1);
++ nvkm_wo32(chan->runl, 0x08, 0);
++ nvkm_wo32(chan->runl, 0x0c, 0x00000000);
++ nvkm_wo32(chan->runl, 0x10, lower_32_bits(nvkm_memory_addr(chan->user)));
++ nvkm_wo32(chan->runl, 0x14, upper_32_bits(nvkm_memory_addr(chan->user)));
++ nvkm_wo32(chan->runl, 0x18, lower_32_bits(nvkm_memory_addr(chan->inst)));
++ nvkm_wo32(chan->runl, 0x1c, upper_32_bits(nvkm_memory_addr(chan->inst)));
++ nvkm_done(chan->runl);
++
++ ret = nvkm_vmm_join(vmm, chan->inst);
++ if (ret)
++ return ret;
++
++ chan->vmm = nvkm_vmm_ref(vmm);
++ return 0;
++}
++
++static const struct nvkm_device_oclass
++ga102_chan_oclass = {
++ .ctor = ga102_chan_new,
++};
++
++static int
++ga102_user_new(struct nvkm_device *device,
++ const struct nvkm_oclass *oclass, void *argv, u32 argc, struct nvkm_object **pobject)
++{
++ return tu102_fifo_user_new(oclass, argv, argc, pobject);
++}
++
++static const struct nvkm_device_oclass
++ga102_user_oclass = {
++ .ctor = ga102_user_new,
++};
++
++static int
++ga102_fifo_sclass(struct nvkm_oclass *oclass, int index, const struct nvkm_device_oclass **class)
++{
++ if (index == 0) {
++ oclass->base = (struct nvkm_sclass) { -1, -1, VOLTA_USERMODE_A };
++ *class = &ga102_user_oclass;
++ return 0;
++ } else
++ if (index == 1) {
++ oclass->base = (struct nvkm_sclass) { 0, 0, AMPERE_CHANNEL_GPFIFO_B };
++ *class = &ga102_chan_oclass;
++ return 0;
++ }
++
++ return 2;
++}
++
++static int
++ga102_fifo_info(struct nvkm_engine *engine, u64 mthd, u64 *data)
++{
++ switch (mthd) {
++ case NV_DEVICE_HOST_CHANNELS: *data = 1; return 0;
++ default:
++ break;
++ }
++
++ return -ENOSYS;
++}
++
++static void *
++ga102_fifo_dtor(struct nvkm_engine *engine)
++{
++ return ga102_fifo(engine);
++}
++
++static const struct nvkm_engine_func
++ga102_fifo = {
++ .dtor = ga102_fifo_dtor,
++ .info = ga102_fifo_info,
++ .base.sclass = ga102_fifo_sclass,
++};
++
++int
++ga102_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
++ struct nvkm_fifo **pfifo)
++{
++ struct ga102_fifo *fifo;
++
++ if (!(fifo = kzalloc(sizeof(*fifo), GFP_KERNEL)))
++ return -ENOMEM;
++
++ nvkm_engine_ctor(&ga102_fifo, device, type, inst, true, &fifo->base.engine);
++ *pfifo = &fifo->base;
++ return 0;
++}
+--- a/drivers/gpu/drm/nouveau/nvkm/subdev/top/ga100.c
++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/top/ga100.c
+@@ -54,7 +54,7 @@ ga100_top_oneinit(struct nvkm_top *top)
+ info->reset = (data & 0x0000001f);
+ break;
+ case 2:
+- info->runlist = (data & 0x0000fc00) >> 10;
++ info->runlist = (data & 0x00fffc00);
+ info->engine = (data & 0x00000003);
+ break;
+ default:
+@@ -85,9 +85,10 @@ ga100_top_oneinit(struct nvkm_top *top)
+ }
+
+ nvkm_debug(subdev, "%02x.%d (%8s): addr %06x fault %2d "
+- "runlist %2d engine %2d reset %2d\n", type, inst,
++ "runlist %6x engine %2d reset %2d\n", type, inst,
+ info->type == NVKM_SUBDEV_NR ? "????????" : nvkm_subdev_type[info->type],
+- info->addr, info->fault, info->runlist, info->engine, info->reset);
++ info->addr, info->fault, info->runlist < 0 ? 0 : info->runlist,
++ info->engine, info->reset);
+ info = NULL;
+ }
+
--- /dev/null
+From f732e2e34aa08493fdd762f3daa4e5f16bbf1e45 Mon Sep 17 00:00:00 2001
+From: Ben Skeggs <bskeggs@redhat.com>
+Date: Mon, 6 Sep 2021 10:56:28 +1000
+Subject: drm/nouveau/kms/tu102-: delay enabling cursor until after assign_windows
+
+From: Ben Skeggs <bskeggs@redhat.com>
+
+commit f732e2e34aa08493fdd762f3daa4e5f16bbf1e45 upstream.
+
+Prevent NVD core channel error code 67 occuring and hanging display,
+managed to reproduce on GA102 while testing suspend/resume scenarios.
+
+Required extension of earlier commit to fix interactions with EFI.
+
+Fixes: e78b1b545c6c ("drm/nouveau/kms/nv50: workaround EFI GOP window channel format differences")
+Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
+Cc: Lyude Paul <lyude@redhat.com>
+Cc: Karol Herbst <kherbst@redhat.com>
+Cc: <stable@vger.kernel.org> # v5.12+
+Reviewed-by: Karol Herbst <kherbst@redhat.com>
+Signed-off-by: Karol Herbst <kherbst@redhat.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210906005628.11499-2-skeggsb@gmail.com
+Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/nouveau/dispnv50/head.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/nouveau/dispnv50/head.c
++++ b/drivers/gpu/drm/nouveau/dispnv50/head.c
+@@ -52,6 +52,7 @@ nv50_head_flush_clr(struct nv50_head *he
+ void
+ nv50_head_flush_set_wndw(struct nv50_head *head, struct nv50_head_atom *asyh)
+ {
++ if (asyh->set.curs ) head->func->curs_set(head, asyh);
+ if (asyh->set.olut ) {
+ asyh->olut.offset = nv50_lut_load(&head->olut,
+ asyh->olut.buffer,
+@@ -67,7 +68,6 @@ nv50_head_flush_set(struct nv50_head *he
+ if (asyh->set.view ) head->func->view (head, asyh);
+ if (asyh->set.mode ) head->func->mode (head, asyh);
+ if (asyh->set.core ) head->func->core_set(head, asyh);
+- if (asyh->set.curs ) head->func->curs_set(head, asyh);
+ if (asyh->set.base ) head->func->base (head, asyh);
+ if (asyh->set.ovly ) head->func->ovly (head, asyh);
+ if (asyh->set.dither ) head->func->dither (head, asyh);
--- /dev/null
+From 4d1aa9112c8e6995ef2c8a76972c9671332ccfea Mon Sep 17 00:00:00 2001
+From: Ben Hutchings <ben@decadent.org.uk>
+Date: Tue, 21 Sep 2021 16:34:42 +0200
+Subject: Partially revert "usb: Kconfig: using select for USB_COMMON dependency"
+
+From: Ben Hutchings <ben@decadent.org.uk>
+
+commit 4d1aa9112c8e6995ef2c8a76972c9671332ccfea upstream.
+
+This reverts commit cb9c1cfc86926d0e86d19c8e34f6c23458cd3478 for
+USB_LED_TRIG. This config symbol has bool type and enables extra code
+in usb_common itself, not a separate driver. Enabling it should not
+force usb_common to be built-in!
+
+Fixes: cb9c1cfc8692 ("usb: Kconfig: using select for USB_COMMON dependency")
+Cc: stable <stable@vger.kernel.org>
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+Signed-off-by: Salvatore Bonaccorso <carnil@debian.org>
+Link: https://lore.kernel.org/r/20210921143442.340087-1-carnil@debian.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/common/Kconfig | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/drivers/usb/common/Kconfig
++++ b/drivers/usb/common/Kconfig
+@@ -6,8 +6,7 @@ config USB_COMMON
+
+ config USB_LED_TRIG
+ bool "USB LED Triggers"
+- depends on LEDS_CLASS && LEDS_TRIGGERS
+- select USB_COMMON
++ depends on LEDS_CLASS && USB_COMMON && LEDS_TRIGGERS
+ help
+ This option adds LED triggers for USB host and/or gadget activity.
+
partially-revert-usb-kconfig-using-select-for-usb_common-dependency.patch
usb-cdc-wdm-fix-check-for-wwan.patch
usb-chipidea-ci_hdrc_imx-also-search-for-phys-phandle.patch
+usb-gadget-f_uac2-fixed-ep-in-wmaxpacketsize.patch
+usb-cdc-acm-fix-racy-tty-buffer-accesses.patch
+usb-cdc-acm-fix-break-reporting.patch
+usb-typec-tcpci-don-t-handle-vsafe0v-event-if-it-s-not-enabled.patch
+usb-typec-tcpm-handle-src_startup-state-if-cc-changes.patch
+usb-typec-tipd-remove-dependency-on-connector-child-fwnode.patch
+drm-amd-display-fix-b0-usb-c-dp-alt-mode.patch
+drm-amd-display-usb4-bring-up-set-correct-address.patch
+drm-amdgpu-during-s0ix-don-t-wait-to-signal-gfxoff.patch
+drm-nouveau-kms-tu102-delay-enabling-cursor-until-after-assign_windows.patch
+drm-nouveau-ga102-support-ttm-buffer-moves-via-copy-engine.patch
+drm-amd-display-limit-display-scaling-to-up-to-4k-for-dcn-3.1.patch
+drm-amd-display-fix-detection-of-4-lane-for-dpalt.patch
+drm-amd-display-fix-dcn3-b0-dp-alt-mapping.patch
+drm-i915-fix-runtime-pm-handling-in-i915_gem_shrink.patch
+drm-i915-extend-the-async-flip-vt-d-w-a-to-skl-bxt.patch
+xen-privcmd-fix-error-handling-in-mmap-resource-processing.patch
--- /dev/null
+From 58fc1daa4d2e9789b9ffc880907c961ea7c062cc Mon Sep 17 00:00:00 2001
+From: Johan Hovold <johan@kernel.org>
+Date: Wed, 29 Sep 2021 11:09:37 +0200
+Subject: USB: cdc-acm: fix break reporting
+
+From: Johan Hovold <johan@kernel.org>
+
+commit 58fc1daa4d2e9789b9ffc880907c961ea7c062cc upstream.
+
+A recent change that started reporting break events forgot to push the
+event to the line discipline, which meant that a detected break would
+not be reported until further characters had been receive (the port
+could even have been closed and reopened in between).
+
+Fixes: 08dff274edda ("cdc-acm: fix BREAK rx code path adding necessary calls")
+Cc: stable@vger.kernel.org
+Acked-by: Oliver Neukum <oneukum@suse.com>
+Signed-off-by: Johan Hovold <johan@kernel.org>
+Link: https://lore.kernel.org/r/20210929090937.7410-3-johan@kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/class/cdc-acm.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/usb/class/cdc-acm.c
++++ b/drivers/usb/class/cdc-acm.c
+@@ -340,6 +340,9 @@ static void acm_process_notification(str
+ acm->iocount.overrun++;
+ spin_unlock_irqrestore(&acm->read_lock, flags);
+
++ if (newctrl & ACM_CTRL_BRK)
++ tty_flip_buffer_push(&acm->port);
++
+ if (difference)
+ wake_up_all(&acm->wioctl);
+
--- /dev/null
+From 65a205e6113506e69a503b61d97efec43fc10fd7 Mon Sep 17 00:00:00 2001
+From: Johan Hovold <johan@kernel.org>
+Date: Wed, 29 Sep 2021 11:09:36 +0200
+Subject: USB: cdc-acm: fix racy tty buffer accesses
+
+From: Johan Hovold <johan@kernel.org>
+
+commit 65a205e6113506e69a503b61d97efec43fc10fd7 upstream.
+
+A recent change that started reporting break events to the line
+discipline caused the tty-buffer insertions to no longer be serialised
+by inserting events also from the completion handler for the interrupt
+endpoint.
+
+Completion calls for distinct endpoints are not guaranteed to be
+serialised. For example, in case a host-controller driver uses
+bottom-half completion, the interrupt and bulk-in completion handlers
+can end up running in parallel on two CPUs (high-and low-prio tasklets,
+respectively) thereby breaking the tty layer's single producer
+assumption.
+
+Fix this by holding the read lock also when inserting characters from
+the bulk endpoint.
+
+Fixes: 08dff274edda ("cdc-acm: fix BREAK rx code path adding necessary calls")
+Cc: stable@vger.kernel.org
+Acked-by: Oliver Neukum <oneukum@suse.com>
+Signed-off-by: Johan Hovold <johan@kernel.org>
+Link: https://lore.kernel.org/r/20210929090937.7410-2-johan@kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/class/cdc-acm.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/drivers/usb/class/cdc-acm.c
++++ b/drivers/usb/class/cdc-acm.c
+@@ -475,11 +475,16 @@ static int acm_submit_read_urbs(struct a
+
+ static void acm_process_read_urb(struct acm *acm, struct urb *urb)
+ {
++ unsigned long flags;
++
+ if (!urb->actual_length)
+ return;
+
++ spin_lock_irqsave(&acm->read_lock, flags);
+ tty_insert_flip_string(&acm->port, urb->transfer_buffer,
+ urb->actual_length);
++ spin_unlock_irqrestore(&acm->read_lock, flags);
++
+ tty_flip_buffer_push(&acm->port);
+ }
+
--- /dev/null
+From 04d2b75537085cb0c85d73a2e0e50317bffa883f Mon Sep 17 00:00:00 2001
+From: Rikard Falkeborn <rikard.falkeborn@gmail.com>
+Date: Wed, 29 Sep 2021 21:45:46 +0200
+Subject: usb: cdc-wdm: Fix check for WWAN
+
+From: Rikard Falkeborn <rikard.falkeborn@gmail.com>
+
+commit 04d2b75537085cb0c85d73a2e0e50317bffa883f upstream.
+
+CONFIG_WWAN_CORE was with CONFIG_WWAN in commit 89212e160b81 ("net: wwan:
+Fix WWAN config symbols"), but did not update all users of it. Change it
+back to use CONFIG_WWAN instead.
+
+Fixes: 89212e160b81 ("net: wwan: Fix WWAN config symbols")
+Cc: <stable@vger.kernel.org>
+Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
+Acked-by: Oliver Neukum <oneukum@suse.com>
+Link: https://lore.kernel.org/r/20210929194547.46954-2-rikard.falkeborn@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/class/cdc-wdm.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/usb/class/cdc-wdm.c
++++ b/drivers/usb/class/cdc-wdm.c
+@@ -824,7 +824,7 @@ static struct usb_class_driver wdm_class
+ };
+
+ /* --- WWAN framework integration --- */
+-#ifdef CONFIG_WWAN_CORE
++#ifdef CONFIG_WWAN
+ static int wdm_wwan_port_start(struct wwan_port *port)
+ {
+ struct wdm_device *desc = wwan_port_get_drvdata(port);
+@@ -963,11 +963,11 @@ static void wdm_wwan_rx(struct wdm_devic
+ /* inbuf has been copied, it is safe to check for outstanding data */
+ schedule_work(&desc->service_outs_intr);
+ }
+-#else /* CONFIG_WWAN_CORE */
++#else /* CONFIG_WWAN */
+ static void wdm_wwan_init(struct wdm_device *desc) {}
+ static void wdm_wwan_deinit(struct wdm_device *desc) {}
+ static void wdm_wwan_rx(struct wdm_device *desc, int length) {}
+-#endif /* CONFIG_WWAN_CORE */
++#endif /* CONFIG_WWAN */
+
+ /* --- error handling --- */
+ static void wdm_rxwork(struct work_struct *work)
--- /dev/null
+From 8253a34bfae3278baca52fc1209b7c29270486ca Mon Sep 17 00:00:00 2001
+From: Fabio Estevam <festevam@gmail.com>
+Date: Tue, 21 Sep 2021 08:37:54 -0300
+Subject: usb: chipidea: ci_hdrc_imx: Also search for 'phys' phandle
+
+From: Fabio Estevam <festevam@gmail.com>
+
+commit 8253a34bfae3278baca52fc1209b7c29270486ca upstream.
+
+When passing 'phys' in the devicetree to describe the USB PHY phandle
+(which is the recommended way according to
+Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt) the
+following NULL pointer dereference is observed on i.MX7 and i.MX8MM:
+
+[ 1.489344] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000098
+[ 1.498170] Mem abort info:
+[ 1.500966] ESR = 0x96000044
+[ 1.504030] EC = 0x25: DABT (current EL), IL = 32 bits
+[ 1.509356] SET = 0, FnV = 0
+[ 1.512416] EA = 0, S1PTW = 0
+[ 1.515569] FSC = 0x04: level 0 translation fault
+[ 1.520458] Data abort info:
+[ 1.523349] ISV = 0, ISS = 0x00000044
+[ 1.527196] CM = 0, WnR = 1
+[ 1.530176] [0000000000000098] user address but active_mm is swapper
+[ 1.536544] Internal error: Oops: 96000044 [#1] PREEMPT SMP
+[ 1.542125] Modules linked in:
+[ 1.545190] CPU: 3 PID: 7 Comm: kworker/u8:0 Not tainted 5.14.0-dirty #3
+[ 1.551901] Hardware name: Kontron i.MX8MM N801X S (DT)
+[ 1.557133] Workqueue: events_unbound deferred_probe_work_func
+[ 1.562984] pstate: 80000005 (Nzcv daif -PAN -UAO -TCO BTYPE=--)
+[ 1.568998] pc : imx7d_charger_detection+0x3f0/0x510
+[ 1.573973] lr : imx7d_charger_detection+0x22c/0x510
+
+This happens because the charger functions check for the phy presence
+inside the imx_usbmisc_data structure (data->usb_phy), but the chipidea
+core populates the usb_phy passed via 'phys' inside 'struct ci_hdrc'
+(ci->usb_phy) instead.
+
+This causes the NULL pointer dereference inside imx7d_charger_detection().
+
+Fix it by also searching for 'phys' in case 'fsl,usbphy' is not found.
+
+Tested on a imx7s-warp board.
+
+Fixes: 746f316b753a ("usb: chipidea: introduce imx7d USB charger detection")
+Cc: stable@vger.kernel.org
+Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
+Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Acked-by: Peter Chen <peter.chen@kernel.org>
+Signed-off-by: Fabio Estevam <festevam@gmail.com>
+Link: https://lore.kernel.org/r/20210921113754.767631-1-festevam@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/chipidea/ci_hdrc_imx.c | 15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+--- a/drivers/usb/chipidea/ci_hdrc_imx.c
++++ b/drivers/usb/chipidea/ci_hdrc_imx.c
+@@ -420,11 +420,16 @@ static int ci_hdrc_imx_probe(struct plat
+ data->phy = devm_usb_get_phy_by_phandle(dev, "fsl,usbphy", 0);
+ if (IS_ERR(data->phy)) {
+ ret = PTR_ERR(data->phy);
+- /* Return -EINVAL if no usbphy is available */
+- if (ret == -ENODEV)
+- data->phy = NULL;
+- else
+- goto err_clk;
++ if (ret == -ENODEV) {
++ data->phy = devm_usb_get_phy_by_phandle(dev, "phys", 0);
++ if (IS_ERR(data->phy)) {
++ ret = PTR_ERR(data->phy);
++ if (ret == -ENODEV)
++ data->phy = NULL;
++ else
++ goto err_clk;
++ }
++ }
+ }
+
+ pdata.usb_phy = data->phy;
--- /dev/null
+From 0560c9c552c1815e7b480bc11fd785fefc82bb27 Mon Sep 17 00:00:00 2001
+From: Pavel Hofman <pavel.hofman@ivitera.com>
+Date: Fri, 24 Sep 2021 10:00:27 +0200
+Subject: usb: gadget: f_uac2: fixed EP-IN wMaxPacketSize
+
+From: Pavel Hofman <pavel.hofman@ivitera.com>
+
+commit 0560c9c552c1815e7b480bc11fd785fefc82bb27 upstream.
+
+Async feedback patches broke enumeration on Windows 10 previously fixed
+by commit 789ea77310f0 ("usb: gadget: f_uac2: always increase endpoint
+max_packet_size by one audio slot").
+
+While the existing calculation for EP OUT capture for async mode yields
+size+1 frame due to uac2_opts->fb_max > 0, playback side lost the +1
+feature. Therefore the +1 frame addition must be re-introduced for
+playback. Win10 enumerates the device only when both EP IN and EP OUT
+max packet sizes are (at least) +1 frame.
+
+Fixes: e89bb4288378 ("usb: gadget: u_audio: add real feedback implementation")
+Cc: stable <stable@vger.kernel.org>
+Tested-by: Henrik Enquist <henrik.enquist@gmail.com>
+Tested-by: Jack Pham <jackp@codeaurora.org>
+Signed-off-by: Pavel Hofman <pavel.hofman@ivitera.com>
+Link: https://lore.kernel.org/r/20210924080027.5362-1-pavel.hofman@ivitera.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/gadget/function/f_uac2.c | 14 ++++++++++----
+ 1 file changed, 10 insertions(+), 4 deletions(-)
+
+--- a/drivers/usb/gadget/function/f_uac2.c
++++ b/drivers/usb/gadget/function/f_uac2.c
+@@ -593,11 +593,17 @@ static int set_ep_max_packet_size(const
+ ssize = uac2_opts->c_ssize;
+ }
+
+- if (!is_playback && (uac2_opts->c_sync == USB_ENDPOINT_SYNC_ASYNC))
++ if (!is_playback && (uac2_opts->c_sync == USB_ENDPOINT_SYNC_ASYNC)) {
++ // Win10 requires max packet size + 1 frame
+ srate = srate * (1000 + uac2_opts->fb_max) / 1000;
+-
+- max_size_bw = num_channels(chmask) * ssize *
+- DIV_ROUND_UP(srate, factor / (1 << (ep_desc->bInterval - 1)));
++ // updated srate is always bigger, therefore DIV_ROUND_UP always yields +1
++ max_size_bw = num_channels(chmask) * ssize *
++ (DIV_ROUND_UP(srate, factor / (1 << (ep_desc->bInterval - 1))));
++ } else {
++ // adding 1 frame provision for Win10
++ max_size_bw = num_channels(chmask) * ssize *
++ (DIV_ROUND_UP(srate, factor / (1 << (ep_desc->bInterval - 1))) + 1);
++ }
+ ep_desc->wMaxPacketSize = cpu_to_le16(min_t(u16, max_size_bw,
+ max_size_ep));
+
--- /dev/null
+From 05300871c0e21c288bd5c30ac6f9b1da6ddeed22 Mon Sep 17 00:00:00 2001
+From: Xu Yang <xu.yang_2@nxp.com>
+Date: Sun, 26 Sep 2021 18:14:15 +0800
+Subject: usb: typec: tcpci: don't handle vSafe0V event if it's not enabled
+
+From: Xu Yang <xu.yang_2@nxp.com>
+
+commit 05300871c0e21c288bd5c30ac6f9b1da6ddeed22 upstream.
+
+USB TCPCI Spec, 4.4.3 Mask Registers:
+"A masked register will still indicate in the ALERT register, but shall
+not set the Alert# pin low."
+
+Thus, the Extended Status will still indicate in ALERT register if vSafe0V
+is detected by TCPC even though being masked. In current code, howerer,
+this event will not be handled in detection time. Rather it will be
+handled when next ALERT event coming(CC evnet, PD event, etc).
+
+Tcpm might transition to a wrong state in this situation. Thus, the vSafe0V
+event should not be handled when it's masked.
+
+Fixes: 766c485b86ef ("usb: typec: tcpci: Add support to report vSafe0V")
+cc: <stable@vger.kernel.org>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
+Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
+Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
+Link: https://lore.kernel.org/r/20210926101415.3775058-1-xu.yang_2@nxp.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/typec/tcpm/tcpci.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/usb/typec/tcpm/tcpci.c
++++ b/drivers/usb/typec/tcpm/tcpci.c
+@@ -696,7 +696,7 @@ irqreturn_t tcpci_irq(struct tcpci *tcpc
+ tcpm_pd_receive(tcpci->port, &msg);
+ }
+
+- if (status & TCPC_ALERT_EXTENDED_STATUS) {
++ if (tcpci->data->vbus_vsafe0v && (status & TCPC_ALERT_EXTENDED_STATUS)) {
+ ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, &raw);
+ if (!ret && (raw & TCPC_EXTENDED_STATUS_VSAFE0V))
+ tcpm_vbus_change(tcpci->port);
--- /dev/null
+From 6d91017a295e9790eec02c4e43f020cdb55f5d98 Mon Sep 17 00:00:00 2001
+From: Xu Yang <xu.yang_2@nxp.com>
+Date: Tue, 28 Sep 2021 19:16:39 +0800
+Subject: usb: typec: tcpm: handle SRC_STARTUP state if cc changes
+
+From: Xu Yang <xu.yang_2@nxp.com>
+
+commit 6d91017a295e9790eec02c4e43f020cdb55f5d98 upstream.
+
+TCPM for DRP should do the same action as SRC_ATTACHED when cc changes in
+SRC_STARTUP state. Otherwise, TCPM will transition to SRC_UNATTACHED state
+which is not satisfied with the Type-C spec.
+
+Per Type-C spec:
+DRP port should move to Unattached.SNK instead of Unattached.SRC if sink
+removed.
+
+Fixes: 4b4e02c83167 ("typec: tcpm: Move out of staging")
+cc: <stable@vger.kernel.org>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
+Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
+Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
+Link: https://lore.kernel.org/r/20210928111639.3854174-1-xu.yang_2@nxp.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/typec/tcpm/tcpm.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/usb/typec/tcpm/tcpm.c
++++ b/drivers/usb/typec/tcpm/tcpm.c
+@@ -4846,6 +4846,7 @@ static void _tcpm_cc_change(struct tcpm_
+ tcpm_set_state(port, SRC_ATTACH_WAIT, 0);
+ break;
+ case SRC_ATTACHED:
++ case SRC_STARTUP:
+ case SRC_SEND_CAPABILITIES:
+ case SRC_READY:
+ if (tcpm_port_is_disconnected(port) ||
--- /dev/null
+From b87d8d0d4c43c29ccdc57d15b2ebc1df886a34b4 Mon Sep 17 00:00:00 2001
+From: Heikki Krogerus <heikki.krogerus@linux.intel.com>
+Date: Thu, 30 Sep 2021 15:47:58 +0300
+Subject: usb: typec: tipd: Remove dependency on "connector" child fwnode
+
+From: Heikki Krogerus <heikki.krogerus@linux.intel.com>
+
+commit b87d8d0d4c43c29ccdc57d15b2ebc1df886a34b4 upstream.
+
+There is no "connector" child node available on every
+platform, so the driver can't fail to probe when it's
+missing.
+
+Fixes: 57560ee95cb7 ("usb: typec: tipd: Don't block probing of consumer of "connector" nodes")
+Cc: stable@vger.kernel.org # 5.14+
+Reported-by: "Regupathy, Rajaram" <rajaram.regupathy@intel.com>
+Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
+Link: https://lore.kernel.org/r/20210930124758.23233-1-heikki.krogerus@linux.intel.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/typec/tipd/core.c | 8 +++-----
+ 1 file changed, 3 insertions(+), 5 deletions(-)
+
+--- a/drivers/usb/typec/tipd/core.c
++++ b/drivers/usb/typec/tipd/core.c
+@@ -625,10 +625,6 @@ static int tps6598x_probe(struct i2c_cli
+ if (ret < 0)
+ return ret;
+
+- fwnode = device_get_named_child_node(&client->dev, "connector");
+- if (!fwnode)
+- return -ENODEV;
+-
+ /*
+ * This fwnode has a "compatible" property, but is never populated as a
+ * struct device. Instead we simply parse it to read the properties.
+@@ -636,7 +632,9 @@ static int tps6598x_probe(struct i2c_cli
+ * with existing DT files, we work around this by deleting any
+ * fwnode_links to/from this fwnode.
+ */
+- fw_devlink_purge_absent_suppliers(fwnode);
++ fwnode = device_get_named_child_node(&client->dev, "connector");
++ if (fwnode)
++ fw_devlink_purge_absent_suppliers(fwnode);
+
+ tps->role_sw = fwnode_usb_role_switch_get(fwnode);
+ if (IS_ERR(tps->role_sw)) {
--- /dev/null
+From e11423d6721dd63b23fb41ade5e8d0b448b17780 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Wed, 22 Sep 2021 12:17:48 +0200
+Subject: xen/privcmd: fix error handling in mmap-resource processing
+
+From: Jan Beulich <jbeulich@suse.com>
+
+commit e11423d6721dd63b23fb41ade5e8d0b448b17780 upstream.
+
+xen_pfn_t is the same size as int only on 32-bit builds (and not even
+on Arm32). Hence pfns[] can't be used directly to read individual error
+values returned from xen_remap_domain_mfn_array(); every other error
+indicator would be skipped/ignored on 64-bit.
+
+Fixes: 3ad0876554ca ("xen/privcmd: add IOCTL_PRIVCMD_MMAP_RESOURCE")
+Cc: stable@vger.kernel.org
+Signed-off-by: Jan Beulich <jbeulich@suse.com>
+Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+Link: https://lore.kernel.org/r/aa6d6a67-6889-338a-a910-51e889f792d5@suse.com
+Signed-off-by: Juergen Gross <jgross@suse.com>
+---
+ drivers/xen/privcmd.c | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+--- a/drivers/xen/privcmd.c
++++ b/drivers/xen/privcmd.c
+@@ -803,11 +803,12 @@ static long privcmd_ioctl_mmap_resource(
+ unsigned int domid =
+ (xdata.flags & XENMEM_rsrc_acq_caller_owned) ?
+ DOMID_SELF : kdata.dom;
+- int num;
++ int num, *errs = (int *)pfns;
+
++ BUILD_BUG_ON(sizeof(*errs) > sizeof(*pfns));
+ num = xen_remap_domain_mfn_array(vma,
+ kdata.addr & PAGE_MASK,
+- pfns, kdata.num, (int *)pfns,
++ pfns, kdata.num, errs,
+ vma->vm_page_prot,
+ domid,
+ vma->vm_private_data);
+@@ -817,7 +818,7 @@ static long privcmd_ioctl_mmap_resource(
+ unsigned int i;
+
+ for (i = 0; i < num; i++) {
+- rc = pfns[i];
++ rc = errs[i];
+ if (rc < 0)
+ break;
+ }
projects / thirdparty / kernel / stable-queue.git / commitdiff
