drm/amdgpu: set default gfx reset masks for gfx6-8

These were not set so soft recovery was inadvertantly
disabled.

Fixes: 6ac55eab4fc4 ("drm/amdgpu: move reset support type checks into the caller")
Reviewed-by: Jesse Zhang <Jesse.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index 7693b79534267ea9751cca911e2e5c0b33c88e4a..80565392313f152da445c5a17b84e3c10000c882 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -3102,6 +3102,11 @@ static int gfx_v6_0_sw_init(struct amdgpu_ip_block *ip_block)
                        return r;
        }
 
+       adev->gfx.gfx_supported_reset =
+               amdgpu_get_soft_full_reset_mask(&adev->gfx.gfx_ring[0]);
+       adev->gfx.compute_supported_reset =
+               amdgpu_get_soft_full_reset_mask(&adev->gfx.compute_ring[0]);
+
        return r;
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 5976ed55d9dbdb6a3633844d4ea1eab891b99f11..2b7aba22ecc19031c4340fffd46c570d9577e1e4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -4399,6 +4399,11 @@ static int gfx_v7_0_sw_init(struct amdgpu_ip_block *ip_block)
 
        gfx_v7_0_gpu_early_init(adev);
 
+       adev->gfx.gfx_supported_reset =
+               amdgpu_get_soft_full_reset_mask(&adev->gfx.gfx_ring[0]);
+       adev->gfx.compute_supported_reset =
+               amdgpu_get_soft_full_reset_mask(&adev->gfx.compute_ring[0]);
+
        return r;
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index d3d0a4b0380cfab5cabeef2d03036757863fb9a0..1c87375e1dd5874754ec817486601a538a95923a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -2023,6 +2023,11 @@ static int gfx_v8_0_sw_init(struct amdgpu_ip_block *ip_block)
        if (r)
                return r;
 
+       adev->gfx.gfx_supported_reset =
+               amdgpu_get_soft_full_reset_mask(&adev->gfx.gfx_ring[0]);
+       adev->gfx.compute_supported_reset =
+               amdgpu_get_soft_full_reset_mask(&adev->gfx.compute_ring[0]);
+
        return 0;
 }