Fix some testcases for nds32 target and provide new nds32 target specific tests.

gcc/testsuite/
	* gcc.dg/20020312-2.c: Add __nds32__ case.
	* gcc.dg/builtin-apply2.c: Skip for nds32*-*-*.
	* gcc.dg/sibcall-3.c: Expected fail for nds32*-*-*.
	* gcc.dg/sibcall-4.c: Expected fail for nds32*-*-*.
	* gcc.dg/stack-usage-1.c (SIZE): Define case for __nds32__.
	* gcc.dg/torture/pr37868.c: Skip for nds32*-*-*.
	* gcc.dg/torture/stackalign/builtin-apply-2.c: Skip for nds32*-*-*.
	* gcc.dg/tree-ssa/20040204-1.c: Expected fail for nds32*-*-*.
	* gcc.dg/tree-ssa/pr42585.c: Skip for nds32*-*-*.
	* gcc.dg/tree-ssa/sra-12.c: Skip for nds32*-*-*.
	* gcc.target/nds32: New nds32 specific directory and testcases.
	* lib/target-supports.exp (check_profiling_available): Check for
	nds32*-*-elf.

From-SVN: r205625

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4fd97ac07afb1e9dd63c64d4ea1d5dfac619ce2b..c34641f1a17c50aa6b7fd8c896c9dc5293faeab9 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,19 @@
+2013-12-03  Chung-Ju Wu  <jasonwucj@gmail.com>
+
+       * gcc.dg/20020312-2.c: Add __nds32__ case.
+       * gcc.dg/builtin-apply2.c: Skip for nds32*-*-*.
+       * gcc.dg/sibcall-3.c: Expected fail for nds32*-*-*.
+       * gcc.dg/sibcall-4.c: Expected fail for nds32*-*-*.
+       * gcc.dg/stack-usage-1.c (SIZE): Define case for __nds32__.
+       * gcc.dg/torture/pr37868.c: Skip for nds32*-*-*.
+       * gcc.dg/torture/stackalign/builtin-apply-2.c: Skip for nds32*-*-*.
+       * gcc.dg/tree-ssa/20040204-1.c: Expected fail for nds32*-*-*.
+       * gcc.dg/tree-ssa/pr42585.c: Skip for nds32*-*-*.
+       * gcc.dg/tree-ssa/sra-12.c: Skip for nds32*-*-*.
+       * gcc.target/nds32: New nds32 specific directory and testcases.
+       * lib/target-supports.exp (check_profiling_available): Check for
+       nds32*-*-elf.
+
 2013-12-03  Jakub Jelinek  <jakub@redhat.com>
 
        PR tree-optimization/59362

diff --git a/gcc/testsuite/gcc.dg/20020312-2.c b/gcc/testsuite/gcc.dg/20020312-2.c
index 299910047f5472525f311722b9be18b6f9ff4d3c..7562a8d65f6afa65a7e5706f9f97bcf602d07dea 100644 (file)
--- a/gcc/testsuite/gcc.dg/20020312-2.c
+++ b/gcc/testsuite/gcc.dg/20020312-2.c
@@ -52,6 +52,8 @@ extern void abort (void);
 /* No pic register.  */
 #elif defined(__moxie__)
 /* No pic register.  */
+#elif defined(__nds32__)
+/* No pic register.  */
 #elif defined(__hppa__)
 /* PIC register is %r27 or %r19, but is used even without -fpic.  */
 #elif defined(__pdp11__)

diff --git a/gcc/testsuite/gcc.dg/builtin-apply2.c b/gcc/testsuite/gcc.dg/builtin-apply2.c
index 869f337a9a5bb9b9e9e200c88b270136abb0dca6..3ae2adc6e076903f43a0febe336c0d6ce8fa3f96 100644 (file)
--- a/gcc/testsuite/gcc.dg/builtin-apply2.c
+++ b/gcc/testsuite/gcc.dg/builtin-apply2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* " } { "*" } { "" } } */
+/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* nds32*-*-*" } { "*" } { "" } } */
 /* { dg-skip-if "Variadic funcs use Base AAPCS.  Normal funcs use VFP variant." { arm*-*-* && arm_hf_eabi } { "*" } { "" } } */
 
 /* PR target/12503 */

diff --git a/gcc/testsuite/gcc.dg/sibcall-3.c b/gcc/testsuite/gcc.dg/sibcall-3.c
index c4460e2e522da7bc1b4dbcce90113b2441e3791b..e02a410e6d9b21fd201bdc73c179819b3ffa28fb 100644 (file)
--- a/gcc/testsuite/gcc.dg/sibcall-3.c
+++ b/gcc/testsuite/gcc.dg/sibcall-3.c
@@ -5,7 +5,7 @@
    Copyright (C) 2002 Free Software Foundation Inc.
    Contributed by Hans-Peter Nilsson  <hp@bitrange.com>  */
 
-/* { dg-do run { xfail { { cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
+/* { dg-do run { xfail { { cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* nds32*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
 /* -mlongcall disables sibcall patterns.  */
 /* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
 /* { dg-options "-O2 -foptimize-sibling-calls" } */

diff --git a/gcc/testsuite/gcc.dg/sibcall-4.c b/gcc/testsuite/gcc.dg/sibcall-4.c
index 4f468f6595e947100d516c7e66ca6c85234f3f91..a66ed079862ce4c50933ae61f87cb7110d5ea165 100644 (file)
--- a/gcc/testsuite/gcc.dg/sibcall-4.c
+++ b/gcc/testsuite/gcc.dg/sibcall-4.c
@@ -5,7 +5,7 @@
    Copyright (C) 2002 Free Software Foundation Inc.
    Contributed by Hans-Peter Nilsson  <hp@bitrange.com>  */
 
-/* { dg-do run { xfail { { cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
+/* { dg-do run { xfail { { cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* nds32*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
 /* -mlongcall disables sibcall patterns.  */
 /* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
 /* { dg-options "-O2 -foptimize-sibling-calls" } */

diff --git a/gcc/testsuite/gcc.dg/stack-usage-1.c b/gcc/testsuite/gcc.dg/stack-usage-1.c
index 78807bacd3064fe1d31c4b376ebb241a5ab2f71b..7956efc4089d57276dff757e9d31bd19c4078338 100644 (file)
--- a/gcc/testsuite/gcc.dg/stack-usage-1.c
+++ b/gcc/testsuite/gcc.dg/stack-usage-1.c
@@ -38,6 +38,9 @@
 #  else
 #    define SIZE 248
 #  endif
+#elif defined (__nds32__)
+#  define SIZE 248 /* 256 - 8 bytes, only $fp and padding bytes are saved in
+                      the register save area under O0 optimization level.  */
 #elif defined (__powerpc64__) || defined (__ppc64__) || defined (__POWERPC64__) \
       || defined (__PPC64__)
 #  if _CALL_ELF == 2

diff --git a/gcc/testsuite/gcc.dg/torture/pr37868.c b/gcc/testsuite/gcc.dg/torture/pr37868.c
index cc9c24f49bb2371f0b0284a632a0818723b991c8..5204c5a5941cdd407189a811f9cf8740bdfaf2b4 100644 (file)
--- a/gcc/testsuite/gcc.dg/torture/pr37868.c
+++ b/gcc/testsuite/gcc.dg/torture/pr37868.c
@@ -1,6 +1,6 @@
 /* { dg-do run } */
 /* { dg-options "-fno-strict-aliasing" } */
-/* { dg-skip-if "unaligned access" { arc*-*-* epiphany-*-* sparc*-*-* sh*-*-* tic6x-*-* } "*" "" } */
+/* { dg-skip-if "unaligned access" { arc*-*-* epiphany-*-* nds32*-*-* sparc*-*-* sh*-*-* tic6x-*-* } "*" "" } */
 
 extern void abort (void);
 #if (__SIZEOF_INT__ <= 2)

diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
index ed81e808309792419bf456d48062d80d4597dac8..8eba13aed6794038ab1a92533c3b246bf4a04b95 100644 (file)
--- a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
@@ -10,6 +10,7 @@
    avr: Variadic funcs don't pass arguments in registers, while normal funcs
         do.  */
 /* { dg-skip-if "Variadic funcs use different argument passing from normal funcs" { arm_hf_eabi || { avr-*-* } } "*" "" } */
+/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { nds32*-*-* } "*" "" } */
    
 
 #define INTEGER_ARG  5

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
index 470b585fd534a82122aa3290d583de1452582869..8518dfb1a8b2ba026df0dd158d0b6732c9273c7d 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
@@ -33,5 +33,5 @@ void test55 (int x, int y)
    that the && should be emitted (based on BRANCH_COST).  Fix this
    by teaching dom to look through && and register all components
    as true.  */
-/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { ! "alpha*-*-* arm*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-* i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* sparc*-*-* spu-*-* x86_64-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { ! "alpha*-*-* arm*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-* i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* sparc*-*-* spu-*-* x86_64-*-*" } } } } */
 /* { dg-final { cleanup-tree-dump "optimized" } } */

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr42585.c b/gcc/testsuite/gcc.dg/tree-ssa/pr42585.c
index bea55496aeb13bae50249b298c5685a2085afb93..a970c855b884acaf93cc5e681bb7b8104a92c87c 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/pr42585.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr42585.c
@@ -35,6 +35,6 @@ Cyc_string_ungetc (int ignore, struct _fat_ptr *sptr)
 /* Whether the structs are totally scalarized or not depends on the
    MOVE_RATIO macro definition in the back end.  The scalarization will
    not take place when using small values for MOVE_RATIO.  */
-/* { dg-final { scan-tree-dump-times "struct _fat_ptr _ans" 0 "optimized" { target { ! "arm*-*-* avr-*-* powerpc*-*-* s390*-*-* sh*-*-*" } } } } */
-/* { dg-final { scan-tree-dump-times "struct _fat_ptr _T2" 0 "optimized" { target { ! "arm*-*-* avr-*-* powerpc*-*-* s390*-*-* sh*-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "struct _fat_ptr _ans" 0 "optimized" { target { ! "arm*-*-* avr-*-* nds32*-*-* powerpc*-*-* s390*-*-* sh*-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "struct _fat_ptr _T2" 0 "optimized" { target { ! "arm*-*-* avr-*-* nds32*-*-* powerpc*-*-* s390*-*-* sh*-*-*" } } } } */
 /* { dg-final { cleanup-tree-dump "optimized" } } */

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sra-12.c b/gcc/testsuite/gcc.dg/tree-ssa/sra-12.c
index 1ad3f4924225bbfbbad8634a33bebf33a7031b07..59e5e6af6d960b6d1c30d4ce8ae96415bb5307c0 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/sra-12.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/sra-12.c
@@ -21,5 +21,5 @@ int foo (struct S *p)
   *p = l;
 }
 
-/* { dg-final { scan-tree-dump-times "l;" 0 "release_ssa" { target { ! "avr*-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "l;" 0 "release_ssa" { target { ! "avr*-*-* nds32*-*-*" } } } } */
 /* { dg-final { cleanup-tree-dump "release_ssa" } } */

diff --git a/gcc/testsuite/gcc.target/nds32/basic-main.c b/gcc/testsuite/gcc.target/nds32/basic-main.c
new file mode 100644 (file)
index 0000000..6fdbc35
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nds32/basic-main.c
@@ -0,0 +1,9 @@
+/* This is a basic main function test program.  */
+
+/* { dg-do run }  */
+/* { dg-options "-O0" }  */
+
+int main(void)
+{
+  return 0;
+}

diff --git a/gcc/testsuite/gcc.target/nds32/builtin-isb.c b/gcc/testsuite/gcc.target/nds32/builtin-isb.c
new file mode 100644 (file)
index 0000000..e65061b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nds32/builtin-isb.c
@@ -0,0 +1,11 @@
+/* Verify that we generate isb instruction with builtin function.  */
+
+/* { dg-do compile }  */
+/* { dg-options "-O0" }  */
+/* { dg-final { scan-assembler "\\tisb" } }  */
+
+void
+test (void)
+{
+  __builtin_nds32_isb ();
+}

diff --git a/gcc/testsuite/gcc.target/nds32/builtin-isync.c b/gcc/testsuite/gcc.target/nds32/builtin-isync.c
new file mode 100644 (file)
index 0000000..3160e4a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nds32/builtin-isync.c
@@ -0,0 +1,12 @@
+/* Verify that we generate isync instruction with builtin function.  */
+
+/* { dg-do compile }  */
+/* { dg-options "-O0" }  */
+/* { dg-final { scan-assembler "\\tisync" } }  */
+
+void
+test (void)
+{
+  int *addr = (int *) 0x53000000;
+  __builtin_nds32_isync (addr);
+}

diff --git a/gcc/testsuite/gcc.target/nds32/builtin-mfsr-mtsr.c b/gcc/testsuite/gcc.target/nds32/builtin-mfsr-mtsr.c
new file mode 100644 (file)
index 0000000..db4c558
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nds32/builtin-mfsr-mtsr.c
@@ -0,0 +1,17 @@
+/* Verify that we generate mfsr/mtsr instruction with builtin function.  */
+
+/* { dg-do compile }  */
+/* { dg-options "-O0" }  */
+/* { dg-final { scan-assembler "\\tmfsr" } }  */
+/* { dg-final { scan-assembler "\\tmtsr" } }  */
+
+#include <nds32_intrinsic.h>
+
+void
+test (void)
+{
+  int ipsw_value;
+
+  ipsw_value = __builtin_nds32_mfsr (__NDS32_REG_IPSW__);
+  __builtin_nds32_mtsr (ipsw_value, __NDS32_REG_IPSW__);
+}

diff --git a/gcc/testsuite/gcc.target/nds32/builtin-mfusr-mtusr.c b/gcc/testsuite/gcc.target/nds32/builtin-mfusr-mtusr.c
new file mode 100644 (file)
index 0000000..3cfaab9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nds32/builtin-mfusr-mtusr.c
@@ -0,0 +1,17 @@
+/* Verify that we generate mfusr/mtusr instruction with builtin function.  */
+
+/* { dg-do compile }  */
+/* { dg-options "-O0" }  */
+/* { dg-final { scan-assembler "\\tmfusr" } }  */
+/* { dg-final { scan-assembler "\\tmtusr" } }  */
+
+#include <nds32_intrinsic.h>
+
+void
+test (void)
+{
+  int itype_value;
+
+  itype_value = __builtin_nds32_mfusr (__NDS32_REG_ITYPE__);
+  __builtin_nds32_mtusr (itype_value, __NDS32_REG_ITYPE__);
+}

diff --git a/gcc/testsuite/gcc.target/nds32/builtin-setgie-dis.c b/gcc/testsuite/gcc.target/nds32/builtin-setgie-dis.c
new file mode 100644 (file)
index 0000000..2dceed9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nds32/builtin-setgie-dis.c
@@ -0,0 +1,11 @@
+/* Verify that we generate setgie.d instruction with builtin function.  */
+
+/* { dg-do compile }  */
+/* { dg-options "-O0" }  */
+/* { dg-final { scan-assembler "\\tsetgie.d" } }  */
+
+void
+test (void)
+{
+  __builtin_nds32_setgie_dis ();
+}

diff --git a/gcc/testsuite/gcc.target/nds32/builtin-setgie-en.c b/gcc/testsuite/gcc.target/nds32/builtin-setgie-en.c
new file mode 100644 (file)
index 0000000..8928870
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nds32/builtin-setgie-en.c
@@ -0,0 +1,11 @@
+/* Verify that we generate setgie.e instruction with builtin function.  */
+
+/* { dg-do compile }  */
+/* { dg-options "-O0" }  */
+/* { dg-final { scan-assembler "\\tsetgie.e" } }  */
+
+void
+test (void)
+{
+  __builtin_nds32_setgie_en ();
+}

diff --git a/gcc/testsuite/gcc.target/nds32/nds32.exp b/gcc/testsuite/gcc.target/nds32/nds32.exp
new file mode 100644 (file)
index 0000000..e88d022
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nds32/nds32.exp
@@ -0,0 +1,45 @@
+# Target test cases of Andes NDS32 cpu for GNU compiler
+# Copyright (C) 2012-2013 Free Software Foundation, Inc.
+# Contributed by Andes Technology Corporation.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+# License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't a nds32 target.
+if ![istarget nds32*-*-*] then {
+  return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+    set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \
+       "" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index e0f097d624185bca1c6462f0e704e73e5fa686b2..642c3448bdab61175deba66661f9a9011a75df19 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -530,6 +530,7 @@ proc check_profiling_available { test_what } {
             || [istarget mn10300-*-elf*]
             || [istarget moxie-*-elf*]
             || [istarget msp430-*-*]
+            || [istarget nds32*-*-elf]
             || [istarget picochip-*-*]
             || [istarget powerpc-*-eabi*]
             || [istarget powerpc-*-elf]