config.gcc: Support march=broadwell.

        * config.gcc: Support march=broadwell.
        * config/i386/driver-i386.c (host_detect_local_cpu): Detect Broadwell.
        * config/i386/i386.c (ix86_option_override_internal): Add broadwell.
        * doc/invoke.texi: Document march=broadwell.

From-SVN: r206144

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ccffe8e0933b2947fba5026fdc199ea67bbf3ab6..5636956b33d6febc58e5811dcc70325441571cb2 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2013-12-20  Tocar Ilya  <ilya.tocar@intel.com>
+
+       * config.gcc: Support march=broadwell.
+       * config/i386/driver-i386.c (host_detect_local_cpu): Detect Broadwell.
+       * config/i386/i386.c (ix86_option_override_internal): Add broadwell.
+       * doc/invoke.texi: Document march=broadwell.
+
 2013-12-20  Jakub Jelinek  <jakub@redhat.com>
 
        * ubsan.c: Include tree-ssanames.h, asan.h and gimplify-me.h.

diff --git a/gcc/config.gcc b/gcc/config.gcc
index fbfc121f9c6862fa1dac7e440ed54897a93fda49..24dbaf92c5fa68c1e3cdc77f498ff3ded937f386 100644 (file)
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -3676,7 +3676,7 @@ case "${target}" in
                        | opteron-sse3 | athlon-fx | bdver4 | bdver3 | bdver2 \
                        | bdver1 | btver2 |  btver1 | amdfam10 | barcelona \
                        | nocona | core2 | corei7 | corei7-avx | core-avx-i \
-                       | core-avx2 | atom | slm)
+                       | core-avx2 | broadwell | atom | slm)
                                # OK
                                ;;
                        *)

diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index 0b8af3f4ffd3cbbd4f0296bd871ebc74cb376f84..26ae601068fc241c9ab5d69b11f9d6fcb2bfecad 100644 (file)
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -689,7 +689,9 @@ const char *host_detect_local_cpu (int argc, const char **argv)
          if (arch)
            {
              /* This is unknown family 0x6 CPU.  */
-             if (has_avx2)
+             if (has_adx)
+               cpu = "broadwell";
+             else if (has_avx2)
                /* Assume Haswell.  */
                cpu = "core-avx2";
              else if (has_avx)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index f82d1a40470812217258c0ef91e54100695fdc5e..1710e8c8e38b8c3f0da599163af7d9ab55c71438 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -3131,6 +3131,13 @@ ix86_option_override_internal (bool main_args_p,
        | PTA_RDRND | PTA_F16C | PTA_BMI | PTA_BMI2 | PTA_LZCNT
        | PTA_FMA | PTA_MOVBE | PTA_RTM | PTA_HLE | PTA_FXSR | PTA_XSAVE
        | PTA_XSAVEOPT},
+      {"broadwell", PROCESSOR_HASWELL, CPU_COREI7,
+       PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+       | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_AVX | PTA_AVX2
+       | PTA_CX16 | PTA_POPCNT | PTA_AES | PTA_PCLMUL | PTA_FSGSBASE
+       | PTA_RDRND | PTA_F16C | PTA_BMI | PTA_BMI2 | PTA_LZCNT
+       | PTA_FMA | PTA_MOVBE | PTA_RTM | PTA_HLE | PTA_FXSR | PTA_XSAVE
+       | PTA_XSAVEOPT | PTA_ADX | PTA_PRFCHW | PTA_RDSEED},
       {"atom", PROCESSOR_ATOM, CPU_ATOM,
        PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
        | PTA_SSSE3 | PTA_CX16 | PTA_MOVBE | PTA_FXSR},

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index e65a28c215598a9ac244865fe0fce44639aeb53d..63bd23b7668caf39abe18d40c8d560e5395f8424 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -14666,6 +14666,11 @@ Intel Core CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
 SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA,
 BMI, BMI2 and F16C instruction set support.
 
+@item broadwell
+Intel Broadwell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
+SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA,
+BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW instruction set support.
+
 @item atom
 Intel Atom CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3 and SSSE3
 instruction set support.