Xilinx: ARM: Renamed CONFIG_PELE_* to CONFIG_ZYNQ_*

This patch is a part of cleanup activity.

Signed-off-by: Jagan <jaganna@xilinx.com>

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index c04eb05f1d6e7bf81e8103b2cfbb4b9e150ff72a..efd4acc932773882d590980478bfe8071f1c06d7 100644 (file)
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -43,9 +43,9 @@ _start: b     reset
        ldr     pc, _irq
        ldr     pc, _fiq
 
-#ifdef CONFIG_PELE_XILINX_FLASH_HEADER
-#if !defined(CONFIG_PELE_XIP_START) || CONFIG_PELE_XIP_START == 0
-#error CONFIG_PELE_XIP_START must be defined for CONFIG_PELE_XILINX_FLASH_HEADER
+#ifdef CONFIG_ZYNQ_XILINX_FLASH_HEADER
+#if !defined(CONFIG_ZYNQ_XIP_START) || CONFIG_ZYNQ_XIP_START == 0
+#error CONFIG_ZYNQ_XIP_START must be defined for CONFIG_ZYNQ_XILINX_FLASH_HEADER
 #else
 /* These fields MUST immediately follow the vectors */
 #define HDR_20 0xAA995566
@@ -55,7 +55,7 @@ _start: b     reset
 #define HDR_30 0x00000120
 #define HDR_34 0x00000000
 #define HDR_38 0x00000000
-#define HDR_3C CONFIG_PELE_XIP_START
+#define HDR_3C CONFIG_ZYNQ_XIP_START
 #define HDR_40 0x00000000
 #define HDR_44 0x00000001
 #define HDR_CSUM (~(HDR_20+HDR_24+HDR_28+HDR_2C+HDR_30+HDR_34+HDR_38+HDR_3C+HDR_40+HDR_44))

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index f2688da096f65879d0f161bdbec8f37dfda60b1b..837552878bb2619d75c985ed828b7907d5d5d1bd 100644 (file)
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -916,7 +916,7 @@ static int __def_mmc_init(bd_t *bis)
 
 int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
 /* The Xilinx toolchain doesn't properly override the weak symbol */
-#ifndef CONFIG_PELE
+#ifndef CONFIG_ZYNQ
 int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
 #endif
 

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c836d30c262007c4ce429bb1a813e81cc69a1665..0bfe7ead848bf0476358d3ce898d146cd7f00c86 100644 (file)
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -726,7 +726,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this)
                }
 
 /* HACK FIXME BHILL */
-#ifndef CONFIG_PELE
+#ifndef CONFIG_ZYNQ
                if (this->dev_ready) {
                        if (this->dev_ready(mtd))
                                break;
@@ -734,7 +734,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this)
 #endif
                        if (this->read_byte(mtd) & NAND_STATUS_READY)
                                break;
-#ifndef CONFIG_PELE
+#ifndef CONFIG_ZYNQ
                }
 #endif
        }

diff --git a/include/configs/zynq_cseflash.h b/include/configs/zynq_cseflash.h
index 2fc7c50d10b6f0e7505302d2eb8351225a1fbd1e..bbb0e98015d5b3df51520bf839300ddd0d94fc32 100644 (file)
--- a/include/configs/zynq_cseflash.h
+++ b/include/configs/zynq_cseflash.h
@@ -7,7 +7,7 @@
 #define CONFIG_ARM1176         1 /* CPU */
 #define CONFIG_XDF             1 /* Board */
 #define CONFIG_DFE             1 /* Board sub-type ("flavor"?) */
-#define CONFIG_PELE            1 /* SoC? */
+#define CONFIG_ZYNQ            1 /* SoC? */
 
 #define CONFIG_ARM_DCC  1 /* enable dcc channel */
 #define CONFIG_CPU_V6   1
@@ -69,7 +69,7 @@
                            go 0x8000\0"
 */
 
-#undef CONFIG_PELE_XIL_LQSPI
+#undef CONFIG_ZYNQ_XIL_LQSPI
 
 /* default boot is according to the bootmode switch settings */
 #define CONFIG_BOOTCOMMAND "run modeboot"
@@ -139,8 +139,10 @@
 
 #define CONFIG_L2_OFF
 
-//#define CONFIG_PELE_INIT_GEM //this is to initialize GEM at uboot start
-//#define CONFIG_PELE_IP_ENV   //this is to set ipaddr, ethaddr and serverip env variables.
+/* this is to initialize GEM at uboot start */
+/* #define CONFIG_ZYNQ_INIT_GEM        */
+/* this is to set ipaddr, ethaddr and serverip env variables. */
+/* #define CONFIG_ZYNQ_IP_ENV  */
 
 
 #ifndef CONFIG_SYS_NO_FLASH
@@ -253,15 +255,15 @@
 #endif
 
 /* Place a Xilinx Boot ROM header in u-boot image? */
-#define CONFIG_PELE_XILINX_FLASH_HEADER
+#define CONFIG_ZYNQ_XILINX_FLASH_HEADER
 
-#ifdef CONFIG_PELE_XILINX_FLASH_HEADER
+#ifdef CONFIG_ZYNQ_XILINX_FLASH_HEADER
 /* Address Xilinx boot rom should use to launch u-boot */
-#ifdef CONFIG_PELE_XIL_LQSPI
-#define CONFIG_PELE_XIP_START XPSS_QSPI_LIN_BASEADDR
+#ifdef CONFIG_ZYNQ_XIL_LQSPI
+#define CONFIG_ZYNQ_XIP_START XPSS_QSPI_LIN_BASEADDR
 #else
 /* NOR */
-#define CONFIG_PELE_XIP_START CONFIG_SYS_FLASH_BASE
+#define CONFIG_ZYNQ_XIP_START CONFIG_SYS_FLASH_BASE
 #endif
 #endif
 

diff --git a/include/configs/zynq_ep107.h b/include/configs/zynq_ep107.h
index a53656da80f3efe7f2862534811b23e01e6bd5ab..61c4666fa672ef75e88a611fc415889faa7c4efe 100644 (file)
--- a/include/configs/zynq_ep107.h
+++ b/include/configs/zynq_ep107.h
@@ -9,7 +9,7 @@
 #define CONFIG_ARM1176         1 /* CPU */
 #define CONFIG_XDF             1 /* Board */
 #define CONFIG_DFE             1 /* Board sub-type ("flavor"?) */
-#define CONFIG_PELE            1 /* SoC? */
+#define CONFIG_ZYNQ            1 /* SoC? */
 
 /* Select board: comment out all but one. */
 
@@ -77,7 +77,7 @@
                            go 0x8000\0"
 
 
-#undef CONFIG_PELE_XIL_LQSPI
+#undef CONFIG_ZYNQ_XIL_LQSPI
 
 /* default boot is according to the bootmode switch settings */
 #define CONFIG_BOOTCOMMAND "run modeboot"
@@ -118,8 +118,10 @@
 
 #define CONFIG_L2_OFF
 
-//#define CONFIG_PELE_INIT_GEM //this is to initialize GEM at uboot start
-#define CONFIG_PELE_IP_ENV     //this is to set ipaddr, ethaddr and serverip env variables.
+/* this is to initialize GEM at uboot start */
+/* #define CONFIG_ZYNQ_INIT_GEM        */
+/* this is to set ipaddr, ethaddr and serverip env variables. */
+#define CONFIG_ZYNQ_IP_ENV
 
 
 #ifndef CONFIG_SYS_NO_FLASH
@@ -240,15 +242,15 @@
 #endif
 
 /* Place a Xilinx Boot ROM header in u-boot image? */
-#define CONFIG_PELE_XILINX_FLASH_HEADER
+#define CONFIG_ZYNQ_XILINX_FLASH_HEADER
 
-#ifdef CONFIG_PELE_XILINX_FLASH_HEADER
+#ifdef CONFIG_ZYNQ_XILINX_FLASH_HEADER
 /* Address Xilinx boot rom should use to launch u-boot */
-#ifdef CONFIG_PELE_XIL_LQSPI
-#define CONFIG_PELE_XIP_START XPSS_QSPI_LIN_BASEADDR
+#ifdef CONFIG_ZYNQ_XIL_LQSPI
+#define CONFIG_ZYNQ_XIP_START XPSS_QSPI_LIN_BASEADDR
 #else
 /* NOR */
-#define CONFIG_PELE_XIP_START CONFIG_SYS_FLASH_BASE
+#define CONFIG_ZYNQ_XIP_START CONFIG_SYS_FLASH_BASE
 #endif
 #endif
 

diff --git a/include/configs/zynq_zc702.h b/include/configs/zynq_zc702.h
index dfb21c8790a75e17c0378fe56301a5b472838776..590be56b064ce4e007343eceb9c7a30d4bdb894e 100755 (executable)
--- a/include/configs/zynq_zc702.h
+++ b/include/configs/zynq_zc702.h
@@ -9,7 +9,7 @@
 #define CONFIG_ARM1176         1 /* CPU */
 #define CONFIG_XDF             1 /* Board */
 #define CONFIG_DFE             1 /* Board sub-type ("flavor"?) */
-#define CONFIG_PELE            1 /* SoC? */
+#define CONFIG_ZYNQ            1 /* SoC? */
 
 /* Select board: comment out all but one. */
 
@@ -70,7 +70,7 @@
                            go 0x8000\0"
 
 
-#undef CONFIG_PELE_XIL_LQSPI
+#undef CONFIG_ZYNQ_XIL_LQSPI
 
 /* default boot is according to the bootmode switch settings */
 #define CONFIG_BOOTCOMMAND "run modeboot"
@@ -110,8 +110,10 @@
 
 #define CONFIG_L2_OFF
 
-//#define CONFIG_PELE_INIT_GEM //this is to initialize GEM at uboot start
-#define CONFIG_PELE_IP_ENV     //this is to set ipaddr, ethaddr and serverip env variables.
+/* this is to initialize GEM at uboot start */
+/* #define CONFIG_ZYNQ_INIT_GEM        */
+/* this is to set ipaddr, ethaddr and serverip env variables. */
+#define CONFIG_ZYNQ_IP_ENV
 
 
 #ifndef CONFIG_SYS_NO_FLASH
@@ -224,15 +226,15 @@
 #endif
 
 /* Place a Xilinx Boot ROM header in u-boot image? */
-//#define CONFIG_PELE_XILINX_FLASH_HEADER
+/* #define CONFIG_ZYNQ_XILINX_FLASH_HEADER */
 
-#ifdef CONFIG_PELE_XILINX_FLASH_HEADER
+#ifdef CONFIG_ZYNQ_XILINX_FLASH_HEADER
 /* Address Xilinx boot rom should use to launch u-boot */
-#ifdef CONFIG_PELE_XIL_LQSPI
-#define CONFIG_PELE_XIP_START XPSS_QSPI_LIN_BASEADDR
+#ifdef CONFIG_ZYNQ_XIL_LQSPI
+#define CONFIG_ZYNQ_XIP_START XPSS_QSPI_LIN_BASEADDR
 #else
 /* NOR */
-#define CONFIG_PELE_XIP_START CONFIG_SYS_FLASH_BASE
+#define CONFIG_ZYNQ_XIP_START CONFIG_SYS_FLASH_BASE
 #endif
 #endif
 

diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h
index 280236bfc03a4512a49dabaab79539041e1e2fe5..996814c60516c037a87a55dc0097fac098e97686 100644 (file)
--- a/include/configs/zynq_zc770.h
+++ b/include/configs/zynq_zc770.h
@@ -9,7 +9,7 @@
 #define CONFIG_ARM1176         1 /* CPU */
 #define CONFIG_XDF             1 /* Board */
 #define CONFIG_DFE             1 /* Board sub-type ("flavor"?) */
-#define CONFIG_PELE            1 /* SoC? */
+#define CONFIG_ZYNQ            1 /* SoC? */
 
 #include "../board/xilinx/zynq_common/xparameters_zynq.h"
 
@@ -107,12 +107,14 @@
 
 #define CONFIG_L2_OFF
 
-//#define CONFIG_PELE_INIT_GEM //this is to initialize GEM at uboot start
-#define CONFIG_PELE_IP_ENV     //this is to set ipaddr, ethaddr and serverip env variables.
+/* this is to initialize GEM at uboot start */
+/* #define CONFIG_ZYNQ_INIT_GEM        */
+/* this is to set ipaddr, ethaddr and serverip env variables. */
+#define CONFIG_ZYNQ_IP_ENV
 
 #if defined(CONFIG_ZC770_XM010) || defined(CONFIG_ZC770_XM012)
 /* Place a Xilinx Boot ROM header in u-boot image? */
-#define CONFIG_PELE_XILINX_FLASH_HEADER
+#define CONFIG_ZYNQ_XILINX_FLASH_HEADER
 #endif
 
 #ifndef CONFIG_SYS_NO_FLASH
@@ -141,8 +143,8 @@
 #else
 # define CONFIG_ENV_IS_NOWHERE         1
 #endif
-#ifdef CONFIG_PELE_XILINX_FLASH_HEADER
-#define CONFIG_PELE_XIP_START CONFIG_SYS_FLASH_BASE
+#ifdef CONFIG_ZYNQ_XILINX_FLASH_HEADER
+#define CONFIG_ZYNQ_XIP_START CONFIG_SYS_FLASH_BASE
 #endif
 #else
 
@@ -225,9 +227,9 @@
 #define CONFIG_SPI_FLASH
 #define CONFIG_CMD_SF
 
-#ifdef CONFIG_PELE_XILINX_FLASH_HEADER
+#ifdef CONFIG_ZYNQ_XILINX_FLASH_HEADER
 /* Address Xilinx boot rom should use to launch u-boot */
-#define CONFIG_PELE_XIP_START XPSS_QSPI_LIN_BASEADDR
+#define CONFIG_ZYNQ_XIP_START XPSS_QSPI_LIN_BASEADDR
 #endif
 #endif