zynq: ddrc: Setup half of memory only for ECC case

Reported-by: Cayer Yves <ycayer@ciena.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

diff --git a/arch/arm/cpu/armv7/zynq/ddrc.c b/arch/arm/cpu/armv7/zynq/ddrc.c
index e8f8c19ed118f2fa04ce1897f7aed738aaa88535..0075f0eabbfb49148ba2b25836db1648124a5707 100644 (file)
--- a/arch/arm/cpu/armv7/zynq/ddrc.c
+++ b/arch/arm/cpu/armv7/zynq/ddrc.c
@@ -56,10 +56,9 @@ void zynq_ddrc_init(void)
                 * been initialized by writing any value.
                 */
                memset(0, 0, 1 * 1024 * 1024);
+
+               gd->ram_size /= 2;
        } else {
                puts("Memory: ECC disabled\n");
        }
-
-       if (width == ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT)
-               gd->ram_size /= 2;
 }