]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: imx8mn-evk: support more sample rates for wm8524 card
authorShengjiu Wang <shengjiu.wang@nxp.com>
Fri, 15 Aug 2025 10:23:17 +0000 (18:23 +0800)
committerShawn Guo <shawnguo@kernel.org>
Fri, 22 Aug 2025 02:48:53 +0000 (10:48 +0800)
The wm8524 codec is connected to the SAI interface. There are two audio
plls on i.MX8MN, one pll can be the clock source of 44kHz series rates,
another pll can be clock source of 48kHz series rates.

Previously it only supported 48kHz series rates, with this change the
supported rates will include 44kHz series rates, from 8kHz to 192kHz.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi

index 33d73f3dc18759295207fae76d67100387b86461..145355ff91b454795478b504eb403b0590848d46 100644 (file)
        assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
        assigned-clock-rates = <24576000>;
        fsl,sai-mclk-direction-output;
+       clocks = <&clk IMX8MN_CLK_SAI3_IPG>, <&clk IMX8MN_CLK_DUMMY>,
+               <&clk IMX8MN_CLK_SAI3_ROOT>, <&clk IMX8MN_CLK_DUMMY>,
+               <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_AUDIO_PLL1_OUT>,
+               <&clk IMX8MN_AUDIO_PLL2_OUT>;
+       clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
        status = "okay";
 };