]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
pinctrl: mediatek: Drop bogus slew rate register range for MT8186
authorChen-Yu Tsai <wenst@chromium.org>
Wed, 31 Jan 2024 07:19:07 +0000 (15:19 +0800)
committerSasha Levin <sashal@kernel.org>
Tue, 26 Mar 2024 22:17:03 +0000 (18:17 -0400)
[ Upstream commit 3a29c87548809405bcbc66acc69cbe6f15184d94 ]

The MT8186 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.

Drop the bogus setting.

Fixes: 8b483bda1e46 ("pinctrl: add pinctrl driver on mt8186")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240131071910.3950450-1-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/pinctrl/mediatek/pinctrl-mt8186.c

index 7be591591cce54d04efde09957537cf91c33506c..dd19e74856a92cea97bc2e56547415f52a7adc24 100644 (file)
@@ -1198,7 +1198,6 @@ static const struct mtk_pin_reg_calc mt8186_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8186_pin_dir_range),
        [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt8186_pin_di_range),
        [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt8186_pin_do_range),
-       [PINCTRL_PIN_REG_SR] = MTK_RANGE(mt8186_pin_dir_range),
        [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt8186_pin_smt_range),
        [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt8186_pin_ies_range),
        [PINCTRL_PIN_REG_PU] = MTK_RANGE(mt8186_pin_pu_range),