Xilinx: ARM: INIT_SP is now needed before relocation

Define the offset and size of the INIT_RAM.
Base the INIT_SP on the INIT_RAM and reference the generated
GBL_DATA_SIZE.
Remove the explicit definition of the CONFIG_SYS_GBL_DATA_SIZE.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

diff --git a/include/configs/xpele.h b/include/configs/xpele.h
index 9be94d188188bcfb21323f26eeb4ec6bc282b05a..554c4026a32ac113ee0fb53c9118f5449b54460b 100644 (file)
--- a/include/configs/xpele.h
+++ b/include/configs/xpele.h
@@ -157,8 +157,11 @@
 
 #define CONFIG_SYS_CACHELINE_SIZE      32 /* Assuming bytes? */
 
-/* CONFIG_SYS_INIT_RAM_ADDR? */
-/* CONFIG_SYS_GLOBAL_DATA_OFFSET? */
+#define CONFIG_SYS_INIT_RAM_ADDR       0xFFFF0000
+#define CONFIG_SYS_INIT_RAM_SIZE       0x1000
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + \
+                                       CONFIG_SYS_INIT_RAM_SIZE - \
+                                       GENERATED_GBL_DATA_SIZE)
 
 /* Because (at least at first) we're going to be loaded via JTAG_Tcl */
 //#define CONFIG_SKIP_LOWLEVEL_INIT    
@@ -197,7 +200,6 @@
 #define CONFIG_ENV_SIZE                        0x10000
 #define CONFIG_NR_DRAM_BANKS           1
 #define CONFIG_SYS_MALLOC_LEN          0x400000
-#define CONFIG_SYS_GBL_DATA_SIZE       128
 #define CONFIG_SYS_MAXARGS             16
 #define CONFIG_SYS_CBSIZE              256
 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* phycore */

diff --git a/include/configs/zynq_zc702.h b/include/configs/zynq_zc702.h
index a9d88bd90c8d31a8c51389a1aef06d049d77559e..66468959c1f727c6d0c6644f7136398dbe69f59d 100644 (file)
--- a/include/configs/zynq_zc702.h
+++ b/include/configs/zynq_zc702.h
@@ -152,8 +152,11 @@
 
 #define CONFIG_SYS_CACHELINE_SIZE      32 /* Assuming bytes? */
 
-/* CONFIG_SYS_INIT_RAM_ADDR? */
-/* CONFIG_SYS_GLOBAL_DATA_OFFSET? */
+#define CONFIG_SYS_INIT_RAM_ADDR       0xFFFF0000
+#define CONFIG_SYS_INIT_RAM_SIZE       0x1000
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + \
+                                       CONFIG_SYS_INIT_RAM_SIZE - \
+                                       GENERATED_GBL_DATA_SIZE)
 
 /* Because (at least at first) we're going to be loaded via JTAG_Tcl */
 //#define CONFIG_SKIP_LOWLEVEL_INIT    
@@ -188,7 +191,6 @@
 #define CONFIG_ENV_SIZE                        0x10000
 #define CONFIG_NR_DRAM_BANKS           1
 #define CONFIG_SYS_MALLOC_LEN          0x400000
-#define CONFIG_SYS_GBL_DATA_SIZE       128
 #define CONFIG_SYS_MAXARGS             16
 #define CONFIG_SYS_CBSIZE              256
 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* phycore */

diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h
index a9d88bd90c8d31a8c51389a1aef06d049d77559e..66468959c1f727c6d0c6644f7136398dbe69f59d 100644 (file)
--- a/include/configs/zynq_zc770.h
+++ b/include/configs/zynq_zc770.h
@@ -152,8 +152,11 @@
 
 #define CONFIG_SYS_CACHELINE_SIZE      32 /* Assuming bytes? */
 
-/* CONFIG_SYS_INIT_RAM_ADDR? */
-/* CONFIG_SYS_GLOBAL_DATA_OFFSET? */
+#define CONFIG_SYS_INIT_RAM_ADDR       0xFFFF0000
+#define CONFIG_SYS_INIT_RAM_SIZE       0x1000
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + \
+                                       CONFIG_SYS_INIT_RAM_SIZE - \
+                                       GENERATED_GBL_DATA_SIZE)
 
 /* Because (at least at first) we're going to be loaded via JTAG_Tcl */
 //#define CONFIG_SKIP_LOWLEVEL_INIT    
@@ -188,7 +191,6 @@
 #define CONFIG_ENV_SIZE                        0x10000
 #define CONFIG_NR_DRAM_BANKS           1
 #define CONFIG_SYS_MALLOC_LEN          0x400000
-#define CONFIG_SYS_GBL_DATA_SIZE       128
 #define CONFIG_SYS_MAXARGS             16
 #define CONFIG_SYS_CBSIZE              256
 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* phycore */