RISC-V: Check if we can vec_extract [PR121510].

For Zvfhmin a vector mode exists but the corresponding vec_extract does
not.  This patch checks that a vec_extract is available and otherwise
falls back to standard handling.

	PR target/121510

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_legitimize_move): Check if we can
	vec_extract.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/pr121510.c: New test.

(cherry picked from commit a6bf07653cd272add46a2218ec141c95d7f02427)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 031584a437a9d4bfce77e561128d4edd0ba4f684..472c2e60d9f59f7000e773d4e0fa5794b422932a 100644 (file)
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3596,7 +3596,8 @@ riscv_legitimize_move (machine_mode mode, rtx dest, rtx src)
       /* This test can fail if (for example) we want a HF and Z[v]fh is
         not enabled.  In that case we just want to let the standard
         expansion path run.  */
-      if (riscv_vector::get_vector_mode (smode, nunits).exists (&vmode))
+      if (riscv_vector::get_vector_mode (smode, nunits).exists (&vmode)
+         && convert_optab_handler (vec_extract_optab, vmode, smode))
        {
          rtx v = gen_lowpart (vmode, SUBREG_REG (src));
          rtx int_reg = dest;

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121510.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121510.c
new file mode 100644 (file)
index 0000000..8e17286
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121510.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3" } */
+
+long *print_bfloat_block;
+void ftoastr(float);
+void print_bfloat() {
+  for (;;) {
+    long j;
+    union {
+      _Float16 x;
+      char b[]
+    } u;
+    j = 0;
+    for (; j < sizeof 0; j++)
+      u.b[j] = print_bfloat_block[j];
+    ftoastr(u.x);
+  }
+}