Reenable FST %st(0),%st(?) (0xDD 0xD0 .. 0xDD 0xD7).

git-svn-id: svn://svn.valgrind.org/vex/trunk@1322

diff --git a/VEX/priv/guest-amd64/toIR.c b/VEX/priv/guest-amd64/toIR.c
index bb8962db1e8c1dfa9c304c0cc69480fe257c25bb..e27e2b81ec359573eed6d0b39cd4fb2adc125877 100644 (file)
--- a/VEX/priv/guest-amd64/toIR.c
+++ b/VEX/priv/guest-amd64/toIR.c
@@ -5372,14 +5372,14 @@ ULong dis_FPU ( /*OUT*/Bool* decode_ok,
                put_ST_TAG ( r_dst, mkU8(0) );
                break;
 
-//..             case 0xD0 ... 0xD7: /* FST %st(0),%st(?) */
-//..                r_dst = (UInt)modrm - 0xD0;
-//..                DIP("fst %%st(0),%%st(%d)\n", r_dst);
-//..                /* P4 manual says: "If the destination operand is a
-//..                   non-empty register, the invalid-operation exception
-//..                   is not generated.  Hence put_ST_UNCHECKED. */
-//..                put_ST_UNCHECKED(r_dst, get_ST(0));
-//..                break;
+            case 0xD0 ... 0xD7: /* FST %st(0),%st(?) */
+               r_dst = (UInt)modrm - 0xD0;
+               DIP("fst %%st(0),%%st(%d)\n", r_dst);
+               /* P4 manual says: "If the destination operand is a
+                  non-empty register, the invalid-operation exception
+                  is not generated.  Hence put_ST_UNCHECKED. */
+               put_ST_UNCHECKED(r_dst, get_ST(0));
+               break;
 
             case 0xD8 ... 0xDF: /* FSTP %st(0),%st(?) */
                r_dst = (UInt)modrm - 0xD8;