ARM: dts: qcom: ipq4019: correct SDHCI XO clock

[ Upstream commit b5ed7a5c1fdb3981713f7b637b72aa390c3db036 ]

Using GCC_DCD_XO_CLK as the XO clock for SDHCI controller is not correct,
it seems that I somehow made a mistake of passing it instead of the fixed
XO clock.

Fixes: 04b3b72b5b8f ("ARM: dts: qcom: ipq4019: Add SDHCI controller node")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811110150.229966-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index 02e13d8c222a0f2983956adee72f85ab620762c3..b5e0ed4923b594ab8468241510a6cf0c210d1dcf 100644 (file)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -228,9 +228,12 @@
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
                        bus-width = <8>;
-                       clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>,
-                                <&gcc GCC_DCD_XO_CLK>;
-                       clock-names = "iface", "core", "xo";
+                       clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+                                <&gcc GCC_SDCC1_APPS_CLK>,
+                                <&xo>;
+                       clock-names = "iface",
+                                     "core",
+                                     "xo";
                        status = "disabled";
                };