irqchip/apple-aic: Add support for "apple,t8122-aic3"

Introduce support for the new AICv3 hardware block in t8122 and t603x
SoCs. AICv3 is similar to AICv2 but has an increased IRQ config offset.

These MMIO offsets are coded as properties of the "aic,3" node in Apple's
device tree. The actual offsets are the same for all SoCs starting from M3
through at least M5.

So do not bother to follow suit but use AICv3 specific defines in the
driver.  The compatible string is SoC specific so future SoCs with AICv3
and different offsets would just use their own compatible string as base
and add their new offsets.

Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Sven Peter <sven@kernel.org>
Link: https://patch.msgid.link/20260223-irq-apple-aic3-v3-2-2b7328076b8d@jannau.net

diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c
index 2b24c82bb0df5b8e81be97a97d6c87e220f9fc06..4a3141d9f91416abe90ee37cb3f3d8ecd0c3673e 100644 (file)
--- a/drivers/irqchip/irq-apple-aic.c
+++ b/drivers/irqchip/irq-apple-aic.c
@@ -134,8 +134,12 @@
 
 #define AIC2_IRQ_CFG           0x2000
 
+/* AIC v3 registers (MMIO) */
+#define AIC3_IRQ_CFG           0x10000
+
 /*
  * AIC2 registers are laid out like this, starting at AIC2_IRQ_CFG:
+ * AIC3 registers use the same layout but start at AIC3_IRQ_CFG:
  *
  * Repeat for each die:
  *   IRQ_CFG: u32 * MAX_IRQS
@@ -293,6 +297,15 @@ static const struct aic_info aic2_info __initconst = {
        .local_fast_ipi = true,
 };
 
+static const struct aic_info aic3_info __initconst = {
+       .version        = 3,
+
+       .irq_cfg        = AIC3_IRQ_CFG,
+
+       .fast_ipi       = true,
+       .local_fast_ipi = true,
+};
+
 static const struct of_device_id aic_info_match[] = {
        {
                .compatible = "apple,t8103-aic",
@@ -310,6 +323,10 @@ static const struct of_device_id aic_info_match[] = {
                .compatible = "apple,aic2",
                .data = &aic2_info,
        },
+       {
+               .compatible = "apple,t8122-aic3",
+               .data = &aic3_info,
+       },
        {}
 };
 
@@ -620,7 +637,7 @@ static int aic_irq_domain_map(struct irq_domain *id, unsigned int irq,
        u32 type = FIELD_GET(AIC_EVENT_TYPE, hw);
        struct irq_chip *chip = &aic_chip;
 
-       if (ic->info.version == 2)
+       if (ic->info.version == 2 || ic->info.version == 3)
                chip = &aic2_chip;
 
        if (type == AIC_EVENT_TYPE_IRQ) {
@@ -991,7 +1008,7 @@ static int __init aic_of_ic_init(struct device_node *node, struct device_node *p
 
                break;
        }
-       case 2: {
+       case 2 ... 3: {
                u32 info1, info3;
 
                info1 = aic_ic_read(irqc, AIC2_INFO1);
@@ -1065,7 +1082,7 @@ static int __init aic_of_ic_init(struct device_node *node, struct device_node *p
                off += irqc->info.die_stride;
        }
 
-       if (irqc->info.version == 2) {
+       if (irqc->info.version == 2 || irqc->info.version == 3) {
                u32 config = aic_ic_read(irqc, AIC2_CONFIG);
 
                config |= AIC2_CONFIG_ENABLE;
@@ -1116,3 +1133,4 @@ err_unmap:
 
 IRQCHIP_DECLARE(apple_aic, "apple,aic", aic_of_ic_init);
 IRQCHIP_DECLARE(apple_aic2, "apple,aic2", aic_of_ic_init);
+IRQCHIP_DECLARE(apple_aic3, "apple,t8122-aic3", aic_of_ic_init);