]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
scsi: ufs: host: mediatek: Add VCC on delay for stability
authorEd Tsai <ed.tsai@mediatek.com>
Tue, 10 Mar 2026 00:52:30 +0000 (08:52 +0800)
committerMartin K. Petersen <martin.petersen@oracle.com>
Wed, 11 Mar 2026 01:35:00 +0000 (21:35 -0400)
Introduce a delay after enabling UFS5 VCC for MT6995 to ensure voltage
stability before refclk activation.

Signed-off-by: Ed Tsai <ed.tsai@mediatek.com>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Link: https://patch.msgid.link/20260310005230.4001904-6-ed.tsai@mediatek.com
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/ufs/host/ufs-mediatek.c
drivers/ufs/host/ufs-mediatek.h

index b3daaa07e925219fe8486f061d41683ac037bde4..4618d7834414d9771442062b58ba6ced7950aa4c 100644 (file)
@@ -1960,6 +1960,8 @@ static int ufs_mtk_apply_dev_quirks(struct ufs_hba *hba)
 
 static void ufs_mtk_fixup_dev_quirks(struct ufs_hba *hba)
 {
+       struct ufs_mtk_host *host = ufshcd_get_variant(hba);
+
        ufshcd_fixup_dev_quirks(hba, ufs_mtk_dev_fixups);
 
        if (ufs_mtk_is_broken_vcc(hba) && hba->vreg_info.vcc) {
@@ -1971,6 +1973,15 @@ static void ufs_mtk_fixup_dev_quirks(struct ufs_hba *hba)
                hba->dev_quirks &= ~UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM;
        }
 
+       /*
+        * Add a delay after enabling UFS5 VCC to ensure the voltage
+        * is stable before the refclk is enabled.
+        */
+       if (hba->dev_info.wspecversion >= 0x0500 &&
+           (host->ip_ver == IP_VER_MT6995_A0 ||
+            host->ip_ver == IP_VER_MT6995_B0))
+               hba->quirks |= UFSHCD_QUIRK_VCC_ON_DELAY;
+
        ufs_mtk_vreg_fix_vcc(hba);
        ufs_mtk_vreg_fix_vccqx(hba);
        ufs_mtk_fix_ahit(hba);
index 9747277f11e8917b38524d0c4a3069fc38bd144a..8547a6f0499091dfb7aaf7e6cdadce8be4fca30a 100644 (file)
@@ -220,6 +220,10 @@ enum {
        IP_VER_MT6991_B0 = 0x10470000,
        IP_VER_MT6993    = 0x10480000,
 
+       /* UFSHCI 5.0 */
+       IP_VER_MT6995_A0 = 0x10490000,
+       IP_VER_MT6995_B0 = 0x10500000,
+
        IP_VER_NONE      = 0xFFFFFFFF
 };